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IBM 5150 PC Technical Reference (6025005, August, 1981) (PDF)

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April 2011<br />

IMPORTANT<br />

1. The motherboard described in this document is the<br />

first motherboard, the 16KB-64KB one.<br />

2. If the BIOS on the 16KB-64KB motherboard has<br />

been upgraded to the third revision one, then the<br />

switch settings shown for SW2 (“switch 2”) on the<br />

motherboard no longer apply.<br />

The BIOS revision can be determined by examination<br />

of the seven digit number on motherboard chip U33.<br />

First revision: 5700051<br />

Second revision: 5700671<br />

Third revision: 1501476


----<br />

-<br />

----- --_.­<br />

- - - Personal Computer<br />

Hardware <strong>Reference</strong><br />

Library<br />

<strong>Technical</strong> <br />

<strong>Reference</strong>


FEDERAL COMMUNICATIONS COMMISSION<br />

RADIO FREQUENCY INTERFERENCE STATEMENT<br />

WARNING: This equipment has been certified to comply with the<br />

limits for a Class B computing device, pursuant to Subpart J of Part .~<br />

15 of FCC rules. Only peripherals (computer input/output devices,<br />

terminals, printers, etc.) certified to comply with the Class B limits<br />

may be attached to this computer. Operation with non-certified<br />

peripherals is likely to result in interference to radio and TV<br />

reception.<br />

First Edition (<strong>August</strong> <strong>1981</strong>)<br />

Changes are periodically made to the information herein; these changes will be<br />

incorporated in new editions of this publication.<br />

Products are not stocked at the address below. Requests for copies of this<br />

product and for technical information about the system should be made to<br />

your authorized <strong>IBM</strong> Personal Computer Dealer.<br />

A Product Comment Form is provided at the back of this publication. If this<br />

form has been removed, address comment to: <strong>IBM</strong> Corp., Personal Computer,<br />

P.O. Box 1328, Boca Raton, Florida 33432. <strong>IBM</strong> may use or distribute any of<br />

the information you supply in any way it believes appropriate without incurring<br />

any obligations whatever.<br />

© Copyright International Business Machines Corporation <strong>1981</strong>


PREFACE <br />

~ The <strong>IBM</strong> Personal Computer <strong>Technical</strong> <strong>Reference</strong> Manual is designed<br />

to provide hardware design and interface information. This publication<br />

also provides Basic Input Output System (BIOS) information as well as<br />

programming support matter.<br />

This manual is intended for programmers, engineers involved in <br />

hardware and software design, designers, and interested persons who <br />

have a need to know how the <strong>IBM</strong> Personal Computer is designed and <br />

works. <br />

This manual has three sections: <br />

Section - 1 <br />

"HARDWARE OVERVIEW," features an overview ofthe system as <br />

a whole calling out specific items such as the System Unit, Keyboard, <br />

<strong>IBM</strong> Monochrome Display and the 80 CPS Matrix Printer. <br />

Section - 2<br />

" HARDWARE," contains a description for each functional part ofthe<br />

system. This section also contains specifications for power, timing, and<br />

interface. Programming considerations are supported by coding tables,<br />

command codes and registers.<br />

Section - 3<br />

"ROM and SYSTEM USAGE," describes BIOS as well as how to use<br />

BIOS, interrupt vector listings, memory map, vectors with special<br />

meanings, a cassette section, a keyboard encoding section, and a<br />

set of Low Memory Maps.<br />

"APPENDICES," to address the ROM BIOS listing, an instruction<br />

set, logic diagrams, and expanded charts used to support specific<br />

hardware descriptions.


CONTENTS <br />

SECTION 1. HARDWARE OVERVIEW......... 1-1 <br />

System Block Diagram ............................ 1-4 <br />

SECTION 2. HARDWARE...................... 2-1 <br />

System Board ................................... 2-3 <br />

System Board Data Flow .......................... 2-6 <br />

I/O Channel ..................................... 2-8 <br />

I/O Channel Diagram ............................ 2-9 <br />

System Board I/O Channel Description ............. 2-10 <br />

System Board Component Diagram ................. 2-13 <br />

Keyboard........................................ 2-14 <br />

Keyboard Interface Block Diagram ................. 2-15 <br />

Keyboard Diagram ............................... 2-16 <br />

Keyboard Scan Codes ............................. 2-17 <br />

Keyboard Interface Connector Specifications ......... 2-18 <br />

Cassette User Interface ............................ 2-19 <br />

Cassette Jumpers ............................... 2-19 <br />

Circuit Block Diagrams ......................... 2-19 <br />

Cassette Interface Connector Specifications .......... 2-21 <br />

Speaker Interface ................................. 2-22 <br />

Speaker Drive System Block Diagram ............. 2-22 <br />

I/O Address Map ................................. 2-23 <br />

System Memory Map ............................. 2-25 <br />

System Board And Memory Expansion Switch Settings ... 2-28 <br />

5 1/4" Diskette Drives Switch Settings .............. 2-29 <br />

Monitor Type Switch Settings .... , ..... , ........... 2-29 <br />

System Board Memory Switch Settings .............. 2-30 <br />

32/64 KB Memory Expansion Option Switch Settings ... 2-31 <br />

Power Supply ................................... 2-33 <br />

Power Supply Location ............................ 2-34 <br />

Input Requirements ............................... 2-34 <br />

DC Output ...................................... 2-34 <br />

AC Output ...................................... 2-34 <br />

Power Supply Connectors And Pin Assignments ...... 2-35 <br />

Important Operating Characteristics ................. 2-36 <br />

Over Voltage/Current Protection ................. 2-36 <br />

Signal Requirements ............................ 2-36 <br />

iii


<strong>IBM</strong> Monochrome Display and Parallel <br />

Printer Adapter................................. 2-37 <br />

Parallel Interface Description ...................... 2-37 <br />

<strong>IBM</strong> Monochrome Display Adapter Block Diagram ... 2-38 <br />

System Channel Interface .......................... 2-39 <br />

Lines Used .................................... 2-39 <br />

Loads ......................................... 2-39 <br />

Special Timing ................................. 2-39 <br />

Data Rates .................................... 2-39 <br />

Interrupt and DMA Response Requirements ....... 2-39 <br />

Modes Of Operation .............................. 2-40 <br />

Programming Considerations ....................... 2-41 <br />

Programming the 6845 CRT Controller ........... 2-41 <br />

Sequence of Events ............................. 2-41 <br />

Memory Requirements .......................... 2-41 <br />

DMA Channel ................................. 2-42 <br />

Interrupt Levels ................................ 2-42 <br />

I/O Address and Bit Map ....................... 2-42 <br />

<strong>IBM</strong> Monochrome Display ........................ 2-43 <br />

Operating Characteristics ........................ 2-43 <br />

<strong>IBM</strong> Monochrome Direct Drive Interface and <br />

Pin Assignment ................................. 2-44 <br />

Color/Graphics Monitor Adapter ................. 2-45 <br />

Color/Graphics Monitor Adapter Block Diagram ..... 2-47 <br />

Major Components Definitions ..................... 2-48 <br />

Motorola 6845 CRT Controller .................. 2-48 <br />

Mode Set and Status Registers ................... 2-48 <br />

Display Buffer ................................. 2-48 <br />

Character Generator ............................ 2-48 <br />

Timing Generator .............................. 2-48 <br />

Composite Color Generator. ..................... 2-48 <br />

Modes of Operation ............................... 2-49 <br />

Alphanumeric Mode ............................ 2-49 <br />

Color TV ...................................... 2-49 <br />

Color Monitor ................................. 2-50 <br />

<strong>IBM</strong> Monochrome Display Adapter V s. Color/Graphics .. . <br />

Adapter Attribute Relationship ..................... 2-51 <br />

Color/Graphics Modes ............................ 2-51 <br />

Graphics Storage Map .......................... 2-52 <br />

Description of Basic Operations .................. 2-54 <br />

Summary of Available Colors .................... 2-55 <br />

iv


Programming Considerations ....................... 2-55 <br />

Programming The 6845 Controller ................ 2-55 <br />

6845 Register Description ....................... 2-56 <br />

Programming the Mode Control and Status Register ... 2-57 <br />

Color Select Register ........................... 2-57 <br />

Mode Select Register ........................... 2-58 <br />

Mode Register Summary ........................ 2-58 <br />

Status Register ................................. 2-59 <br />

Sequence of Events ............................. 2-59 <br />

Memory Requirements .......................... 2-60 <br />

Interrupt Level ................................. 2-60 <br />

I/O Address and Bit Map ....................... 2-61 <br />

Color/Graphics Monitor Adapter Direct Drive, and <br />

Composite Interface Pin Assignment ............... 2-62 <br />

Color/Graphics Monitor Adapter Auxiliary <br />

Video Connectors ............................... 2-63 <br />

Parallel Printer Adapter .......................... 2-65 <br />

Parallel Printer Block Diagram ..................... 2-66 <br />

Programming Considerations ....................... 2-67 <br />

Parallel Printer Adapter Interface Connector <br />

Specifications ................................... 2-69 <br />

<strong>IBM</strong> 80 CPS Matrix Printer ....................... 2-70 <br />

Printer Specifications .............................. 2-71 <br />

Setting The DIP Switches ......................... 2-72 <br />

Functions and Conditions of DIP Switch 1 ........ 2-72 <br />

Functions and Conditions of DIP Switch 2 ........ 2-73 <br />

Parallel Interface Description ...................... 2-73 <br />

Connector Pin Assignment and Descriptions of <br />

Interface Signals .............................. 2-74 <br />

Parallel Interface Timing Diagram ................ 2-77 <br />

ASCII Coding Table .............................. 2-78 <br />

ASCII Control Codes ............................. 2-79 <br />

5 1/4" Diskette Drive Adapter .................... 2-89 <br />

5 1/4" Diskette Drive Adapter Block Diagram ....... 2-90 <br />

Functional Description ............................ 2-91 <br />

Digital Output Register .......................... 2-91 <br />

Floppy Disk Controller. ......................... 2-91 <br />

Programming Considerations ....................... 2-94 <br />

Symbol Descriptions ............................ 2-94 <br />

Command Summary ............................ 2-96 <br />

Command Status Registers ...................... 2-100 <br />

v


Progranuning Summary ............................ 2-103 <br />

D<strong>PC</strong> Registers ................................. 2-103 <br />

Drive Constants ................................ 2-104 <br />

Comments ..................................... 2-104 <br />

System I/O Channel Interface ...................... 2-104 <br />

Drive A and B Interface ........................... 2-106 <br />

Adapter Outputs ............................... 2-106 <br />

Adapter Inputs ................................. 2-107 <br />

5 1/4" Diskette Drive Adapter Internal Interface <br />

Specifications ................................... 2-108 <br />

5 1/4" Diskette Drive Adapter External Interface <br />

Specifications ................................... 2-109 <br />

5 1/4" Diskette Drive ............................. 2-110 <br />

Diskettes ........................................ 2-111 <br />

Mechanical and Electrical Specifications ............ 2-112 <br />

Memory Expansion Options ...................... 2-113 <br />

Operating Characteristics .......................... 2-113 <br />

Memory Module Description ....................... 2-114 <br />

Memory Module Pin Configuration ................. 2-114 <br />

Switch Configurable Start Address .................. 2-115 <br />

Game Control Adapter ........................... 2-117 <br />

Game Control Adapter Block Diagram .............. 2-117 <br />

Functional Description ............................ 2-118 <br />

Address Decode ................................ 2-118 <br />

Data Buss Buffer/Driver ........................ 2-118 <br />

Trigger Buttons ................................. 2-118 <br />

Joystick Po~tions .............................. 2-118 <br />

I/O Channel Description .......................... 2-119 <br />

Interface Description .............................. 2-119 <br />

Joystick Schematic ................................ 2-121 <br />

Game Control Adapter (Analog Input) Connector <br />

Specifications ................................... 2-122 <br />

Asynchronous Communications Adapter .......... 2-123 <br />

Asynchronous Communications Adapter Block <br />

Diagram ....................................... 2-124 <br />

Modes of Operation ............................... 2-125 <br />

I/O Decode for Communications Adapter ......... 2-125 <br />

Interrupts...................................... 2-126 <br />

Interface Description .............................. 2-126 <br />

Current Loop Interface .......................... 2-127 <br />

Voltage Interchange Information .................. 2-128 <br />

vi


INS 8250 Functional Pin Description ............... 2-129 <br />

Input Signals ................................... 2-129 <br />

Output Signals ................................. 2-132 <br />

Input/Output Signals ............................ 2-133 <br />

Programming Considerations ....................... 2-13 3 <br />

Asynchronous Communications Reset Functions ... 2-133 <br />

INS 8250 Accessable Registers .................. 2-134 <br />

INS 8250 Line Control Register. ................. 2-134 <br />

INS 8250 Programmable Baud Rate Generator .... 2-135 <br />

Line Status Register ............................ 2-137 <br />

Interrupt Identification Register .................. 2-139 <br />

Interrupt Enable Register ........................ 2-141 <br />

Modem Control Register ........................ 2-142 <br />

Modem Status Register. ......................... 2-143 <br />

Receiver Buffer Register ......................... 2-144 <br />

Transmitter Holding Register .................... 2-145 <br />

Selecting The Interface Format. .................... 2-146 <br />

Asynchronous Communications Adapter Connector <br />

Interface Specifications .......................... 2-147 <br />

SECTION 3. ROM and SYSTEM USAGE....... 3-1 <br />

ROM BIOS ..................................... 3-2 <br />

Use of BIOS ..................................... 3-2 <br />

Parameter Passing ................................ 3-2 <br />

Interrupt Vector Listing ............................ 3-3 <br />

Vectors With Special Meaning ..................... 3-5 <br />

Interrupt 1 CH - Timer Tick ...................... 3-5 <br />

Interrupt IDH - Video Parameters ................ 3-5 <br />

Interrupt lEH - Diskette Parameters .............. 3-5 <br />

Interrupt IFH - Graphics Character Extensions .... 3-6 <br />

Other Read/Write Memory Usage ................ 3-6 <br />

BIOS Programming Tip ........................... 3-6 <br />

BIOS Memory Map ............................... 3-7 <br />

BIOS Cassette Logic ............................. 3-8 <br />

Interrupt 15 ...................................... 3-8 <br />

Cassette Write ................................... 3-8 <br />

Cassette Read .................................... 3-9 <br />

Data Record Architecture .......................... 3-10 <br />

Error Recovery ................................... 3-10 <br />

vii


Keyboard Encoding and Usage ................... 3-11 <br />

Encoding ........................................ 3-11 <br />

Character Codes .................................. 3-11 <br />

Extended Codes .................................. 3-13 <br />

Extended Functions ............................ 3-13 <br />

Shift States .................................... 3-14 <br />

Shift Key Priorities ............................. 3-15 <br />

Special Handling ................................. 3-15 <br />

System Reset .................................. 3-15 <br />

Break ......................................... 3-16 <br />

Pause ......................................... 3-16 <br />

Print Screen ................................... 3-16 <br />

Keyboard Usage .................................. 3-17 <br />

BASIC Screen Editor Special Functions ............. 3-19 <br />

DOS Special Functions ........................... 3-19 <br />

Low Memory Maps .............................. 3-21 <br />

0-7F Interrupt Vectors ............................ 3-21 <br />

BASIC and DOS Reserved Interrupts (80-3FF)...... 3-22 <br />

Reserved Memory Locations (400-5FF) ............. 3-22 <br />

BASIC Workspace Variables ...................... 3-23 <br />

APPENDICES.................................. A-O <br />

Appendix A: ROM BIOS Listing ................. A-I <br />

Appendix B: Assembly Instruction Set <strong>Reference</strong>... B-1 <br />

Appendix C: OfCharacters Keystrokes and Color .... C-l <br />

Appendix D: Logic Diagrams..................... D-l <br />

Appendix E: Unit Specifications .................. E-l <br />

Glossary ......................................... G-l <br />

Bibliography .................................... Bib-l <br />

Index ........................................... 1-1 <br />

viii


FIGURE LISTING <br />

1. System Block Diagram ........................ 1-4 <br />

2. System Board Data Flow ...................... 2-6, 7 <br />

3. I/O Channel Diagram ......................... 2-9 <br />

4. System Board Component Diagram ............. 2-13 <br />

5. Keyboard Interface Block Diagram .............. 2-15 <br />

6. Keyboard Diagram ............................ 2-16 <br />

7. Cassette Interface Read Hardware .............. 2-19 <br />

8. Cassette Interface Write Hardware .............. 2-20 <br />

9. Cassette Motor Control. ....................... 2-20 <br />

10. Speaker Drive System Block Diagram ........... 2-22 <br />

11. System Memory Map ......................... 2-25 <br />

12. System Memory Map (Increments of I6KB) ..... 2-26 <br />

13. Power Supply and Connectors .................. 2-35 <br />

14. <strong>IBM</strong> Monochrome Display AdapterBlockDiagram ... 2-38 <br />

15. Color/Graphics Monitor Adapter Block Diagram ... 2-47 <br />

16. Parallel Printer Adapter Block Diagram ......... 2-66 <br />

17. Location of (Printer) DIP Switches ............. 2-72 <br />

18. Parallel Interface Timing ....................... 2-77 <br />

19. 5 1/4" Diskette Drive Adapter Block Diagram ... 2-90 <br />

20. Game Control Adapter Block Diagram .......... 2-117 <br />

21. Joystick Schematic ............................ 2-121 <br />

22. Asynchronous Communications Adapter <br />

Block Diagram ............................... 2-124 <br />

23. Current Loop Interface ........................ 2-127 <br />

24. Selecting The Interface Format ................. 2-146 <br />

25. BIOS Memory Map ........................... 3-7 <br />

ix


TABLE LISTING<br />

1. lCeyboard Scan Codes ......................... 2-17 <br />

2. 6845 Initialization Parameters .................. 2-41 <br />

3. Monochrome Vs Color/Graphics Attributes ...... 2-51 <br />

4. Color/Graphics Modes ........................ 2-51 <br />

5. Summary of Available Colors .................. 2-55 <br />

6. 6845 Register Description ..................... 2-56 <br />

7. Printer Specifications .......................... 2-71 <br />

8. Functions and Conditions of DIP Switch 1 ....... 2-72 <br />

9. Functions and Conditions of DIP Switch 2 ....... 2-73 <br />

10. Connector Pin Assignment and <br />

Description of Interface Signals ................. 2-74 <br />

11. ASCII Coding Table .......................... 2-78 <br />

12. DCl/DC3 and Data Entry ..................... 2-82 <br />

13. Symbol Description ........................... 2-94 <br />

14. Status Register O.............................. 2-100 <br />

15. Status Register 1. ............................. 2-101 <br />

16. Status Register 2 .............................. 2-102 <br />

17. Status Register 3 .............................. 2-103 <br />

18. Mechanical and Electrical Specifications ......... 2-112 <br />

19. Memory Module Pin Configuration ............. 2-114 <br />

20. DIP Module Start Address ..................... 2-115 <br />

21. I/O Decodes (3F8 - 3FF) ..................... 2-125 <br />

22. Asynchronous Communications Reset Functions ... 2-133 <br />

23. BAUD Rate at 1.843 Mhz..................... 2-137 <br />

24. Interrupt Control Functions (Asynchronous) ..... 2-140 <br />

25. Character Codes .............................. 3-11 <br />

26. lCeyboard Extended Functions .................. 3-14 <br />

27. lCeyboard - Commonly Used Functions .......... 3-17 <br />

28. Basic Screen Editor Special Functions ........... 3-19 <br />

29. DOS Special Functions ........................ 3-19 <br />

30. 0-7F Interrupt Vectors ........................ 3-21 <br />

31. Basic & DOS Reserved Interrupts (80-3FF) ..... 3-22 <br />

32. Reserved Memory Locations (400-5FF) ......... 3-22 <br />

x


SECTION I. <br />

HARDWARE OVERVIEW <br />

The <strong>IBM</strong> Personal Computer has two major elements; a System Unit<br />

"..-..." and a keyboard. In addition, a variety of options are offered including<br />

one or two 5-1/4" Diskette Drives with adapter which can be housed<br />

inside the System Unit, an <strong>IBM</strong> Monochrome Display, an 80 CPS<br />

Matrix Printer, two display adapters, storage increments to 256 KB, an<br />

Asynchronous Communications Adapter, Printer Adapter and a<br />

Game Control Adapter.<br />

The System Unit is the heart of your <strong>IBM</strong> Personal Computer system.<br />

The System Unit houses the microprocessor, Read-Only Memory<br />

(ROM), Read/Write Memory, Power Supply, and System Expansion<br />

Slots for the attachment of up to five options. One or two 5-1/4"<br />

Diskette Drives can also be mounted in the system Unit providing<br />

160KB of storage each.<br />

The System Board is a large board which fits horizontally in the base<br />

of the System Unit and includes the microprocessor, 40KB ROM and<br />

16KB memory. The memory can be expanded in 16KB increments to<br />

64KB. The System Board also includes an enhanced version of the<br />

Microsoft BASIC-80 Interpreter without diskette functions. The<br />

BASIC Interpreter is included in the ROM. The System Board also<br />

permits the attachment of an audio cassette recorder for loading or<br />

saving programs and data.<br />

The System Unit power system is a 63.5 watt, 4 level DC and 120 AC<br />

unit. It is a switching regulator design" allowing for light weight and<br />

high efficiency. The DC power capacity is designed to support an<br />

expanded system.<br />

The 5-1/4" Diskette Drive Adapter fits into one of the five System<br />

Expansion Slots. This attachment supports two internal drives. The<br />

5-1/4" Diskette Drive Adapter uses write precompensation and a<br />

phase lock loop for clock and data recovery.<br />

The 5-1/4" Diskette Drive permits the <strong>IBM</strong> Personal Computer to<br />

read, write and store data on 5-1/4" diskettes. Each diskette stores<br />

approximately 160KB of data. Two of these drives may be installed<br />

internally in the System Unit.<br />

The keyboard is attached to the System Unit with a light-weight, coiled<br />

cable. The keyboard features 83 keys, and offers commonly used data<br />

and word processing functions in a design combining the familiar<br />

typewriter and calculator pad layouts.<br />

1-1


A base system requires one of two different display adapters, either a<br />

Color/Graphics medium resolution Monitor adapter or a high<br />

resolution monochrome alphanumeric adapter with a parallel printer<br />

adapter.<br />

The Color/Graphics adapter operates at standard television frequencies<br />

(15,750Hz), allowing attachment to a variety of industry ~<br />

standard monitors, including home TVs with a user supplied RF<br />

modulator.<br />

The Color/Graphic Monitor adapter supports a variety of modes<br />

selected by program control. The adapter supports color or black and<br />

white alphanumeric modes with line width of 40 or 80 characters and<br />

25 lines. In the alphanumeric mode there are 256 characters.<br />

This adapter provides both a standard composite video and direct<br />

drive outputs. In addition, a light pen feature input port is provided.<br />

The <strong>IBM</strong> Monochrome Display is a high resolution green phosphor<br />

display offering the personal computer user quality usually found on<br />

larger computer systems. The display features an 11-1/2" screen with<br />

an anti-glare surface and a variety of highlighting choices. The screen<br />

displays 25 lines of 80 characters. It supports 256 different letters,<br />

numbers and special characters that are formed in a nine by 14 dot<br />

matrU. ~<br />

The <strong>IBM</strong> Monochrome Display requires the Monochrome Display and<br />

Printer Adapter Option. This option installs in one ofthe System Unit's<br />

five System Expansion Slots. The display is powered from the System<br />

Unit.<br />

The 80 CPS Matrix Printer is a versatile, low cost, quality printer for<br />

the <strong>IBM</strong> Personal Computer. It prints in both directions at a nominal<br />

horizontal speed of 80 characters per second on continuous-feed, single<br />

or multi-part paper. The printer features four character sizes ( 40,66,80<br />

or 132 characters per line), Power-on Self-test and simple paper<br />

loading and ribbon cartridge uppercase and lower case ASCII character<br />

set and 64 special graphic characters.<br />

The 80 CPS Matrix Printer requires either the Monochrome Display<br />

and Printer Adapter or the Printer Adapter. These options install in one<br />

of the Systems Unit's five System Expansion Slots. The Printer<br />

requires standard 120 volt, 60 Hz power through its own power cord. ~<br />

The printer requires the Printer Cable Option for attachment to the<br />

System Unit.<br />

1-2


The 16KB Memory Expansion Kits allow you to increase the memory<br />

size ofyour <strong>IBM</strong> p.ersonal Computer. The base system comes standard<br />

with 16KB of memory. Up to three 16KB Memory Expansion Kits<br />

may be installed to increase the memory size to 64KB. Memory can be<br />

further increased to 256KB with additional memory options once these<br />

three Expansion Kits are installed.<br />

~e Expansion Kits plug into the System Board and must be installed<br />

sequentially. They do not occupy any of the five System Expansion<br />

Slots.<br />

The 32KB and 64KB Memory Expansion Options permit you to<br />

increase memory capacity beyond 64KB. Multiple 32KB and 64KB<br />

Memory Expansion Options may be installed as long as System<br />

Expansion Slots are available. A maximum of three 64KB memory<br />

options may be installed for a total of 256KB of memory.<br />

The 32KB and 64KB Memory Expansion Options require a System<br />

Expansion Slot in the System Unit. The first 64KB on the System<br />

Board is required before 32KB and 64KB Memory Expansion Options<br />

can be installed.<br />

The Asynchronous Communications Adapter provides a channel to<br />

data processing or input/output devices outside of your immediate<br />

~system. These can be connected by telephone using a plug-in modem,<br />

qr directly by cable when the device is nearby.<br />

This option utilizes the RS232C asynchronous (start-stop) interface<br />

permitting attachment to a variety of devices including a large "host"<br />

computer or another <strong>IBM</strong> p.ersonal Computer.<br />

This option supports 50 to 9600 BPS transmission speeds. One 25 pin<br />

"D" shell, male type connector is provided to attach various peripheral<br />

devices. A "current loop" interface is located in the same connector,<br />

and a jumper block is provided to manually select either the voltage or<br />

the current loop interface.<br />

The Asynchronous Communications Adapter requires a System<br />

Expansion Slot in the System Unit. An external modem is required for<br />

telephone line transmission.<br />

The Game Control Adapter permits the attachment of user-supplied<br />

joysticks or paddles. Two joysticks and up to four paddles may be<br />

~. attached. <strong>IBM</strong> does not manufacture either the joysticks or the paddles.<br />

This option provides connectors for joysticks or paddles and requires a<br />

System Expansion Slot in the System Unit.<br />

A block diagram of the system is on the following page (1-4).<br />

1-3


System Block Diagram <br />

• OSC<br />

• elK<br />

• CNTRL<br />

8088<br />

MAIN<br />

PROCESSING<br />

UNIT<br />

20 81T<br />

4 CH<br />

DMA<br />

3 CH<br />

16 BIT<br />

TIC<br />

8 LEV.<br />

INTR<br />

SYSTEM 80ARD<br />

KEYBOARO<br />

ATTACHMENT<br />

ROS ROS<br />

8K x 8 8K x 8<br />

ROS ROS<br />

8K x 8 BK x 8<br />

ROS ROS<br />

8Kx 8 BK x 8<br />

110 CHANNEL<br />

16 x 9 READ!<br />

WRITE MEMORY<br />

16KB MEMORY<br />

EXPANSION<br />

16KB MEMORY<br />

EXPANSION<br />

16KB MEMORY<br />

EXPANSION<br />

Figure 1. SYSTEM BLOCK DIAGRAM<br />

1-4


SECTION 2. HARDWARE<br />

~ Contents:<br />

System Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3 <br />

Power Supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-33 <br />

<strong>IBM</strong> Monochrome Display And Printer Adapter... 2-37 <br />

<strong>IBM</strong> Monochrome Display. . . . . . . . . . . . . . . . . . . . . . . 2-43 <br />

Color/Graphics Monitor Adapter. . . . . .. . . . . . . . . . . 2-45 <br />

Printer Adapter and Printer. . . . . . . . . . . . . . . . . . . . . . . 2-65 <br />

5-1/4" Diskette Drive Adapter. . . . . . . . . . . . . . . . . . . . 2-89 <br />

5-1/4" Diskette Drive............................ 2-110 <br />

Memory Expansion Options 32KB and 64KB. . . . . . 2-113 <br />

Game Control Adapter. . . . . . . . . . . . . . . . . . . . . . . . . . . 2-117 <br />

Asynchronous Communications Adapter . . . . . . . . . . 2-123 <br />

2-1


2-2<br />

NOTES


SYSTEM BOARD<br />

The System Board fits horizontally in the base of the System Unit<br />

and has dimensions of approximately 8-1/2 inches by 11 inches. The<br />

System Board isa multilayer single land-per-channel design, with<br />

ground and power internal planes provided. DC power and a signal<br />

from the power supply enter the board through two six pin connectors.<br />

Other connectors on the board are for attaching the keyboard, audio<br />

cassette, and the speaker. Five 62-pin card edge sockets are also<br />

mounted on the System Board. The system I/O channel is bussed<br />

across these five I/O slots.<br />

There are 16 (13 used) Dual In-line Package (DIP) switches mounted<br />

on the card which can be read under program control. These switches<br />

are used to indicate to the system software what options are installed.<br />

They are used to indicate amounts of installed storage, both on the<br />

System Board and in the System Expansion slots, type of display<br />

adapter installed, and desired operation modes upon power-up; ie,<br />

coloror black and white and 80- or 40 character lines. Switches are also<br />

used to identify when the operating system is to be loaded from<br />

diskette, and how many diskette drives are attached.<br />

The major elements of the System Board are divided into five major<br />

functional areas. They are, the processor subsystem and its support<br />

elements, the Read-Only Memory (ROM) subsystem, the Read/Write<br />

(RlW) Memory subsystem, integrated I/O adapters, and the I/O<br />

channel. All functions are described in detail in this section, except for<br />

the I/O channel, which has its own section. Figure 2.0 "System Board<br />

Data Flow" page 2-6, illustrates these functional areas.<br />

The heart of the System Board is the Intel 8088 microprocessor.<br />

This processor is an 8-bit bus version of the 16-bit 8086 processor by<br />

Intel. Itis software compatible with the 8086 and, thus, supports 16-bit<br />

operations including multiply and divide. The processor supports 20<br />

bits of addressing (1 megabyte of storage). The processor is<br />

implemented in maximum mode so a co-processor can be added as a<br />

feature. The processor is operated at 4.77 Mhz. This frequency is<br />

derived from a 14.31818 Mhz crystal which is divided by three for. the<br />

processor clock and by four to obtain the 3.58 Mhz color burst signal<br />

required for color televisions.<br />

At the 4.77 Mhz clock rate, the 8088 bus cycles are four clocks of<br />

210 ns or 840 ns. I/O cycles take five 210 ns clocks or 1.05 microsec<br />

(m sec).<br />

2-3


The processor is supported by a set of high function support devices <br />

providing four channels of 20-bit Direct Memory Access (DMA), <br />

three 16-bit timer counter channels, and eight prioritized <br />

interrupt levels. <br />

Three of the four DMA channels are available on the I/O bus and are <br />

provided to support high speed data transfers between I/O devices and <br />

memory without processor intervention. The fourth DMA channel is <br />

programmed to refresh the system dynamic memory. This is done by <br />

programming a channel of the timer counter device to periodically <br />

request a dummy DMA transfer. This creates a memory read cycle <br />

which is available to refresh dynamic storage both on the System Board <br />

and in the System Expansion slots. All DMA data transfers, except the <br />

refresh channel, take five processor clocks of 210 ns or 1.05 ns if the <br />

processor ready line is not deactivated. Refresh DMA cycles take four <br />

clocks or 840 ns. <br />

The three timer/counters are used by the system as follows: Channel 0 <br />

is used to time and request refresh cycles from the DMA channel, <br />

Channel 2 is used to support the tone generation for the audio speaker, <br />

and Channel 1 is used by the system as a general purpose timer <br />

providing a constant time base for implementing a time-of-day clock. <br />

Each channel has a minimum timing resolution of 1.05 f.Lsec. <br />

Ofthe eight prioritized levels ofinterrupt, six are bussed to the I/O slots <br />

for use by feature cards. Two levels are used on the System Board. <br />

Level 0, the highest priority, is attached to Channell of the timer <br />

counter and provides a periodic interrupt. Level 1 is attached to the <br />

keyboard adapter circuits and receives an interrupt for each scan code <br />

sent by the keyboard. The Non-Maskable Interrupt (NMI) ofthe 8088 <br />

is used to report memory parity errors. <br />

The System Board is designed to support both ROM and Read/Write <br />

Memory. The System Board contains space for 48K x 8 of ROM or <br />

EPROM. Six module sockets are provided, each capable of accepting <br />

an 8K x 8 device. Five of the sockets are populated with 40 KB of <br />

ROM. This ROM contains the Cassette BASIC interpreter, cassette <br />

operating system, Power-on Self-test, I/O drivers, dot patterns for 128 <br />

characters inn graphics mode, and a diskette bootstrap loader. The <br />

ROM is packaged in 24-pin modules and has an access time of 250 ns <br />

and a cycle time of 375 ns. <br />

The System Board also contains from 16K x 9 to 64K x 9 of Read/ <br />

Write Memory. A minimum system would have 16 KB ofmemory with <br />

module sockets for an additional 48 KB. In a cassette version of the <br />

system, approximately 4 KB is used by the system leaving approxi­<br />

mately 12 KB of user's space for BASIC programs. Additional <br />

memory beyond the System Board's maximum of64 KB, is obtained by <br />

adding memory cards in the System Expansion slots. <br />

2-4


The memory is dynamic 16K x 1 chips with an access time of 250 ns<br />

and a cycle time of 410 ns. All R/W memory is parity checked.<br />

The System Board contains circuits for attaching an audio cassette,<br />

the serial keyboard, and the speaker. The cassette adapter allows the<br />

attachment ofany good quality audio cassette via either the microphone<br />

1"""""\ or auxiliary inputs. The board has a jumper for either input. This<br />

interface also provides a cassette motor control line for transport<br />

starting and stopping under program control. This interface reads and<br />

writes the audio cassette at a data rate of between 1,000 and 2,000<br />

baud. The baud rate is variable and dependent on data content since a<br />

different bit-cell time is used for O's and 1 'so For diagnostic purposes,<br />

the tape interface can loop read to write to test the board's circuits.<br />

The system software blocks cassette data, generates and checks data<br />

with a Cyclic Redundancy Check (CRC).<br />

.~<br />

The processor also contains the adapter circuits for attaching the<br />

serial interface from the keyboard. This generates an interrupt to the<br />

processor when a complete scan code is received. This interface can<br />

request execution of a diagnostic in the keyboard.<br />

Both the keyboard and cassette interfaces are provided via 5-pin<br />

DIN connectors, which are right angle mounts on the System Board<br />

and extend through the rear panel of the System Unit.<br />

The system is provided with a 2-1/4-inch audio speaker mounted inside<br />

the System Unit. The System Board contains the control circuits and<br />

driver for the speaker. The speaker connects through a 2-wire interface<br />

which attaches to a 4-pin header on the System Board.<br />

The speaker drive circuit is capable of approximately a 1/2 watt of<br />

power. The control circuits allow the speaker to be driven several<br />

different ways. First, a direct program control register bit may be<br />

toggled to generate a pulse train; second, the output ofChannel 2 ofthe<br />

timer counter may be programmed to generate a waveform to the<br />

speaker. Third, the clock input to the timer/counter can be modulated<br />

with a program controlled I/O Register Bit. All three forms of control<br />

may be performed simultaneously.<br />

2-5


System Board Data Flow <br />

<strong>PC</strong><<br />

I<br />

I--­<br />

8259A<br />

INT{RRUPT<br />

CNTRLR<br />

o I 2 3 4 5 6 7<br />

lOCAL ADDRESS.<br />

DATA STATUS, <br />

A.NDCONTROL <br />

ClKJRESET<br />

WAIT<br />

CONTROl<br />

LINES<br />

£XTtRNAL ADOAES$<br />

'US(XAI<br />

Figure 2. SYSTEM BOARD DATA flOW (SHEET 1 OF 2)<br />

2-6


System Board Data Flow <br />

Figure 2. SYSTEM BOARD DATA FLOW (SHEET 2)<br />

2·7


I/O Channel<br />

The I/O channel is an extension of the 8088 microprocessor bus. <br />

Itis, however, demultiplexed, repowered, and enhanced by the addition <br />

of interrupts and Direct Memory Access (DMA) functions. <br />

The I/O channel contains an 8-bit bidirectional data bus, 20 address ~<br />

lines, 6 levels of interrupt, control lines for memory and I/O read or <br />

write, clock and timing lines, 3 channels ofDMA control lines, memory <br />

refresh timing control lines, a channel check line, and power and ground <br />

for the adapters. Four voltage levels are provided for I/O card +5 V dc, ­<br />

5 V dc, +12 V dc, and -12 V dc. These functions are provided in a 62-pin <br />

connector with 100 mil card tab spacing. <br />

A ready line is available on the I/O channel to allow operation with <br />

slow I/O or memory devices. If the channel's Ready line is not <br />

activated by an addressed device, all processor generated memory<br />

read and write cycles take four 210 ns clock or 840 ns/byte. All<br />

processor-generated I/O read and write cycles require five 210 ns<br />

clocks or 1.05 m sec/byte. All DMA transfers require five clocks for a<br />

cycle time of 1.05 m sec/byte. Refresh cycles are present once every 72<br />

clocks or approximately 15 m sec and require five clocks or approximately<br />

7% of the bus bandwidth.<br />

I/O devices are addressed using I/O mapped address space. The ,,--......,<br />

channel is designed so that 512 I/O device addresses are available to<br />

the I/O channel cards.<br />

A channel check line exists for reporting error conditions to the<br />

processor. Activating this line results in a NMI to the 8088 processor.<br />

Memory Expansion Options use this line to report parity errors.<br />

The I/O channel is repowered so there is sufficient drive to power<br />

all five System Expansion Slots, assuming two loads per slot. The<br />

<strong>IBM</strong> Option I/O adapters typically use only one load. A graphic<br />

illustration of the System I/O Channel and its descriptions are on the<br />

following pages.<br />

2-8


1/0 Channel Diagram <br />

REAR PANEl <br />

SIGNAL NAME<br />

- -<br />

1\ SIGN AL NAME <br />

GND -<br />

-81 Al- ~ -I/O CH CK<br />

+RESET DRV +07<br />

+5V - - +06<br />

+IRU2 r- - +05<br />

-5VDC<br />

'- ­<br />

+04<br />

­<br />

­<br />

­<br />

+ORU2<br />

'­ - +03<br />

-12V I- +02<br />

RESERVED I- +01<br />

+12V<br />

'- +00<br />

GND I- 810 Al0- +1/0 CH ROY<br />

-MEMW I- +AEN<br />

-MEMR I- +A19<br />

-lOW I- - +A18<br />

-lOR f- ­<br />

+A17<br />

-DACK3 f- ­<br />

+A16<br />

+ORU3<br />

'- - +A15<br />

-<br />

-<br />

-DACKl ~ - +A14<br />

+ORUl I- ­<br />

+A13<br />

-OACKO<br />

f- ­<br />

+A12<br />

CLOCK I- 820 A20 - +All<br />

+IRQ7 f- +Al0<br />

+IRQ6 ~ - +AS<br />

-<br />

+IRQ5 ~ - +A8<br />

+IRQ4 I- ­<br />

+A7<br />

f- ­<br />

+IRQ3 +A6<br />

-DACK2 ~ - +A5<br />

+T/C f- - +A4<br />

+ALE- ~ ­<br />

+A3<br />

+5V I- ­<br />

+A2<br />

+OSC ~ +Al<br />

+GNO I- 831 A31 - +AO<br />

L....-<br />

L..-­<br />

NOTE:<br />

A description of each signal<br />

is on the following pages. '\ \ COMPONENT SIDE<br />

-<br />

Figure 3. I/O CHANNEL DIAGRAM<br />

2-9


System Board I/O Channel Description<br />

The following is a description of the <strong>IBM</strong> Personal Computer System<br />

Board I/O Channel. All signal lines are TTL compatible.<br />

Signal<br />

I/O Description<br />

OSC 0 Oscillator: This signal is a high speed clock r"\<br />

with a 70 nsec. period (14.31818 MHz.) It hat<br />

a 50% duty cycle.<br />

CLK 0 Clock: This is the system clock. It is a divide<br />

by - three of the oscillator and has a period of<br />

210 nsec. (4.77 Mhz.) The clock has a 33%<br />

duty cycle.<br />

RESET DRV<br />

AO-AI9<br />

o Reset Driver: This line is used to reset or<br />

initialize system logic upon power-up or during<br />

a low line voltage outage. This signal is synchronized<br />

to the falling edge of clock and is active<br />

HIGH.<br />

o Address Bits 0 to 19: These lines are used to<br />

address memory and I/O devices within the<br />

system. The 20 address lines allow access ofup<br />

to 1 megabyte of memory. AO is the Least<br />

Significant Bit (LSB) while A19 is the Most r"\<br />

Significant Bit (MSB). These lines are generated<br />

by either the processor or the DMA<br />

Controller. They are active HIGH.<br />

DO-D7<br />

I/O Data Bits 0 to 7: These lines provide data bus<br />

bits 0 to 7 for the processor, memory, and I/O<br />

Devices. DO is the Least Significant Bit (LSB)<br />

and D7 is the Most Significant Bit (MSB).<br />

These lines are active HIGH.<br />

ALE o Address Latch Enable: This is provided by the<br />

8288 Bus Controller and is used on the System<br />

Board to latch valid addresses from the processor.<br />

It is available to the I/O Channel as an<br />

indicator of a valid processor address (When<br />

used in conjunction with AEN). Processor<br />

addresses are latched with the falling edge of<br />

ALE.<br />

I/O CH CK I -I/O Channei Check: This line provides the<br />

CPU with parity (error) information on memory<br />

or devices in the I/O Channel. When this<br />

signal is active LOW, a parity error is<br />

indicated.<br />

2-10 <br />

r"\


I/O CHRDY I I/O Channel Ready: This line (nonnally high<br />

or "READY") is pulled low ("NOT<br />

READY") by a memory or I/O device to<br />

lengthen I/O or memory cycles. It allows<br />

slower devices to attach to the I/O Channel<br />

with a minimum of difficulty. Any slow device<br />

using this line should drive it low immediately<br />

upon detecting a valid address and a Read or<br />

write command. This line should never be held<br />

low for any period in excess of 10 clock cycles<br />

(2.1 usec.) Machine cycles (I/O or memory)<br />

are extended by an integral number of CLK<br />

cycles (210 ns).<br />

IRQ2-IRQ7 I Interrupt Request 2 to 7: These lines are used to<br />

signal the processor that an I/O device requires<br />

attention. They are prioritized with IRQ2 as<br />

the highest priority and IRQ7 as the lowest. An<br />

Interrupt Request is generated by raising an<br />

IRQ line (Low to High) and holding it high until<br />

it is acknowledged by the processor (Interrupt<br />

Service Routine).<br />

~ lOR 0 -I/O Read Command: This command line instructs<br />

an I/O device to drive its data onto the<br />

data bus. It may be driven by the processor or<br />

the DMA Controller. This signal is active<br />

LOW.<br />

lOW 0 -I/O Write Command: This command line<br />

instructs an I/O device to read the data on the<br />

data bus. It may be driven by the processor or<br />

the DMA controller. This signal is active LOW.<br />

MEMR<br />

-Memory Read Command: This command line<br />

instructs the memory to drive its data onto the<br />

data bus. It may be driven by the processor or<br />

the DMA Controller. This signal is active LOW.<br />

MEMW 0 -Memory Write Command: This command<br />

line instructs the memory to store the data<br />

~ present on the data bus. It may be driven by<br />

the processor or the DMA Controller. This<br />

signal is active LOW.<br />

2-11


DRQI-DRQ3 I DMA Request 1 to 3: These lines are asynchronous<br />

channel requests used by peripheral devices<br />

to gain DMA service. They are prioritized<br />

with DRQ1 having highest priority and<br />

DRQ3 the lowest. A request is generated by<br />

bringing a DRQ line to an active level (HIGH).<br />

A DRQ line must be held high until the 1"""""\<br />

corresponding DACK line goes active.<br />

DACKO­ o -DMA Acknowledge 0 to 3: These lines are<br />

DACK3<br />

AEN<br />

T/C<br />

used to acknowledge DMA requests (DRQ1­<br />

DRQ3) and to refresh system dynamic memory<br />

(DACKO). They are active LOW.<br />

o Address Enable: This line is used to degate the<br />

processor and other devices from the I/O<br />

Channel to allow Direct Memory Access<br />

(DMA) transfers to take place. When this line<br />

is active (HIGH), the DMA Controller has<br />

control of the address bus, data bus, read<br />

command lines, (memory and I/O), and the<br />

write command lines, (memory and I/O.<br />

o Terminal Count: This line provides a pulse<br />

when the terminal count for any DMA channel 1"""""\<br />

is reached. This signal is active HIGH.<br />

The following voltages are available on the System Board 1/0 Channel:<br />

+5 Vdc + 5%, Located on 2 connector pins.<br />

-5 V dc + 10%, Located on 1 connector pin.<br />

+12 Vdc + 5%, Located on 1 connector pin.<br />

-12 Vdc + 10%, Located on 1 connector pin.<br />

GND (Ground), Located on 3 connector pins.<br />

2-12


System Board Component Diagram <br />

READ<br />

ONLY<br />

MEMORY<br />

SYSTEM<br />

EXPANSION<br />

110 SLOTS<br />

r -Jl-J-2~-:--J4-~<br />

rJ<br />

I I<br />

:<br />

," I<br />

I<br />

I<br />

CASSETTE 110 KEYBOARD 110<br />

::<br />

, b<br />

, Q<br />

0<br />

SYSTEM<br />

P2 'Q<br />

I : ~ CLOCK CHIP<br />

I ,. TRIMMER<br />

I~AUX<br />

BOARD<br />

PROCESSOR<br />

SOCKET<br />

=1 =2<br />

m 1 - INTEL 80S8<br />

0~ n~ n n :w.~- :::::~SOR<br />

U U U<br />

CONFIGURATION<br />

16-64 KB o<br />

READ/WRITE<br />

MEMORY '\<br />

o00000 00 ""~"""<br />

00000000 0000000 <br />

o DOODDDDDDDDOODD <br />

o 00000000 0000000 <br />

o D~~DD~,,~,~ DOD 00 <br />

SPEAKER OUTPUT<br />

MIC OR AUX<br />

SelECT<br />

Figure 4. SYSTEM BOARD COMPONENT DIAGRAM<br />

2-13


Keyboard<br />

The Keyboard is a device separate from the System Unit. Itis attached<br />

via a serial interface cable approximately 6 feet in length which plugs<br />

into the rear ofthe System Unit. The attaching cable is coiled, like that<br />

of a telephone headset, and is a shielded four-wire wire connection. The<br />

interface contains power ( +5 Vdc), ground and two bidirectional signal<br />

lines. The cable is permanently attached at the keyboard end and plugs<br />

into the System Unit via a DIN connector.<br />

The keyboard' uses a capacitive technology with a microcomputer<br />

(Intel 8048) performing the keyboard scan function. The keyboard is<br />

packaged in a low-profile enclosure with a tilt adjustment for 5 degree or<br />

15 degree orientations.<br />

The keyboard contains 83 keys laid out in three major groupings.<br />

The central portion of the keyboard contains a standard typewriter<br />

keyboard layout. On the left side, arranged as a 2x5 block, are 10<br />

function keys. These keys are user-defined by software. On the right is<br />

a l6-key, key pad area. This areais, defined by the software but<br />

contains legends for the functions of numeric entry, cursor control<br />

calculator pad screen edit.<br />

The keyboard interface is defined so system software has the maximum<br />

flexibility in defining keyboard operations such as shift states of keys,<br />

make/break keys, and typematic operation. This is accomplished by<br />

having the keyboard return scan codes rather than American National<br />

Standard Control Characters (ASCII) codes. In addition, all keys<br />

except control keys are typematic and generates both a make and a<br />

break-scan code. For example, key 1 produces scan code 01 on make,<br />

and code 81 on break. Break codes are formed by adding X'80' to make<br />

codes. The keyboard I/O driver can define keyboard keys as shift keys<br />

or typematic as required by the application.<br />

The microcomputer (Intel 8048) in the keyboard performs several<br />

functions including a Power-on Self-test and when requested by the<br />

System Unit This diagnostic CRC checks the microcomputer ROM,<br />

tests memory and checks for stuck keys. Additional functions<br />

are: keyboard scanning, key debounce, buffering of up to 20 key scan<br />

codes, maintaining bidirectional serial communications with the<br />

System Unit, and executing the hand shake protocol required by each<br />

scan code transfer. A keyboard diagram and table of scan codes are on<br />

the following pages. Figure (5) is a block diagram of the keyboard<br />

interface on the System Board.<br />

2-14


Keyboard Interface B lock Diagram <br />

74LS322<br />

74S74<br />

PAO QH QH 0<br />

PAl OG 0 IRQ]<br />

r"\ PA2 OF CLOCK<br />

PA3 OE ~ -CLR -0<br />

1'-­<br />

PM 00 +5V-O -PR <br />

PAS<br />

OC <br />

PA6<br />

OB <br />

PA7<br />

OA <br />

PB7<br />

L<br />

-OE<br />

LSl25<br />

-CLR<br />

-6<br />

+5V - DO DRV<br />

-SE GND- 0<br />

OS<br />

~ S/-P<br />

4 -6<br />

r--- 01<br />

¢+5V<br />

4.1K OHM<br />

KEYBOARD<br />

DATA<br />

;-- ~ 0 """ 10<br />

CLOCK 0<br />

CLOCK ICLOCK :J<br />

LATCH<br />

1<br />

PB6<br />

,.<br />

<strong>PC</strong>L K <br />

LS04<br />

GND- 0 KEYBOARD CLOCK<br />

I j.--<br />

9<br />

DRV<br />

l -6 4.1K OHM<br />

LSl25<br />

+5V <br />

Figure 5. KEYBOARD INTERFACE BLOCK DIAGRAM<br />

2-15


t;-J<br />

-0'1<br />

TEJIEfj llEJIDjl[]i[]I[]J1(]JlD1D~Dl(Jl[]J[]J[]lDEJDOEJCO~U ~ <br />

'i EJID IGJ[j[EJjEJI[JiEJI[]I[JrtJT[ jIEJr[lrDlil[]~b1~r[]r~jUI 3<br />

TEJrEJI 'OEJ[JEJIllY[JrDrE:lyEJIEJyEJyDrUl[JIDS[J I[jY[]T~<br />

6[EJ1EJ j 4~8urDI[JJ[JI[]y[JI[]J[EJIBl[JI[JrDllED(BI~1[Dli~ []<br />

TEJIEJj 50EJuJ[ 57 lID§DO~DObJu<br />

~<br />

~<br />

~<br />

o<br />

~<br />

"'"t<br />

Q..<br />

o_.<br />

~<br />

NOTE<br />

1 NOMENCLATURE IS ON BOTH TOP ANO FRONT FACE OF KEYBUTTON AS SHOWN.<br />

THE NUMBER TO THE UPPER LEFT OESIGNATES THE BUTTON POSITION.<br />

Figure 6. KEYBOARD DIAGRAM<br />

) ) )


1<br />

2<br />

3<br />

4<br />

5<br />

6<br />

7<br />

8<br />

9<br />

10<br />

11<br />

12<br />

13<br />

14<br />

15<br />

16<br />

17<br />

18<br />

19<br />

20<br />

21<br />

22<br />

23<br />

24<br />

25<br />

26<br />

27<br />

28<br />

29<br />

30<br />

31<br />

32<br />

33<br />

34<br />

35<br />

36<br />

37<br />

38<br />

39<br />

40<br />

41<br />

42<br />

Table 1. Keyboard Scan Codes<br />

Key Position<br />

Scan Code in Hex<br />

01<br />

02<br />

03<br />

04<br />

05<br />

06<br />

07<br />

08<br />

09<br />

OA<br />

OB<br />

OC<br />

00<br />

OE<br />

OF<br />

10<br />

11<br />

12<br />

13<br />

14<br />

15<br />

16<br />

17<br />

18<br />

19<br />

1A<br />

1B<br />

1C<br />

10<br />

1E<br />

1F<br />

20<br />

21<br />

22<br />

23<br />

24<br />

25<br />

26<br />

27<br />

28<br />

29<br />

2A<br />

Key Position<br />

43<br />

44<br />

45<br />

46<br />

47<br />

48<br />

49<br />

50<br />

51<br />

52<br />

53<br />

54<br />

55<br />

56<br />

57<br />

58<br />

59<br />

60<br />

61<br />

62<br />

63<br />

64<br />

65<br />

66<br />

67<br />

68<br />

69<br />

70<br />

71<br />

72<br />

73<br />

74<br />

75<br />

76<br />

77<br />

78<br />

79<br />

80<br />

81<br />

82<br />

83<br />

Scan Code in Hex<br />

2B<br />

2C<br />

20<br />

2E<br />

2F<br />

30<br />

31<br />

32<br />

33<br />

34<br />

35<br />

36<br />

37<br />

38<br />

39<br />

3A<br />

3B<br />

3C<br />

3D<br />

3E<br />

3F<br />

40<br />

41<br />

42<br />

43<br />

44<br />

45<br />

46<br />

47<br />

48<br />

49<br />

4A<br />

4B<br />

4C<br />

40<br />

4E<br />

4F<br />

50<br />

51<br />

52<br />

53<br />

2-17


Keyboard Interface Connector Specifications<br />

REAR PANEL<br />

5 PIN DIN CONNECTOR<br />

PIN<br />

SIGNAL<br />

1 + Keyboard Clock<br />

2 + Keyboard Data<br />

3 - Keyboard Reset (Not used by keyboard)<br />

4 Ground<br />

5 +5 Volts<br />

2-18


Cassette User Interface<br />

The cassette interface control is implemented in software. (See FIRM­<br />

WARE Section). An 825 3 timer output is used to control the data to the<br />

cassette recorder. This output exits the System Board, at the rear,<br />

through pin 5 of a DIN connector. The cassette input data is read by<br />

an 8255A-5 Programmable Peripheral Interface (PPI) input port bit.<br />

This signal is received through pin 4 of the cassette connector. Software<br />

algorithms are used to generate and read cassette data. The casette<br />

drive motor is controlled through pins 1 & 3 of the cassette connector.<br />

The motor on/off is controlled by an 8255A-PPI output port bit.<br />

(Port '61 H', bit 3). The 8255 A address and bit assignments are defined<br />

in the I/O Address Map page. On the following pages are read, write,<br />

and motor control block diagrams.<br />

Cassette Jumpers<br />

A 2x2 Berg Pin and Jumper are used on the cassette Data Out line.<br />

The jumper will allow the Data Out line to be used as a microphone<br />

input (75 mv.) when the jumper is placed across M and C pins. An<br />

auxiliary input is available when the jumper is placed across the A and<br />

C pins. The auxiliary input provides a .68 volt input to the recorder.<br />

Refer to System Board Component Diagram page (2-13) for cassette<br />

jumper location.<br />

JUMPER DIAGRAM<br />

M A M A<br />

Mike· 75 Mv.<br />

Aux·O.68V<br />

Circuit Block Diagrams<br />

GND<br />

+5V<br />

CASSETTE<br />

DATA IN<br />

RECORDER<br />

EARPHONE<br />

JACK<br />

SILICON<br />

GND DIODE<br />

VIR=,4V CATHODE<br />

GND<br />

Figure 7. CASSETTE INTERFACE READ HARDWARE<br />

2-19


+5V<br />

8253TIMER#2 to<br />

OUTPUT<br />

o<br />

74LS38<br />

OR<br />

3.9K OHM<br />

R<br />

0---------­<br />

.S78V<br />

TO AUX<br />

INPUT<br />

O------------------~•<br />

.075V<br />

TO MIC<br />

INPUT<br />

GND<br />

Figure 8. CASSETTE INTERFACE WRITE HARDWARE<br />

+5V<br />

I<br />

I +5V<br />

4.7<br />

KOHM SN75475 RELAY<br />

I<br />

+5V- CLAMP<br />

COIL<br />

S<br />

N/O<br />

74LS38 C~. CASSETTE<br />

VCC -<br />

MOTOR<br />

OR IN OUT COIL CONTROL<br />

MOTO~O<br />

ON<br />

o .---- VSS COM<br />

GNO<br />

Figure 9. CASSETTE MOTOR CONTROL<br />

2-20


Cassette Interface Connector Specifications<br />

REAR PANEL<br />

o<br />

5 PIN DIN CONNECTOR<br />

PIN SIGNAL ELECTRI CAL CHARACTE RISTICS*<br />

1 Motor Control Common from Relay<br />

2 Ground<br />

3 Motor Control 6 VDC; lA (Relay N.O.)<br />

4 Data In 500nA at ±13V - at 1,000 - 2,000 Baud<br />

5 Data Out (Mic or Aux) 250 JiA at<br />

} .68V<br />

or **<br />

75mv<br />

*All voltages and currents are maximum ratings and should not be exceeded_<br />

**Data out can be chosen using a jumper located on planar­<br />

(AUX -+ _68V or MIC -+ 75 mV). <br />

Interchange of these voltages on the cassette recorder could lead to damage<br />

of recorder inputs.<br />

2-21


Speaker Interface<br />

The sound system contains a small permanent magnet 2-1/4" speaker.<br />

The speaker can be driven from one or both of two sources. The<br />

sources are:<br />

1. An 8255A-5 PPI output bit. The address and bit are defined in<br />

the I/O Address Map pages 2-23 and 2-24. ~<br />

2. A timer Channel Clock out where the output is programmable<br />

within the functions ofthe 8253-5 timer with a 1.19 Mhz clock<br />

input. The timer gate is also controlled by an 8255A-5 PPloutput<br />

port bit. Address and bit assignment are in the I/O Address<br />

Map pages 2-23 and 2-24.<br />

PPI BIT 1,1/0 ADDR x'0061'<br />

1.19 MHz LOW<br />

TO<br />

,..--------, AND DRV PASS <br />

CLOCK <br />

SPEAKER<br />

TIMER CLKOUT 2<br />

FILTER<br />

IN 2<br />

PPI BIT 0, I/O ADDRESS X'0061'<br />

Figure 10. SPEAKER DRIVE SYSTEM BLOCK DIAGRAM<br />

Channel 2<br />

ITone generation for Speaker!<br />

GATE 2 - Controlled by 8255A-5 PPI Bit<br />

(See I/O Map)<br />

CLKIN2 -1.19318MhzOSC<br />

CLK OUT 2 - Used to drive Speaker<br />

- Used to write data on the Audio<br />

Cassette<br />

Speaker Connection - 4 Pin Berg Connector, Refer to<br />

System Board Diagram page 2-13 for speaker connection.<br />

PIN<br />

FUNCTION<br />

1 DATA<br />

2 KEY<br />

3 GROUND<br />

4 +5 VOLTS<br />

2-22


I/O Address Map <br />

HEX RANGE 9 8 7 6 5 4 3 2 1 0 DEVICE<br />

~O-OF 0 0 0 0 0 Z A3 A2 Al AO DMA CHIf' 8237-2<br />

20-21 0 0 0 0 1 Z Z Z Z AO INTERRUPT 8259A<br />

40-43 0 0 0 1 0 Z Z Z Al AO TtME R 8253-5<br />

60-63 0 0 0 1 1 Z Z Z Al AO PP18255A-5<br />

80-83 0 0 1 0 0 Z Z Z Al AO DMA PAGE REGS<br />

• AX 0 0 1 0 1 NMt MASK REG<br />

CX 0 0 1 1 0 RESERVED<br />

EX 0 0 1 1 1 RESERVED<br />

3F8-3FF 1 1 1 1 1 1 1 A2 Al AO TP RS-232-C CD<br />

3FO-3F7 1 1 1 1 1 1 0 A2 Al AD 51/4" DRV ADAPTER<br />

2F8-2FF 1 0 1 1 1 1 1 A2 Al AO RESERVED<br />

378-37F 1 1 0 1 1 1 1 Z Al AO PARALLEL PRTR PRT<br />

3DO-3DF 1 1 1 1 0 1 A3 A2 Al AO COLOR/GRAPHICS ADAPTER<br />

278-27F 1 0 0 1 1 1 1 Z Al AO RESERVED<br />

200-20F 1 0 0 0 0 0 A3 A2 Al AO GAME rio ADAPTER<br />

3BO-3BF 1 1 1 o 1 1 A3 A2 Al AO <strong>IBM</strong> MONOCHROME DISPLAY<br />

PARALLEL PRINTER ADAPTER<br />

Z =Don't Care, i.e., Not in Decode<br />

* At power on time, the Non Mask Interrupt NMI into the 8088 is masked off. This<br />

mask bit can be set and reset via system software as follows:<br />

Set mask: write X'80' to I/O Address X'AO' (enable NMI)<br />

Clear mask: wfite X'OO' to I/O Address X'AO' (disable NMI)<br />

2-23


I/O Address Map <br />

PAO +KBD SCAN CODE IPL 51/4 DISKETTE DRIVE (SW1-1) <br />

I 1 RESERVED (SW1-2) <br />

N 2 SYS. BD. READ/WRITE MEMORY SIZE • (SW1-3) <br />

X'OOSO' P 3 3 SYS. BD. READ/WRITE MEMORY SIZE • (SW1--4) <br />

U 4 4 OR +DISPLAY TYPE 1 (SW1-5) <br />

T 5 5 +DISPLAY TYPE 2 (SW1-6) <br />

6 6 NO. OF 5 1/4 0 RVS (SW1-7) <br />

7 7 NO. OF 51/4 DRVS (SW1-8) <br />

PBO +TIMER 2 GATE SPEAKER<br />

0 1 +SPEAKER DATA<br />

U 2 +(READ READ/WRITE MEMORY SIZE) OR (READ SPARE KEY)<br />

X'OOSJ' T 3 +CASSETTE MOTOR OFF<br />

P 4 -ENABLE READ/WRITE MEMORY<br />

U 5 -ENABLE I/O CH CK<br />

T S -HOLD KBD CLK LOW<br />

7 -(ENABLE KBD) OR + (CLR KBD & ENABLE SENSE SW'S)<br />

<strong>PC</strong>O I/O READiWRITE MEMORY (SW2-n]- ] [ SPARE KEY (SW2-5)<br />

I 1 I/O READiWRITE MEMORY (SW2-2) BINARY OR<br />

N 2 I/O READiWRITE MEMORY (SW2-3) VALUE<br />

X'0062' P 3 I/O REAOiWRITE MEMORY (SW2-4) X 32KB<br />

U 4 +CASSETTE DATA IN<br />

T 5 +TIMER CHANNEL 2 OUT<br />

6 +1/0 CHANNEL CHECK<br />

7 +READiWRITE MEMORY <strong>PC</strong>K<br />

X'0063'<br />

CMD/MODE REGISTER<br />

MODE REG VALUE 7 6 4 3 o<br />

1 0 1 1 o 1<br />

X'99'<br />

PA3 PA2 AMOUNT OF MEMORY <br />

SW1-4 SW1-3 LOCATED ON SYS. BD. <br />

o o 16K BYTES <br />

o 1 32K BYTES <br />

1 o 48K BYTES <br />

1 1 64K BYTES <br />

PA5 PA4 TYPE OF DISPLAY <br />

SW1-S SW1-5 <br />

o o RESERVEO <br />

o 1 COLOR CARD 40X25 (BW MODE)<br />

o<br />

COLOR CARD 80X25 (BW MODE)<br />

1 <strong>IBM</strong> MONOCHROME DISPLAY (80 X 25)<br />

PA7 PAS NUMBER OF 5-1/4" DRIVES <br />

SW1-8 SW1-7 IN SYSTEM <br />

o o 1<br />

o<br />

8255A - I/O BIT MAP<br />

2 <br />

3 <br />

4 <br />

NOTE: PA bit=O implies switch "ON".<br />

PA bit=1 implies switch "OFF".<br />

2-24


System Memory Map <br />

X'OOOOO'<br />

16 TO 64KB<br />

ON SYSTEM<br />

BOARD<br />

I/O CHANNEL<br />

ADDED MEM<br />

MAX 192KB<br />

384K MEMORY <br />

FUTURE <br />

EXPANSION<br />

265KB R/W MEMORY<br />

PRESENT<br />

SYSTEM<br />

MAX MEMORY<br />

FUTURE<br />

EXPANSION<br />

3/4 MEG<br />

MEMORY<br />

ADDRESS<br />

SPACE<br />

128KB<br />

128KB RESERVED<br />

GRAPHIC/DISPLAY<br />

BUFFER<br />

EXPANSION <br />

MEMORY <br />

216KB <br />

256KB ROM<br />

AD 0 R ESS<br />

SPACE<br />

X'FFFFF'<br />

40KB <br />

BASE SYSTEM <br />

ROM <br />

Figure 11. SYSTEM MEMORY MAP<br />

2-25


System Memory Map (Increments of 16KB) <br />

START ADDRESS:<br />

DECIMAL HEX<br />

0 00000<br />

16K 04000<br />

32K 08000<br />

48K OCOOO<br />

64K<br />

80K<br />

96K<br />

l12K<br />

128K<br />

144K<br />

160K<br />

178K<br />

192K<br />

208K<br />

224K<br />

240K<br />

256K<br />

272K<br />

288K<br />

304K<br />

320K<br />

336K<br />

352K<br />

368K<br />

384K<br />

400K<br />

416K<br />

432K<br />

448K<br />

464K<br />

480K<br />

496K<br />

512K<br />

528K<br />

544K<br />

560K<br />

576K<br />

592K<br />

608K<br />

624K<br />

10000 <br />

14000 <br />

18000 <br />

lCOOO <br />

20000 <br />

24000 <br />

28000 <br />

2COOO <br />

30000 <br />

34000 <br />

38000 <br />

3COOO <br />

40000 <br />

44000 <br />

48000 <br />

4COOO <br />

50000 <br />

54000 <br />

58000 <br />

5COOO <br />

60000 <br />

64000 <br />

68000 <br />

6COOO <br />

70000 <br />

74000 <br />

78000 <br />

7COOO <br />

80000 <br />

84000 <br />

88000 <br />

8COOO <br />

90000 <br />

94000 <br />

98000 <br />

geooo <br />

FUNCTION:<br />

16-64 KB READIWRITE MEMORY<br />

ON SYSTEM BOARD<br />

UP TO 192 KB<br />

MEMORY IN I/O<br />

CHANNEL<br />

384 KB FUTURE<br />

R/W MEMORY EXPANSION<br />

IN I/O CHANNEL<br />

Figure 12. SYSTEM MEMORY MAP (INCREMENTS OF 16KB) (SHEET 1 OF 2) <br />

2-26


System Memory Map Cont. <br />

START ADDRESS:<br />

DECIMAL HEX<br />

FUNCTION:<br />

640K AOOOO RESERVED<br />

656K MOOO<br />

672K A8000<br />

688K ACOOO 112 KB<br />

704K BOOOO MONOCHROME GRAPHICS/DISPLAY<br />

VIDEO BUFFER<br />

720K B4000<br />

736K B8000 COLOR/GRAPHICS<br />

752K<br />

768K<br />

784K<br />

800K<br />

816K<br />

BCOOO<br />

COOOO<br />

C4000<br />

C8000<br />

CCOOO<br />

832K 00000<br />

848K 04000 192 KB MEMORY<br />

864K 08000 EXPANSION AREA<br />

880K OCOOO<br />

896K<br />

912K<br />

928K<br />

944K<br />

EOOOO<br />

E4000<br />

E8000<br />

ECOOO<br />

960K FOOOO RESERVED<br />

976K<br />

992K<br />

1.008M<br />

F4000<br />

F8000<br />

FCOOO<br />

48 KB BASE<br />

SYSTEM ROM<br />

Figure 12. SYSTEM MEMORY MAP (16KB) (SHEET 2)<br />

2-27


System Board and Memory<br />

Expansion Switch Settings<br />

On the following four pages are graphic illustrations of switch settings. <br />

These are necesary for the system to address components attached, ~<br />

and to specify the amount of memory installed both on the System <br />

Board and in the System Expansion Slots. Refer to the System Board <br />

Component Diagram (page 13) for DIP switch locations. <br />

SWITCH 1<br />

o 1 2 3 4 5 6 7 8 1'\<br />

rD~DDDDDD<br />

POSITION<br />

FUNCTION<br />

1-7-8 NUMBER OF 5%" DISKETTE DRIVES INSTALLED; PAGE 2-29<br />

2 UNUSED-MUST BE ON (RESERVED FOR CO-PROCESSOR)<br />

3-4 AMOUNT OF MEMORY ON SYSTEM BOARD; PAGE 2-30<br />

5-6 TYPE OF MONITOR YOU ARE USING; PAGE 2-29<br />

SWITCH 2<br />

o 1 2 3 4 5 6 7 8 1\<br />

fDDDD~~~~<br />

2-28<br />

POSITION<br />

FUNCTION<br />

1-2-3-4 AMOUNT OF MEMORY OPTIONS INSTALLED; PAGE 2-30<br />

5-6-7-8 ALWAYS IN THE OFF POSITION<br />

\


5-1/4" Diskette Drives Switch Settings <br />

SWITCH 1<br />

1-0RIVE fwnnnOD[jrJ<br />

12345678<br />

2-0RIVES<br />

12345678<br />

f ~DDDDD~u<br />

'"'''' t~OODnO~~<br />

Monitor Type Switch Settings<br />

NONE<br />

SWITCH 1<br />

f nOOD~~OO<br />

COLOR/GRAPHICS<br />

MONITOR<br />

ADAPTER<br />

i<br />

2 8<br />

(40 x 251-TELEVISION ~ 0'003 04<br />

nril070<br />

OR MONITOR ~U<br />

NOTE: SOME TELEVISIONS AND MONITORS OPERATED<br />

IN (80 x 251 MOOE MAY HAVE CHARACTER LOSS_<br />

2-29


System Board Memory Switch Settings <br />

SWITCH 1 SWITCH 2<br />

12345678 12345678<br />

32KB tDOWLJDDDD tu[j[j~DDDD <br />

'"'" tOO~DODDO t~~~~oom <br />

64KB tODW~OOOO<br />

r~~~~OOOD <br />

96 KB<br />

rDDW~DDDD<br />

12345678 12345678<br />

t~ulj[jDDDD <br />

12345678 12345678<br />

128 KB tDO~~DDDD t[j~[j[jDDDlJ <br />

160 KB tOD~WOOUO<br />

t~a~~OODU<br />

"'" tmw~oouo<br />

t~~w~mm<br />

224 KB tnD~WOOOO<br />

256KB tDU~OOOOC<br />

r~~W~ODOO <br />

~~ "------.--------"<br />

t~~~~DOOD <br />

2-30


32/64KB Memory Expansion Option <br />

Switch Settings <br />

Note: Positions 6-7-8 must always be ON. The sequence shown<br />

below must be followed to allow the system to address the<br />

~ memory properly.<br />

32 KB<br />

12345678<br />

96 KB t~LJu~LJDDD<br />

128 KB t~~~~~ooo<br />

64 KB<br />

32 KB 32 KB<br />

64KB<br />

32KB<br />

32 KB 32 KB 32 KB<br />

12345678 12345678 12345678<br />

160 KB<br />

t[j[j[j~[jDDD t [j[j[j~~DDD t[j[j~[1uDDD<br />

64 KB 64 KB<br />

12345678 12345678<br />

192 K8 t[jLJLJ~[jDDD t [jLJ~LJ[jDDD<br />

64 KB 32 KB 32 KB<br />

12345678 12345678 12345678<br />

192 KB<br />

tLJ[j~~[jDOD t[j[j~~[jDDD t[j~~[j~DDO<br />

64 KB 64 KB 32 KB<br />

12345678 12345678 12345678<br />

224 KB<br />

tu~[j~[jDDD t[j~~~~DDD t~~~~uDDD<br />

64 KB 64 KB 64 KB<br />

2-31


2-32 <br />

NOTES


Power Supply<br />

The system DC power supply is a 63.5 watt, 4 voltage level switching<br />

regulator. It is integrated into the System Unit and supplies power for<br />

the System Unit, its options, and the keyboard. The supply provides 7<br />

amps of+5 Vdc, +5% 2 amps of +12Vdc, +5% 300 rna of -5Vdc,<br />

~+IO% and 250 rna of-12 Vdc, +10%. All power levels are regulated<br />

with overvoltage and over current protection. The input is 120 Vac and<br />

fused. DC over-load or over-voltage conditions exist, the supply will<br />

automatically shut down until the condition is corrected. The supply is<br />

designed for continuous operation at 63.5 watts.<br />

The System Board takes approximately 3 amps of +5 V dc thus<br />

allowing approximately 4 amps of 5 V dc for the adapters in the System<br />

Expansion Slots. The + 12 V dc power level is designed to power the<br />

two internal 5-1/4" Diskette Drives and the system's dynamic<br />

memory. Itis assumed that only one drive motor is active at a time. The<br />

- 5 V dc level is used for memory bias voltage and analog circuits in<br />

the diskette adapter phase lock loop. The +12 V dc and -12 V dc are<br />

used for powering the serial interface card EIA drivers and receivers<br />

for the Asynchronous Communications Adapter. All four power levels<br />

are bussed across the five System Expansion Slots and available<br />

for option adapter.<br />

~<br />

The <strong>IBM</strong> Monochrome Display is self-powered. However, the high<br />

resolution display receives its AC power from the System Unit power<br />

system. It is switched on and off with the power switch, which saves a<br />

wall outlet. The AC output for the display is a nonstandard connector,<br />

so only the AC high resolution Display can use this AC port.<br />

2-33


Power Supply Location<br />

The Power Supply is located at the right rear area ofthe System Unit. It<br />

supplies operating voltages to the System Board, <strong>IBM</strong> Monochrome<br />

Display, annd provides two seperate connections for power to the 5­<br />

1/4" Diskette Drives (if installed). The nominal power requirements<br />

and output voltages are listed on the following tables:<br />

r"\<br />

Input Requirements<br />

Voltage <br />

VOLTAGE @ 60 Hz <br />

NOMINAL MINIMUM MAXIMUM <br />

Vac Vac Vac <br />

120 104 127 <br />

Frequency <br />

60 Hz +/- .5 Hz <br />

Current <br />

DC Output<br />

2.5 AMPS MAX @ LOW LINE INPUT<br />

VOLTAGE OF 120 VAC 60 HZ<br />

VOLTAGE CURRENT REGULATION <br />

Vdc AMPS TOLERANCE <br />

NOMINAL MIN MAX ±% -%<br />

+ 5.0 2.3 7.0 5 4 <br />

- 5.0 0.0 0.3 10 8 <br />

+12.0 0.0 2.0 5 4 <br />

-12.0 0.0 0.25 10 9 <br />

AC Output<br />

VOLTAGE CURRENT VOLTAGE <br />

Vac AMPS LIMITS Vac <br />

NOMINAL MIN I<br />

MAX MIN I MAX<br />

120.0 0.0 I .75 101.0 I 130.0<br />

2-34


N<br />

I<br />

~<br />

VI<br />

) <br />

§<br />

I •<br />

\.<br />

~<br />

o el<br />

so.<br />

0..<br />

'"I -.<br />

00 00 ~<br />

. ....<br />

~<br />

...,­<br />

::s<br />

::T'N<br />

CD "0 :><br />

"0 -. r.n<br />

-.::s r.n ....<br />

~ 8 OQ<br />

o ~<br />

::scr ::s<br />

l:li o 9<br />

~§<br />

~<br />

~ ::s ::s<br />

g.~<br />

::s S<br />

00 '"I<br />

~<br />

­


Important Operating Characteristics<br />

Over Voltage/Current Protection<br />

PRIMARY (INPUT)<br />

VOLTAGE<br />

NOMINAL<br />

VAC<br />

TYPE PROTECTION<br />

RATING<br />

AMPS<br />

120 60 Hz FUSE TYPE 2 SOC SD4 2AMPS<br />

Power On/Off Cycle: When the supply is turned off for a maximum of<br />

5 seconds, and then turned on, the power good signal will be<br />

regenerated.<br />

Signal Requirements<br />

The power good signal indicated that there is adequate power to<br />

continue processing. If the power goes below the specified levels,<br />

the power good signal triggers a system shut-down.<br />

The Power Supply. Provides a power good signal out, to indicate the<br />

presence ofthe +/-5V and +/-12Voutputs are above the sense level<br />

defined in the chart below, the power good signal is an up level (2.4V to<br />

5 .5V), TTL compatible and capable of sourcing 60 VA. When any of<br />

the four sensed output voltages is below its sense level voltage as<br />

defined in the chart below, the power good signal is down level (OV to<br />

O.4V), TTL compatible and capable of sinking 500 VA. The power<br />

good signal (after all levels of the output voltage are good) has a turn<br />

on delay of 100 MS, but no greater than 500 MS.<br />

The sense levels of the +/-5V and +/-12V outputs are:<br />

"'"<br />

OUTPUT<br />

MIN<br />

SENSE VOLTAGE<br />

NOMINAL<br />

MAX<br />

+5V +3.7 +4.0 +4.3<br />

-5V -3.7 -4.0 -4.3 <br />

+12V +8.5 +9.6 +10.5 <br />

-12V -8.5 -9.6 -10.5 <br />

2-36


<strong>IBM</strong> Monochrome Display and Parallel<br />

Printer Adapter<br />

This adapter has dual functions. The first is to provide the interface to<br />

the <strong>IBM</strong> Monochrome Display. The second function is a parallel<br />

,~interface for the <strong>IBM</strong> 80 CPS Matrix Printer.<br />

The monitor interface is designed around the Motorola 6845 CRT<br />

Controller module. There are 4K bytes of static memory on the card<br />

which are used for the display buffer. The memory is dual ported and<br />

may be accessed directly by the CPU. No parity is provided on the<br />

display buffer. A block diagram of the Monochrome Display function<br />

in on page 2-38.<br />

The characteristics of the design are listed below:<br />

• 80x25 Screen<br />

• Direct Drive Output<br />

• 9x14 Character Box<br />

• 7x9 Character<br />

• 18 Khz Monitor<br />

• Character Attributes<br />

~ The adapter supports 256 character codes. An 8K byte character<br />

generator contains the fonts for the character codes. The characters,<br />

values, keystrokes and screen characteristics are tabled in Appendix<br />

C. Of Characters, Keystrokes and Color.<br />

Note: This Adapter when used with a display containing P39<br />

Phospor, will not support a light pen!<br />

Parallel Interface Description<br />

This topic is discussed in full on pages 2-65 through page 2-69.<br />

2-37


<strong>IBM</strong> Monochrome Display Adapter Block Diagram <br />

-<br />

(10) (10) •<br />

(12)<br />

CPUADDR MEMORY 2K MEMORY<br />

(11) ADDRESS ,...- CHARACTER<br />

,--. MUX CODE<br />

2KMEMORY<br />

ATTRIBUTE<br />

CPUDATA<br />

BDO-7<br />

DATA<br />

BUS<br />

GATING<br />

-<br />

(8)<br />

(8)<br />

,<br />

CHARACTER<br />

(8) ~LOCI<br />

OCTAL<br />

r<br />

.Ir<br />

OCTAL<br />

MA LATCH LATCH<br />

1 ~ ~<br />

RA CHARACTER<br />

ATTRIBUTE<br />

~ GENERATOR DECODE<br />

AD ~ MC6845 <br />

CHIP <br />

~ CRTC<br />

(4)<br />

SELECT DOTCLK , <br />

TIMING ~ <br />

SIGNALS<br />

SHIFT <br />

REGISTER <br />

I 1<br />

SDOTS<br />

r<br />

HSYNC, VSYNC, CURSOR, DISPEN<br />

.<br />

CHARACTER<br />

CLOCK<br />

I<br />

VIDEO<br />

PROCESS<br />

LOGIC<br />

~<br />

MONITOR<br />

DIRECT DRIVE<br />

OUTPUTS<br />

Figure 14. <strong>IBM</strong> MONOCHROME DISPLAY ADAPTER BLOCK DIAGRAM<br />

2-38


System Channel Interface<br />

Lines Used<br />

This card uses the address and data bus, memory and I/O read/write<br />

signals, reset, I/O Ready, I/O Clock, and IRQ7.<br />

"...-....., Loads<br />

Where possible, only one "LS" load is on the signals present at the<br />

I/O slot. Some of the address bus lines have two "LS" loads. No<br />

signal has more than two "LS" loads.<br />

Special Timing<br />

At least one wait state will be inserted on all memory and I/O accesses<br />

from the CPU. The duration of the wait-state will vary because the<br />

CPU/monitor access is synchronized with the character clock on<br />

this adapter.<br />

To insure proper initialization of the attachment, the first instruction<br />

issued to the card must be to set the high resolution bit of the monitor<br />

output Port 1. (OUT PORT 3B8 = OlR). A CPU access to this<br />

adapter must never occur if the high resolution bit is not set.<br />

"...-....., System configurations which have two display adapter cards must<br />

insure that both adapters are properly initialized after a power on<br />

reset. Damage to either display may occur if not properly initialized.<br />

Data Rates<br />

For the <strong>IBM</strong> Monochrome Display Adapter, two bytes are fetched<br />

from the display buffer in 553 ns providing a data rate of 1.8M<br />

bytes/second.<br />

Interrupt and DMA Response Requirements<br />

• The display buffer can be written into, or read from using DMA.<br />

• The parallel interface uses the +IRQ7 line. Interrupt becomes<br />

active when the acknowledge input is low, and interrupts are<br />

enabled via the control port.<br />

2-39


Modes of Operation<br />

The <strong>IBM</strong> Monochrome Display and Printer Adapter supports 256<br />

character codes. In the character set are alphanumerics and block<br />

graphics. Each character in the display buffer has a corresponding<br />

character attribute. The character code must be an even address and the<br />

attribute code must be an odd address in the display buffer. ,.............,<br />

7 6 5 4 3 2 o<br />

7 6 5 4 3 2 0<br />

BL R I R B<br />

CHARACTER CODE<br />

EVEN ADDRESS (M)<br />

ATTRIBUTE CODE<br />

I G I B I I G ODD ADDRESS (M+l)<br />

I<br />

I ..<br />

FOREGROUND<br />

~<br />

: INTENSITY<br />

BACKGROUND<br />

~<br />

... BLINK<br />

The adapter decodes the character attribute byte as defined above. The ,.............,<br />

BLINK and INTENSITY bits may be combined with the FORE­<br />

GROUND and BACKGROUND bits to further enhance the character<br />

attribute functions listed below.<br />

BACKGROUND FOREGROUND FUNCTION <br />

R G B<br />

R G B <br />

0 0 0 0 0 0 NON DISPLAY <br />

0 0 0 0 0 1 UNDERLINE <br />

0 0 0 1 1 1 WHITE CHARACTER/ <br />

BLACK BACKGROUND <br />

1 1 1 000 REVERSE VIDEO <br />

2-40


Programming Considerations<br />

Programming the 6845 CRT Controller<br />

The following table summarizes the 6845 Internal Data Registers and<br />

their functions and parameters. For the <strong>IBM</strong> Monochrome Display,<br />

r--.., the values in the table must be programmed into the 6845 to insure<br />

proper initialization of the device.<br />

Table 2. 6845 INITIALIZATION PARAMETERS<br />

REGISTER REGISTER PROGRAM 80x25<br />

# FILE UNIT MONOCHROME<br />

RO HORIZONTAL TOTAL CHARACTERS 61H<br />

Rl HORIZONTAL OISPLAYED CHARACTERS 50H<br />

R2 HSYNC POSITION CHARACTERS 52H<br />

R3 HSYNC WIDTH CHARACTERS FH<br />

R4 VERTICAL TOTAL CHAR ROWS 19H<br />

R5 VTOTAL ADJUST SCAN LINE 6H<br />

R6 VERTICAL DISPLAYED CHAR ROW 19H<br />

R7 VSYNC POSITION CHAR ROW 19H<br />

RS INTERLACE MODE --- 02<br />

R9 MAX SCAN LINE ADDRESS SCAN LINE DH<br />

R10 CURSOR START SCAN LINE BH<br />

Rll CURSOR END SCAN LINE CH<br />

R12 START ADDRESS (H) --- DOH<br />

R13 START ADDRESS (L) --- DOH<br />

R14 CURSOR (H) --- DOH<br />

R15 CURSOR (L) --- DOH<br />

R16 RESERVED --- --­<br />

R17 RESERVED --- --­<br />

Sequence of Events<br />

The first command issued to this attachment must be to output to<br />

PORT 3B8, hex 01, to set high resolution mode. Ifthe high resolution<br />

mode is not set, an infinite CPU wait-state will occur!<br />

Memory Requirements<br />

The attachment has 4K bytes of memory which is used for the display<br />

buffer. The memory supports one screen of 25 rows of 80 characters,<br />

plus a character attribute for each display character. No parity is<br />

provided on the memory. No system Read/Write memory is required<br />

for the monochrome adapter portion. The display buffer starts at<br />

address 'BOOOO'.<br />

2-41


DMA Channels<br />

The display buffer will support a DMA operation, however CPU<br />

wait-states will be inserted during DMA.<br />

Interrupt Levels<br />

Interrupt Level 7 is used on the parallel interface. Interrupts can be<br />

enabled or disabled via the Printer Control Port. The interrupt is a high<br />

level active signal.<br />

I/O Address and Bit Map<br />

The table below breaks down the functions ofthe I/O Address decode<br />

for the card. The I/O address decode is from '3BO' through '3BF'.<br />

The bit assignment for each I/O address follows:<br />

I/O Address Function<br />

3BO Not Used<br />

3Bl Not Used<br />

3B2 Not Used<br />

3B3 Not Used<br />

3B4 6845 Index Register<br />

3B5 6845 Data Register -.<br />

3B6 Not Used r ,<br />

3B7 Not Used<br />

3B8 CRT Control Port 1<br />

3B9 Reserved<br />

3BA CRT Status Port<br />

3BB Reserved<br />

3BC Parallel Data Port<br />

3BD Printer Status Port<br />

3BE Printer Control Port<br />

3BF Not Used<br />

The 6845 Index and Data Registers are used to program the CRT<br />

controller to interface to the high resolution Monochrome Display.<br />

• CRT Output Port 1 (I/O Address '3B8') <br />

Bit :#= Function <br />

+high resolution mode <br />

2-42<br />

o<br />

1 Not used <br />

2 Not used <br />

3 + video enable <br />

4 Not used <br />

5 + enable blink <br />

6,7 Not used


• CRT Status Port (I/O Address '3BA')<br />

Bit Function<br />

o + Horizontal Drive<br />

1 Reserved<br />

2 Reserved<br />

3 +B/W Video<br />

<strong>IBM</strong> Monochrome Display<br />

The high resolution <strong>IBM</strong> Monochrome Display unit attaches to the<br />

System Unit via two cables of approximately 3' (914 mm) in length.<br />

One cable is a signal cable which contains direct drive interface from<br />

the <strong>IBM</strong> Monochrome Display and Printer Adapter.<br />

The second cable provides AC power to the display from the System<br />

Unit. This allows the System Unit power ON/OFF switch to also<br />

control the display unit. An additional benefit is a reduction in the<br />

requirements for wall outlets to power the system. The monitor<br />

contains an 12" (305 mm) diagonal 90° deflection CRT. The CRT and<br />

analog circuits are packaged in an enclosure so the display may either<br />

sit on top ofthe System Unit or on a nearby table top or desk. The unit<br />

has both brightness and contrast adjustment controls on the front<br />

~ available to the operator.<br />

Operating Characteristics<br />

Screen<br />

High persistance green phosphor (P 39) with an etched surface to<br />

reduce glare. Unit displays an 80 character by 25 line screen with a<br />

9 dot wide by 14 dot tall character box.<br />

Video Signal<br />

Maximum video bandwidth of 16.27 Mhz.<br />

Vertical Drive<br />

Screen refreshed at 50 Hz with 350 vertical lines of resolution and<br />

720 lines of horizontal resolution.<br />

~ Horizontal Drive<br />

Positive level TTL compatible frequency, 18.432 Khz.<br />

2-43


<strong>IBM</strong> Monochrome Direct Drive Interface<br />

and Pin Assignment<br />

REAR PANEL<br />

9 PIN "0"<br />

SHELL CONNECTOR~<br />

o<br />

1 • • 6<br />

· e·C3lW-~~ o<br />

~ 0~<br />

PARALLEL<br />

PRINTER<br />

ADAPTER<br />

• •<br />

: • 9<br />

<strong>IBM</strong><br />

Monochrome<br />

At Standard TTL Levels<br />

Ground 1<br />

Ground - 2<br />

Not Used 3<br />

Not Used 4<br />

Not Used 5<br />

<strong>IBM</strong> <br />

Monochrome <br />

Display and <br />

Display .... + Intensity 6 Parallel Printe <br />

.,<br />

.... + Video 7<br />

""<br />

""<br />

""<br />

.... + Horizontal 8<br />

.... - Vertical 9<br />

NOTE: Signal voltages are 0 - .6 Vdc at down level <br />

+5 Vdc at high level <br />

Adapter<br />

2-44


Color/Graphics Monitor Adapter<br />

The Color/Graphics Monitor Adapter is designed to attach a wide<br />

variety of TV frequency monitors and TV sets (user-supplied RF<br />

modulator required for TVs). It is capable of operating in black and<br />

~ white or color, and provides three video interfaces; a composite video<br />

port, a direct drive port, and connection interface for driving a user<br />

supplied RF modulator. In addition, a light pen interface is provided.<br />

The adapter has two basic modes of operation; alphanumeric (A/N)<br />

and all points addressable graphics (APA). Additional modes are<br />

available within NN and APA modes. In NN mode, the display can<br />

be operated in a 40x25 mode for low resolution monitor and TV s or<br />

80x25 mode for high resolution monitors. In both modes, characters<br />

are defined in an 8x8 box and are 5x7 with one line of descender for<br />

lowercase (both uppercase and lowercase characters are supported in<br />

all modes). In black and white mode, the character attributes ofReverse<br />

Video, Blinking and Highlighting are available. Incolor mode, there are<br />

16 foreground colors and 8 background colors available per character.<br />

In addition, blinking on a per character basis is available.<br />

The adapter card contains 16KB of storage; thus, for a 40x25 screen,<br />

1000 bytes are used to store character information and 1000 bytes are<br />

~ used for attribute/color information. This means that up to 8 pages of<br />

screens can be stored in the adapter memory. Similarly, in an 80x25<br />

mode, 4 pages of display screen may be stored in the adapter. The full<br />

16KB storage on the display adapter is directly addressable by the<br />

processor allowing maximum software flexibility in managing the<br />

screen. In NN color modes, it is also possible to select the screen<br />

border color. One of 16 colors may be selected.<br />

2-45


In APA mode, there are two resolutions available; 320x200 and<br />

640x200. In the 320x200, each (picture element) pel may have one of<br />

four colors. The background color (color 0) may be any of the 16<br />

possible colors. The remaining 3 colors come from one of the two<br />

software selectable palettes. One palette contains red/green/brown,<br />

the other contains cyan/magenta/white. ~<br />

The 640x200 mode is only available in black and white since the full<br />

16KB of storage is used to define the on or off state of the pel.<br />

The adapter operates in noninterlace mode at either 7 or 14 megahertz<br />

(Mhz) video bandwidth depending on the mode of operation selected.<br />

In NNmode, characters are formed from a ROM character generator.<br />

The character generator contains dot patterns for 256 characters.<br />

The character set contains the following major grouping of characters.<br />

Sixteen special characters for game support, 15 characters for support<br />

of word processing editing functions, the standard 96 ASCII graphic<br />

set, 48 characters to support foreign languages, 48 characters for<br />

business block graphics allowing drawing of charts, boxes and tables<br />

using single and double lines, 16 of the most often used Greek<br />

characters, and 15 ofthe most often used scientific notation characters.<br />

The Color/Graphics Monitor Adapter function is packaged on a single<br />

card which fits into one of the five System Expansions Slots on the<br />

System Board. The direct drive and composite video ports are rightangle<br />

mounted connectors at the rear ofthe adapter and extend through<br />

the rear panel of the System Unit.<br />

The display adapter is implemented using a Motorola 6845 CRT<br />

controller device. This adapter is highly programmable with respect to<br />

raster and character parameters. Thus, many additional modes are<br />

possible with clever programming of the adapter. A block diagram of<br />

the Color/Graphics Adapter is on the following page.<br />

r"'\<br />

2-46


CPU<br />

.. r--<br />

) ) )<br />

DISPLAY<br />

ADDRESS BUFFER INPUT<br />

CPU DATA ~<br />

ADDRESS LATCH (16K BUFFER <br />

BYTES) <br />

0<br />

""i<br />

l ~<br />

"'0<br />

OUTPUT<br />

::r'<br />

CPU 6845 <br />

DATA ~ CRTC <br />

ADDRESS DATA DATA<br />

~ LATCH I--<br />

LATCH LATCH<br />

4 I-- -.<br />

LATCH (")<br />

rIl<br />

a:<br />

0<br />

=-.<br />

i<br />

GRAPHICS<br />

f---.<br />

SERIALIZER<br />

CHARACTER<br />

GEN. I­<br />

SERIALIZER<br />

n<br />

-<br />

f---. ......<br />

f----. '"1<br />

f----.<br />

COLOR<br />

,---t ENCODER 0<br />

r-t<br />

><br />

ALPHA Q..<br />

f-----.<br />

ROS ~<br />

"'0<br />

......<br />

~<br />

PALETTEi ~ OVERSCAN '"1<br />

--"<br />

HORIZ.<br />

t:D<br />

L <br />

VERT. <br />

-0<br />

(")<br />

COMPOSITE <br />

COLOR ~ <br />

TIMING f--+<br />

MODEl GENERATOR<br />

4 GENERATOR<br />

CONTROL<br />

& CONTROL ~ _.<br />

N Figure 15. COLOR/GRAPHICS MONITOR ADAPTER BLOCK DIAGRAM<br />

I 3<br />

.....,J<br />

"'"<br />

3Y"MOY"H <br />

~<br />

(JQ<br />

'"1<br />

~<br />

0<br />

0


Major Components Definitions<br />

Motorola 6845 CRT Controller<br />

This device provides the necessary interface to drive a raster scan<br />

CRT.<br />

Mode Set And Status Registers<br />

This is a general purpose programmable I/O register. Ithas I/O points<br />

which may be individually programmed. Its function in this attachment<br />

is to provide mode selection (page 2-49 and 2-50) and color selection in<br />

the medium resolution color graphics mode (page 2-51.)<br />

Display Buffer<br />

The Display Buffer resides in the CPU address space starting at<br />

address X'B8000'. It provides 16K bytes of dynamic read/write<br />

memory. A dual-ported implementation allows the CPU and the<br />

graphics control unit to access this buffer. The CPU and the CRT<br />

control unit have equal access to this buffer during all modes of<br />

operation except in high resolution alphanumeric mode. In this mode<br />

the CPU should access this buffer during the horizontal retrace<br />

intervals. The CPU may however, write to the required buffer at any<br />

time, but a small amount of display fetches will result if not during<br />

retrace intervals.<br />

Character Generator<br />

This attachment utilizes a ROM character generator. It consists of 8K<br />

bytes of storage which cannot be read/written under software control.<br />

This is a general purpose ROM character generator with three different<br />

character fonts. Two character fonts are used on this card (a 7x7 double<br />

dot and 5x7 single dot), selected by a card jumper. No jumper gives a<br />

7x7 double dot, with a jumper a single'dot font is selected.<br />

Timing Generator<br />

This block generates the timing signals used by the 6845 CRT <br />

controller and by the dynamic memory. It also resolves the CPU/ <br />

graphic controller contentions for accessing the Display Buffer. <br />

Composite Color Generator <br />

The logic in this block generates base band video color information. <br />

2-48


Modes of Operation<br />

There are two basic modes of operation, 'Alphanumeric' and<br />

'Graphics'. Each of these modes provide further options in both color<br />

and black-and-white. The following text describes each mode of<br />

operation.<br />

~<br />

Alphanumeric Mode<br />

Alphanumeric Display Architecture<br />

Every display character position is defined by two bytes in the regen<br />

buffer (part ofdisplay adapter, not system memory). Both the color and<br />

the black and white display adapter use this 2 byte character/attribute<br />

format.<br />

DISPLAY CHAR CODE BYTE<br />

ATTRIBUTE BYTE<br />

6 5 4 3 6 4<br />

Attribute Byte Definition<br />

ATTRIBUTE BYTE<br />

765 4 3 2 o<br />

B R G B I R G B<br />

ATTRIBUTE FUNCTION FG BACKGROUND FOREGROUND<br />

NORMAL B 0 0 0 I 1 1 1<br />

REVERSE VIDEO B 1 1 1 I 0 0 0<br />

NON DISPLAY (BLK) B 0 0 0 I 0 0 0<br />

NON DISPLAY (WHITE) B 1 1 1 I 1 1 1<br />

I = HIGH LIGHT FOREGROUND (CHAR) <br />

B= BLINK FOREGROUND (CHAR) <br />

Color TV<br />

• Display up to 25 rows of 40 characters each<br />

• Maximum of 256 characters<br />

• Requires 2000 bytes of Read/Write Memory (on the adapter)<br />

• 8x8 character box<br />

• 7x7 double dotted characters (one descender)<br />

• Character attributes (one for each character)<br />

2-49


7 6 543 2 1 0 76543210 <br />

CHARACTER CODE<br />

I<br />

ATTRIBUTE CODE<br />

EVEN ADDRESS (M) ODD ADDRESS (M+1)<br />

ATTRIBUTE BYTE DEFINITIONS<br />

R: Red 7 6 5 4 3 2 o<br />

G: Green<br />

B: Blue<br />

I: Intensity<br />

B I I R G BI<br />

I<br />

Foreground Color<br />

Background Color<br />

Blinking<br />

Note: The starting address of the display buffer must be an<br />

even location.<br />

Color Monitor (with Direct Drive input capability)<br />

Display up to 25 rows of 80 characters each<br />

Requires 4000 bytes of Read/Write Memory (on the adapter)<br />

Maximum of 256 character set<br />

8x8 character box<br />

7x7 character with one descender<br />

Same format for attributes as for color TV<br />

Note: The starting address of the display buffer must be an<br />

even location.<br />

r"'\<br />

2-50


<strong>IBM</strong> Monochrome Display Adapter V s. Color/<br />

Graphics Adapter Attribute Relationship<br />

Table 3. Monochrome Vs Color/Graphics Attributes<br />

ON THE<br />

ON THE<br />

MONOCHROME COLOR/GRAPHIC<br />

7 6 5 4 3 Z 1 0 DISPLAY ADAPTER DISPLAY ADAPTER<br />

B R G B I R G B CHAR. ! BKGD. CHAR. BKGD.<br />

COLOR I COLOR COLOR COLOR<br />

FG BACKGROUND FOREGROUND<br />

NORMAL B 0 0 0 I 1 1 1 WHITE BLACK WHITE BLACK<br />

RVV B 1 1 1 I 0 0 0 BLACK WHITE BLACK WHITE<br />

NON DISP (BLKI B 0 0 0 I 0 0 0 BLACK BLACK BLACK BLACK<br />

NON DISP (WHTI B 1 1 1 I 1 1 1 WHITE WHITE WHITE WHITE<br />

ALL OTHER CODES ALL OTHER ALL OTHER<br />

DEFINE FOREGROUND CODES RESULT CODES CHANGE<br />

BACKGROUND COLOR IN WHITE FOREGROUND<br />

COMBINATIONS CHAR ON BLACK BACKGROUND<br />

BACKGROUND COLOR TO<br />

SELECTED<br />

VALUE<br />

G * CODE WRITTEN WITH AN UNDERLINE <br />

ATTRIBUTE FOR THE <strong>IBM</strong> MONOCHROME DISPLAY <br />

BLACK WHEN EXECUTED ON A COLOR/GRAPHICS ADAPTER <br />

1 BLUE WILL RESULT IN A BLUE CHARACTER <br />

0 GREEN WHERE THE UNDERLINE ATTRIBUTES <br />

1 CYAN ARE ENCOUNTERED. <br />

0 REO <br />

1 MAGENTA CODE WRITTEN ON A COLOR/GRAPHICS ADAPTER <br />

0 YELLOW WITH BLUE CHARACTERS, WILL BE <br />

WHITE DISPLAYED AS WHITE CHARACTERS <br />

ON BLACK BACKGROUND WITH A <br />

* AN ADDITIONAL WHITE UNDERLINE ON THE MOI~OCHROME DISPLAY<br />

8 COLOR (ACTUAL) <br />

DIFFERENT SHADES <br />

OF THE ABOVE) <br />

ARE SELECTED BY <br />

SETTING THE <br />

(II BIT <br />

Note: Not all Monitors Recognize the (1) Bit<br />

Table 4. Color/Graphics Modes<br />

HORIZONTAL VERTICAL NO OF COLORS<br />

(lNCl. BACKGROUND COLOR)<br />

LOW RES 160 100 16 (INCLUDES BLACK AND<br />

WHITE)<br />

MED RES 320 200 4 COLORS: 1 OF 16 FOR<br />

BACKGROUND PLUS GREEN,<br />

REO, YELLOW OR CYAN,<br />

MAGENTA, WHITE<br />

HIGH RES 640 200 B&WONLY<br />

2-51


1. Low resolution color graphics (TV or monitor). (Note: This<br />

mode is not supported in ROM).<br />

• Up to 100 rows of 160 pels each (2x2)<br />

• 1 of 16 colors each pel specified by I, R, G and B<br />

• Requires 8000 byte of Read/Write Memory (on the adapter) ,,-.....<br />

• Memory mapped graphics (requires special memory map<br />

and set up to be defined later)<br />

2. Medium resolution color graphics (TV or monitor)<br />

• Up to 200 rows of 320 pels each (lxl)<br />

• 1 out of 4 preselected colors in each box<br />

• Requires 16000 bytes of Read/Write Memory <br />

(on the adapter) <br />

• Memory mapped graphics <br />

4 pels/byte <br />

FORMAT: 7 6 5 4 3 2 0<br />

C1 CO C1 CO C1 CO C1 CO I<br />

First display <br />

pel <br />

• Graphics storage is organized in two banks of <br />

8000 bytes each. <br />

Graphics Storage Map<br />

Memory Address<br />

#0000<br />

even scans (0,2,4, " " "' 198)<br />

(8000 bytes)<br />

#1 F3F<br />

#2000<br />

odd scans (1,3,5, " " "' 199)<br />

(8000 bytes)<br />

#3F3F<br />

Address #0000 contains pel information for upper left comer of<br />

display area.<br />

2-52


Color selection is determined by the following logic:<br />

C 1 and CO will select 4 of 16 preselected colors.<br />

This color selection (palette) is preloaded in an I/O port.<br />

CI CO CODE SELECT COLOR FOR DISPLAY<br />

o 0<br />

POSITION<br />

DOT TAKES ON COLOR OF 1 OF 16<br />

o 1<br />

PRESELECTED BACKGROUND COLORS.<br />

SELECT 1ST COLOR OF PRESELECT COLOR<br />

SET"I" OR "2"<br />

1 0 SELECT 2ND COLOR OF PRESELECT COLOR<br />

SET "I" OR "2"<br />

1 1 SELECT 3RD COLOR OF PRESELECT COLOR<br />

SET"1" OR "2"<br />

The two color sets are:<br />

SET ONE<br />

COLOR 1 - CYAN<br />

COLOR 2 - MAGENTA<br />

COLOR 3 - WHITE<br />

SET TWO<br />

COLOR I - GREEN<br />

COLOR 2 - RED<br />

COLOR 3- BROWN<br />

The background colors are the same basic 8 color as defined for<br />

low resolution graphic plus 8 alternate intensities defined by the<br />

intensity bit for a total of 16 color including black and white.<br />

3. Black and white high resolution graphics (monitor)<br />

• Up to 200 rows of 640 pels each (IxI)<br />

• Black and white only<br />

• Requires 16000 bytes of Read/Write Memory<br />

(on the adapter)<br />

• Addressing and mapping is the same as for medium resolution<br />

color graphics, but the data format is different. In this<br />

mode each bit in memory is mapped to a pelon the screen.<br />

• 8 pels/byte<br />

76543210<br />

I I I I I I I I<br />

L H"t d',pl,y p,' " , by"<br />

2-53


Description of Basic Operations<br />

In the alphanumeric mode the adapter fetches character and attribute<br />

information from its display buffer. The starting address of the display<br />

buffer is programmable through the 6845, but it must be an even<br />

address. The character codes and attributes are then displayed<br />

according to their relative position in the buffer.<br />

(EVEN) Starting Address <br />

DISPLAY BUFFER <br />

CHAR CODE 'A'<br />

ATTRIBUTE<br />

CHAR CODE 'B'<br />

A<br />

(Example of a 40x25 screen)<br />

B<br />

ATTRIBUTE<br />

Video Screen<br />

X<br />

Last Address 1000<br />

CHAR CODE 'X'<br />

ATTRIBUTE<br />

The CPU and the display control unit have equal access to the display<br />

buffer during all the operating modes except high resolution alphanumeric.<br />

During this mode, the CPU should access the display buffer<br />

during the vertical retrace time (if not, then the display will be affected<br />

with random patterns as the CPU is using the display buffer). The<br />

characters are displayed from a prestored "character generator" which<br />

contains the dot patterns of all the displayable characters.<br />

In the graphics mode the displayed dots and colors are also fetched<br />

from the display buffer (up to 16K bytes). In the Color/Graphics Mode<br />

Section, the bit configuration for each graphics mode is explained.<br />

2-54


1"'"""""\<br />

Table 5.<br />

I<br />

R G B<br />

Summary of Available Colors<br />

COLOR<br />

0 0 0 0 Black <br />

0 0 0 1 Blue <br />

0 0 1 0 Green <br />

0 0 1 1 Cyan <br />

0 1 0 0 Red <br />

0 1 0 1 Magenta <br />

0 1 1 0 Brown <br />

0 1 1 1 Light Gray <br />

1 0 0 0 Dark Gray <br />

1 0 0 1 Light Blue <br />

1 0 1 0 Light Green <br />

1 0 1 1 Light Cyan <br />

1 1 0 0 Light Red <br />

1 1 0 1 Light Magenta <br />

1 1 1 0 Yellow <br />

1 1 1 1 White <br />

Note: "I" provides extra luminance (brightness) to each shade<br />

available. Resulting in the light colors listed above, except<br />

where the "I" bit is not recognized by some monitors.<br />

Programming Considerations<br />

Programming the 6845 CRT Controller<br />

The 6845 has 19 internal registers which are used to define and control<br />

a raster scanned CRT display. One of these registers, the Address<br />

Register, is actually used as a pointer to the other 18 registers. It is a<br />

write only register which is loaded from the CPU by executing an OUT<br />

instruction to I/O address 3D4. The five least significant bits ofthe I/O<br />

bus are loaded into the Address Register.<br />

In order to load any of the other 18 registers, the Address Register is<br />

first loaded with the necessary pointer and then the CPU may output a<br />

value to I/O address 3D5 in order to load the information in the<br />

preselected register.<br />

The following table defines the values which must be loaded in 6845<br />

1"'"""""\ Registers in order to control the different modes ofoperation supported<br />

by the attachment.<br />

2-55


Table 6. 6845 Register Description<br />

ADDR REG. REGISTER 40x25 80x25 GRAPHIC<br />

REG. # TYPE UNITS I/O ALPHA ALPHA MODES<br />

0 RO Horizontal Char. Write 38 71 38<br />

Total<br />

Only<br />

1 R1 Horizontal Char. Write 28 50 28<br />

Displayed<br />

Only<br />

2 R2 Horiz. Sync Char. Write 20 5A 20<br />

Position<br />

Only<br />

3 R3 Horiz. Sync Char. Write OA OA OA<br />

Width<br />

Only<br />

4 R4 Vertical Total Char. Write 1F 1F 7F<br />

Row Only<br />

5 R5 Vertical Total Scan Write 06 06 06<br />

Adjust Line Only<br />

6 R6 Vertical Char. Write 19 19 64<br />

Displayed Row Only<br />

7 R7 Vert. Sync Char. Write 1C 1C 70<br />

Position Row Only<br />

8 R8 I nterlace Mode - Write 02 02 02<br />

Only<br />

9 R9 Max Scan Scan Write 07 07 01<br />

Line Addr. Line Only<br />

A R10 Cursor Start Scan Write 06 06 06<br />

Line Only<br />

B R11 Cursor End Scan Write 07 07 07<br />

Line Only<br />

C R12 Start Addr. (HI - Write 00 00 00<br />

Only<br />

0 R13 Start Addr. (Ll - Write 00 00 00<br />

E R14<br />

Only<br />

Cursor - Read/ XX XX XX<br />

Addr. (HI<br />

Write<br />

F R15 Cursor - Read/ XX XX XX<br />

Addr. (Ll<br />

Write<br />

10 R16 Light Pen (HI - Read XX XX XX<br />

Only<br />

11 R17 Light Pen (Ll - Read XX XX XX<br />

Only<br />

Note: All register values are given in hexadecimal.<br />

2-56


Programming the Mode Control and Status Register <br />

The following I/O devices are defined on the Color/Graphics Adapter. <br />

HEX AOOR. A9 A8 A7 A6 A5 A4 A3 A2 Al AD FUNCTION OF REGISTER<br />

X'308' 1 1 1 1 0 1 1 0 0 0 DO REG (MODE CONTROL) <br />

X'309' 1 1 1 1 0 1 1 0 0 1 DO REG (COLOR SELECT) <br />

X'30A' 1 1 1 1 0 1 1 0 1 0 01 REG (STATUS) <br />

X'30B' 1 1 1 1 0 1 1 0 1 1 CLEAR LIGHT PEN LATCH <br />

X'30C' 1 1 1 1 0 1 1 1 0 0 PRE SET LIGHT PEN LATCH <br />

X'300' 1 1 1 1 0 1 0 Z Z 0 6845 REGISTERS<br />

X'301' 1 1 1 1 0 1 0 Z Z 1 6845 REGISTERS<br />

X'300' 1 1 1 1 0 1 0 Z Z 0 6845 REGISTERS<br />

X'301' 1 1 1 1 0 1 0 Z Z 1 6845 REGISTERS<br />

Z = don't care condition<br />

Color Select Register<br />

This is a 6 bit output only, register, it can not be read, its address is<br />

X'3D9' and can be written using the 8088 I/O OUT command.<br />

The following is a description of the Register functions.<br />

~<br />

Bit 0 B (BLUE) Border Color Select ALPHA/BACKGROUND <br />

Bit 1 G (G REEN) Border Color Select ALPHA/BACKG RO UNO <br />

Bit 2 R (RED) Border Color Select ALPHA/BACKGROUND <br />

Bit 3 I Intensifies Border Color Select ALPHA/BACKGROUND IN 320 X 200<br />

Bit 4 Select Alt Back Color Set For Alpha Color Modes<br />

Bit 5 320 x 200 Color Set Select<br />

Bit 6 Not Used<br />

Bit 7 Not Used<br />

Bits 0, 1, 2, 3. Select the screens border color in 40x25 alpha mode. In<br />

graphics mode (medium resolution) 320 x 200 color, the screen<br />

background color (CO-Cl) is selected by these bit settings.<br />

Bit 4. This bit when set will select on alternate, intensified, set of background<br />

colors in the alpha mode.<br />

Bit 5 is only used in the medium resolution color mode (320 x 200).<br />

It is used to select the active set of screen colors for the display.<br />

2-57


When bit 5 is set to a "1" colors are determined as follows.<br />

The C 1 CO Set selected are:<br />

0 Background as defined by Bit 0-3 of Port '3D9'<br />

o 1 Cyan <br />

1 0 ~agenta <br />

1 1 White <br />

When bit 5 is set to a "0" Colors are determined as follows.<br />

The CO Cl Set selected are:<br />

0 Background as dermed by Bit 0-3 of Port '3D9'<br />

o 1 Green <br />

1 0 Red <br />

1 0 Yellow <br />

Mode Select Register<br />

This is a 6 bit output only register, it can not be read. Its address is<br />

X'3D8'. It can be written using the 8088 I/O OUT command.<br />

The following is a description of the registers functions.<br />

Bit 0<br />

Bit 0<br />

Bit 1<br />

Bit 2<br />

Bit 3<br />

Bit 4<br />

Bit 5<br />

Bit 6<br />

Bit 7<br />

80 x 25 mode <br />

Graphic Select <br />

B & W Select <br />

Enable Video Signal <br />

High Res 640 x 200 B & W ~ode <br />

Change BACKGROUND INTENSITY <br />

to Blink Bit <br />

Not Used <br />

Not Used <br />

Bit 0 Selects between 40 x 25 and 80 x 25 alpha mode, a "1"<br />

sets it to 80 x 25 mode.<br />

Bit 1<br />

Selects between ALPHA mode and 320 x 200 graphics<br />

mode, a "I" select 3 20 x 200 graphics mode.<br />

Bit 2 Selects color or B & W mode, a "1" selects B & W.<br />

Bit 3<br />

Bit 4<br />

2-58 <br />

Enables the video signal at certain times when modes are<br />

Oeing changed. The video signal should be disabled when<br />

changing modes. A "1" enables the video signal.<br />

When on, this bit selects the 640 x 200 B & W graphics<br />

mode. One color of 8 can be selected on direct drive sets in<br />

this mode by using register 3D9.


Bit 5<br />

When on, this bit will change the character background<br />

intensity to the blinking attribute function for ALPHA<br />

modes. When the high order attribute bit is not selected, 16<br />

background colors (or intensified colors) are available. For<br />

normal operation, this bit should be set to "1" to allow the<br />

blinking function.<br />

Mode Register Summary <br />

Bits <br />

0 1 2 3 4 5<br />

0 0 1 1 0 1 40 x 25 ALPHA B & W<br />

0 0 0 1 0 1 40 x 25 ALPHA COLOR<br />

1 0 1 1 0 1 80 x 25 ALPHA B & W<br />

1 0 0 1 0 1 80 x 25 ALPHA COLOR<br />

0 1 1 1 0 z 320 x 200 B & W GRAPHICS<br />

0 1 0 1 0 z 320 x 200 COLOR GRAPHICS<br />

0 1 1 1 1 z 640 x 200 B & W GRAPHICS<br />

'1' 4" l" ~ .~ '1'<br />

Z = don't care condition<br />

ENABLE BLINK ATTRIBUTE<br />

640 x 200 B& W<br />

ENABLE VIDEO<br />

SELECT B & W MODE<br />

SELECT 320 x 200 GRAPHICS<br />

80 x 25 ALPHA SELECT<br />

* THE LOW RESOLUTION 160 x 100 MODE REQUIRES SPECIAL PROGRAMMING<br />

AND IS SET UP AS ALPHA MODE 40 x 25<br />

Status Register<br />

~ The status register is a 4 bit read only register. Its address is X'3DA'.<br />

It can be read using the 8088 I/O IN instruction.<br />

2-59


The following is a description of the register functions.<br />

Bit 0<br />

Bit 1<br />

Bit 2<br />

Bit 3<br />

Bit 4<br />

Bit 5<br />

Bit 6<br />

Bit 7<br />

Display Enable<br />

Light Pen Trigger Set<br />

Light Pen SW Made<br />

Alpha Dots<br />

Not Used<br />

Not Used<br />

Not Used<br />

Not Used<br />

Bit 0 This input bit, when active, indicates that a regen buffer<br />

memory access can be made without interfering with the<br />

Display.<br />

Bit 1 This bit, when active, indicates that a positive going edge<br />

from the light pen input has set the light pen trigger. This<br />

trigger is reset on power on and may also be cleared by doing<br />

an I/O OUT command to address X'3DB'. No specific data<br />

setting is required, the action is address activated.<br />

Bit 2 The light pen switch status is reflected in this status bit.<br />

The switch is not latched or debounced. A "0" indicates<br />

the switch is on.<br />

Bit 3 The ALPHA video output signal is readable in this status bit. ,.,.,.........<br />

Its purpose is to verify that video information is being<br />

generated for RAS purposes.<br />

Sequence of Events<br />

1. Determine mode of operation<br />

2. Reset Video Enable bit<br />

3. Program 6845 to select mode<br />

4. Program mode/color select registers<br />

Memory Requirements<br />

The memory used by this adapter is self-contained. It consists of<br />

16k bytes of memory without parity. This memory is used as both a<br />

display buffer for alphanumeric data and as a bit map for graphics data.<br />

The Regen Buffers address starts at X'B8000'.<br />

Interrupt Level (Vertical Retrace)<br />

Level 2<br />

2-60


I/O Address and Bit Map<br />

Read/Write Memory Address Space<br />

01000<br />

System ReadIWrite Memory<br />

B8000<br />

BBFFF<br />

Display Buffer (16K Bytes)<br />

128K RESERVED<br />

REGEN AREA<br />

Display Buffer (16 K Bytes)<br />

C8FFF<br />

2-61


Color/Graphics Monitor Adapter Direct Drive, and<br />

Composite Interface Pin Assignment<br />

REAR PANEL<br />

0<br />

·<br />

0<br />

e·~ • • 6<br />

• 9<br />

~ 0~ •<br />

AT STANDARD TTL LEVELS<br />

0<br />

COLOR DIRECT<br />

DRIVE 9 PIN "0"<br />

SHELL CONNECTOR<br />

Ground 1<br />

Ground 2<br />

... Red 3<br />

.... <br />

.... Green 4<br />

Direct .... Color/Graph ics<br />

Drive .... Blue 5 Direct Drive<br />

Monitor ~<br />

Adapter<br />

.... Intensity 6<br />

"<br />

....<br />

... Reserved - 7<br />

....<br />

.... Horizontal Drive 8<br />

....<br />

.... Vertical Drive 9<br />

"'"<br />

COMPOSITE PHONO JACK<br />

HOOK-UP TO MONITORS<br />

Composite Video Signal of approximately 1.5 Volts<br />

Video .... Peak to Peak Amplitude 1 Color/Graphics<br />

Monitor<br />

.... Chassis Ground 2<br />

Composite Jack<br />

2-62


Color/Graphics Monitor Adapter<br />

Auxiliary Video Connectors<br />

PIJI PIN BERG STRIP<br />

FOR RF<br />

MODULATOR<br />

P2-6 PIN BERG STRIP<br />

FOR LIGHT PEN<br />

COLOR/GRAPHICS<br />

ADAPTER<br />

RF<br />

Modulator<br />

...<br />

.....<br />

t....<br />

+12 Volts<br />

(key) Not Used<br />

Composite Video Output<br />

Logic Ground<br />

1<br />

2<br />

3<br />

4<br />

Color/Graphics<br />

Adapter<br />

R F Modulator Interface<br />

- Light Pen Input<br />

(key) Not Used<br />

1.,<br />

2"­<br />

Light<br />

Pen<br />

...<br />

.....<br />

...<br />

.. <br />

- Light Pen Switch<br />

Chassis Ground<br />

+ 5 Volts<br />

+ 12 Volts<br />

Light Pen Interface<br />

3 ..<br />

4"­<br />

5<br />

6<br />

Color/Graphics<br />

Adapter<br />

2-63


2-64 <br />

NOTES


Parallel Printer Adapter<br />

The Printer Adapter is specifically designed to attach printers with a<br />

parallel port interface, but it can be used as a general input/output port<br />

for any device or application which matches its input/output capabilities.<br />

It has 12 TTL buffer output points which are latched and can be<br />

written and read under program control using the processor IN or OUT<br />

instructions. The adapter also has five steady state input points that<br />

may be read using the processor's IN instructions.<br />

In addition, one input can also be used to create a processor interrupt.<br />

This interrupt can be enabled and disabled under program control.<br />

Reset from the power-on circuit is also "ORed" with a program output<br />

point allowing a device to receive a power-on reset when the processor<br />

is reset.<br />

This function is packaged on an adapter which fits into any of the five<br />

System Expansion slots on the System Board. The input/output signals<br />

are made available at the back of the adapter via a right angle <strong>PC</strong>B<br />

mounted 25 PIN "D" type connector. This connector protrudes<br />

through the rear panel ofthe System Unit where a cable and shield may<br />

be attached.<br />

"..-..., When this adapter is used to attach a printer, data, or printer,<br />

commands are loaded into an 8-bit latched output port, and the strobe<br />

line is activated writing data to the printer. The program then may read<br />

the input ports for printer status indicating when the next character can<br />

be written or it may use the interrupt line to indicate "not busy" to<br />

the software.<br />

The output ports may also be read at the card's interface for diagnostic<br />

loop functions. This allows fault isolation determination between the<br />

adapter and the attaching device.<br />

This same function is also part of the combination <strong>IBM</strong> Monochrome<br />

Display and Printer Adapter. A block diagram ofthe printer adapter is<br />

on the following page.<br />

2-65


Parallel Printer Adapter Block Diagram <br />

,.. ENABLE<br />

25 PIN "0" SHE LL<br />

BUS BUFFER DATA LATCH CONNECTOR<br />

r-­<br />

8 8<br />

~ ...<br />

~ CLOCK<br />

I­<br />

TRANS- 8<br />

~<br />

r<br />

CEIVER<br />

DIR<br />

C<br />

~O<br />

AEN<br />

M<br />

M<br />

obJ<br />

E<br />

READ<br />

DATA<br />

C<br />

a<br />

A 0<br />

WRITE DATA<br />

WRITE CONTROL<br />

N<br />

D<br />

READ STATUS<br />

E<br />

READ<br />

R ~ONTROL<br />

RESET<br />

BUS CONTROL o.c.<br />

BUFFERS<br />

DRIVERS<br />

~ SLCT IN<br />

4 ENABLE 4 CLOCK<br />

STROBE<br />

~,.. AUTO<br />

~<br />

f---t<br />

FO XT<br />

5 INIT<br />

ENABLE<br />

f-+<br />

,.... CLR<br />

I­<br />

ERROR<br />

SLCT<br />

PE<br />

ACK<br />

BUSY<br />

Figure 16. PARALLEL PRINTER ADAPTER BLOCK DIAGRAM<br />

2-66


Programming Considerations<br />

The Printer Adapter responds to 5 I/O instructions - 2 output and 3<br />

input. The output instructions transfer data into 2 latches whose outputs<br />

~ are presented on pins of a 25 Pin "D" shell connector.<br />

Two of the three input instructions allow the CPU to read back the<br />

contents of the two latches. The third allows the CPU to -read the real<br />

time status of a group of pins on the connector.<br />

A description of each instruction follows.<br />

<strong>IBM</strong> Monochrome Display & Printer Adapter<br />

Parallel Printer Adapter<br />

Output to address 3BCH Output to address 378H<br />

Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0<br />

Pin 9 Pin 8 Pin 7 Pin 6 Pin 5 Pin 4 Pin 3 Pin 2<br />

This instruction captures data from the data bus and is present on the<br />

respective pins. These pins are each capable of sourcing 2.6 rna and<br />

sinking 24 rna.<br />

It is essential that the external device not try to pull these lines to<br />

~ ground.<br />

<strong>IBM</strong> Monochrome Display & Printer Adapter<br />

Parallel Printer Adapter<br />

Output to address 3BEH Output to address 37AH<br />

Bit 4 Bit 3 Bit 2 Bit 1 Bit 0<br />

IRQ Pin 17 Pin 16 Pin 14 Pin 1<br />

Enable<br />

This instruction causes this latch to capture the five least significant<br />

bits of data bus. The four least significant bits present their outputs, or<br />

inverted versions oftheir outputs to the respective pins shown above. If<br />

bit 4 is written I, the card will interrupt the CPU on the condition that<br />

Pin 10 transitions high to low.<br />

These pins are driven by open collector drivers pulled to +5V through<br />

4.7K OHM resistors. They can each sink approximately 7 rna and<br />

maintain 0.8 volts down level.<br />

~ Note: For pin references, see Parallel Interface Connector<br />

Specifications, page 2-69.<br />

2-67


<strong>IBM</strong> Monochrome Display &Printer Adapter<br />

Parallel Printer Adapter<br />

Input from address x' '3BC' Input from address 378H<br />

This command presents the CPU with data present on the pins<br />

associated with the out to x' '3BC'. This should nonnally reflect the<br />

exact value that was last written to x '3BC'.1fan external device should<br />

be driving data on these pins (in violation ofusage ground rules) at the<br />

time of an input, this data will be 'or' ed with the latch contents.<br />

<strong>IBM</strong> Monochrome Display & Printer Adapter<br />

Parallel Printer Adapter<br />

Input from address 3BDH Input from address 379H<br />

This command presents real time status to the CPU from the pins<br />

as follows.<br />

Bit 1 Bit 0<br />

<strong>IBM</strong> Monochrome Display & Printer Adapter<br />

Parallel Printer Adapter<br />

Input from address 3BEH Input from address 37AH<br />

This instruction causes the data present on pins 1, 14, 16, 17 and IRQ<br />

bit to be read by the CPU. In the absence of external drive applied to<br />

these pins, data read by the CPU will exactly match data last written to r""'\<br />

x' '3BE' in the same bit positions. Note that data bits 0-2 are not<br />

included. Ifexternal drivers are dotted to these pins, that data will be<br />

'or'ed with data applied to the pins by the x' '3BE' latch.<br />

Bit 7 Bit 6 Bit 5 Bit4 Bit 3 Bit 2 Bit 1 Bit 0<br />

-- --<br />

IRQ Pin 17 Pin 16 Pin 14 Pin 1<br />

Enable<br />

Por={) Por=1 Por={) Por=1 Por=1<br />

These pins assume the states shown after a reset from the CPU.<br />

Note: For pin references see Parallel Printer Adapter Interface<br />

Connector Specifications page 2-69.<br />

2-68


Parallel Printer Adapter <br />

Interface Connector Specifications <br />

REAR PANEL<br />

25 PIN "0"<br />

SHELL CONNECTOR<br />

~ 0<br />

14·<br />

• •<br />

• •<br />

• •<br />

NOTE:<br />

All outputs are software !lenerated, <br />

and all inputs are real time si!lnals <br />

(not latched). <br />

AT STANDARD TTL LEVELS<br />

Signal<br />

AMP<br />

Name<br />

Pin No<br />

- Strobe 1 ...<br />

..... + Data Bit 0 2<br />

....<br />

,<br />

-<br />

..... + Data Bit 1 3<br />

+ Data Bit 2 4<br />

...<br />

+ Data Bit 3 5<br />

r-. -<br />

I ... + Data Bit 4 6 <br />

I"'"<br />

...<br />

.....­<br />

+ Data Bit 5 7<br />

I .... + Data Bit 6 8<br />

...­<br />

I ... + Data Bit 7 9<br />

Printer .....- Parallel Printe<br />

- Acknowledae 10 Adapter<br />

-.... + Busy 11<br />

I..... + P. End (out of Paper) 12<br />

.... -<br />

+ Select 13<br />

- Auto Feed 14 ...<br />

- Error 15 ...<br />

- Initialize Printer 16 ..<br />

...<br />

- Select Input 17 ...<br />

Ground 18·25 ...<br />

..<br />

..<br />

2-69


<strong>IBM</strong> 80 CPS Matrix Printer<br />

The printer is a self powered, standalone table top unit. Itattaches to the<br />

System Unit via a parallel signal cable which is 6 feet in length. The unit<br />

obtains its A C power from a standard wall outlet (120 Vac). The printer<br />

is an 80 Character Per Second (CPS) bidirectional wire matrix device.<br />

Ithas a 9 wire head, allowing it to print characters in a 9x9 dot matrix.<br />

Itcan print in compressed mode 132 characters per line and in standard<br />

font, 80 characters per line. A large font also prints in 66 characters per<br />

line mode. The printer can print double size characters and double<br />

dotted characters. The printer prints the standard ASCII 96 character<br />

uppercase and lowercase character sets. In addition, a set of64 special<br />

block graphic characters are available.<br />

The printer can also accept commands setting the feed control desired<br />

for the application. Setting of 1 to 66 lines per page can be programmed<br />

and the lines per inch may be set to 5,8, or 10. This printer attaches to<br />

the System Unit via the Parallel Printer Adapter or the combination<br />

Monochrome Display Adapter and Parallel Printer Adapter. The cable<br />

is a 25 lead shielded cable with a 25 pin "0" type connector at the<br />

System Unit end, and a 36 pin connector on the printer end.<br />

Note: You may lose data anytime you are running a program with the<br />

printer off and attached to the System Unit.<br />

/""""'\<br />

r--..<br />

2-70


Table 7.<br />

Printer Specifications<br />

(1 ) PRINT METHOD:<br />

(2) PRINT SPEED:<br />

/~ (3)<br />

(4)<br />

PRINT DIRECTION:<br />

NUMBER OF PINS IN HEAD:<br />

(5) LINE SPACING:<br />

(6) PRINTING CHARACTERISTICS<br />

Matrix:<br />

Character Set:<br />

Graphic Character:<br />

(7) PRINTING SIZES<br />

Normal:<br />

Enlarged:<br />

Condensed:<br />

Condensed Enlarged:<br />

(8) MEDIA HANDLING<br />

Paper Feed:<br />

Paper Width Range:<br />

~ Copies:<br />

Paper Path:<br />

(9) INTERFACES<br />

Standard:<br />

(10) INKED RIBBON<br />

Color:<br />

Type:<br />

Life Expectancy:<br />

(11 ) ENVIRONMENTAL CONDITIONS<br />

Operating Temperature Range:<br />

Operating Humidity:<br />

(12) POWER REQUIREMENT<br />

Voltage:<br />

Current:<br />

Power Consumption:<br />

(13) PHYSICAL CHARACTERISTICS<br />

Height:<br />

~ Width:<br />

Depth:<br />

Weight:<br />

Serial impact dot matrix<br />

80 CPS<br />

Bidirectional with logical seeking<br />

9<br />

4.23 mm 0/6") or programmable<br />

9x9<br />

Full 96·character ASCII with decoders,<br />

plus 9 international characters/symbols<br />

64 block characters<br />

Maximum<br />

Characters characters<br />

per inch<br />

per line<br />

10 80<br />

5 40<br />

16.5 132<br />

8.25 66<br />

Adjustable sprocket pin feed<br />

101.6 mm Wlto 254 mm (10")<br />

One original plus two carbon copies (total<br />

thickness not to exceed 0.3 mm (0.012")<br />

Rear<br />

Parallel 8-bit<br />

Data & Control lines<br />

Black<br />

Cartridge<br />

3 million characters<br />

5 to 350 C (41 to 950 F)<br />

10 to 80% non·condensing<br />

120VAC, 60 Hz<br />

1 Amp maximum<br />

100 VA maximum<br />

107 mm (4.2")<br />

374 mm (14.7")<br />

305 mm (12.0")<br />

5.5 kg (12Ibs.)<br />

2-71


Setting The DIP Switches<br />

There are two DIP switches on the control circuit board. In order to suit<br />

the user's specific requirements, desired control modes are selectable<br />

by the DIP switches. The functions of the switches and their preset<br />

conditions at the time of shipment are as shown in Table 8 (DIP<br />

Switch 1) and Table 9 (DIP Switch 2). ~.<br />

" ,;;::; .,.);'PJ,'rr:on,o,.,/' "d(~<br />

HMTP BOARD ... ll....M'''·_ •• M,'~' ••' ,0<br />

~~N::~'9.0:~I~~:::<br />

.. - ';', eo '0'D"D·'<br />

>0" - '" ...,<br />

... Q,~l,.n:: : ,~c ' ~ no<br />

• .,; g...". ' n..<br />

'·~... ' .. '·_.n.. ,I ,;-0- D..<br />

•• ' .,[]~f<br />

.' i;', nO<br />

C~8)j"~u<br />

~:: .7C.,U!oO.Z' U: ., • ~ cuU ~n<br />

. : ,; 0 5' 'C~··"l'" ,'C 00 't5 • M'_+ I<br />

;,~.., f., ~()' , :, ' c, • '.. J 1= + ~'<br />

~, Q 'D'D":""D""~" .q~ .. ~'~ll 0 0 ,."r·D ::::: ..: II<br />

.," II .. ,. ," ., v. ", ~ J ~<br />

~ =:= ::~ --.so.' ~. f<br />

. :O-.B~, ,'[D': :~,\ 1111;' D~o: I'0: :·6~MITij;I~'r·1 ~<br />

l[<br />

'JIUO. "',"-sol .200:) -+~ :: as;" I.' ,. "~ I<br />

c,. 11: .... '"' 2 -Q".'" I<br />

Figure 17. LOCATION OF PRINTER DIP SWITCHES<br />

Table 8. Functions and Conditions of DIP Switch 1<br />

2-72<br />

Pin No. Function ON OFF Factory·set <br />

Condition <br />

1 Not applicable - - ON<br />

2 CR { Print & Line Feed Print only Print & ON<br />

Print only<br />

line feed<br />

3 Buffer full { Print & Line Feed Print only Print & ON<br />

Print only<br />

line feed<br />

4 Cancel code {Valid Invalid Valid OFF<br />

Invalid<br />

5 Delete code { Valid Invalid Valid ON<br />

Invalid<br />

6 Error Buzzer Sounds Does not ON<br />

sound<br />

7 Character generator N.A. Graphic OFF<br />

(Graphic pattern select)<br />

patterns<br />

select<br />

8 SLCT I N signal Fixed Not fixed ON<br />

Fixed internally<br />

Not fixed internally


Table 9. Functions and Conditions of DIP Switch 2<br />

Pin No. Function ON OFF Factory-set<br />

Condition<br />

1<br />

Not applicable - - ON<br />

2 - - ON<br />

3 AUTO FEED ~ Fixed internally Fixed Not fixed OFF<br />

XT signal Not fixed internally<br />

4 Coding table select N.A. Standard OFF<br />

Parallel Interface Description<br />

(1) Specifications<br />

(a) Data transfer rate: 1000 CPS (max.)<br />

(b) Synchronization: By externally supplied STROBE<br />

pulses.<br />

(c) Handshaking: ACKNLG or BUSY signals.<br />

(d) Logic level: Input data and all interface control signals<br />

are compatible with the TTL level.<br />

~ (2) Connector<br />

Plug: 57-30360 (AMPHENOL)<br />

(3) Connector pin assignment and descriptions of signals.<br />

Connector pin assignment and descriptions of respective<br />

interface signals are provided in Table (10) page 2-74.<br />

2-73


Table 10. Connector Pin Assignment and Descriptions<br />

ofInterface Signals<br />

Signal Return <br />

Pin No. Pin No. <br />

1 19 <br />

2 20<br />

3 21<br />

4 22<br />

5 23<br />

6 24<br />

7 25<br />

8 26<br />

9 27<br />

10 28<br />

11 29<br />

Signal<br />

STROBE<br />

DATA 1<br />

DATA 2<br />

DATA 3<br />

DATA 4<br />

DATA 5<br />

DATA 6<br />

DATA 7<br />

DATA 8<br />

ACKNLG<br />

BUSY<br />

Direction<br />

In<br />

In<br />

In<br />

In<br />

In<br />

In<br />

In<br />

In<br />

In<br />

Out<br />

Out<br />

Description<br />

STROBE pulse to read <br />

data in. Pulse width <br />

must be more than <br />

O.5J.1S at receiving <br />

terminal. <br />

The signal level is <br />

normally "HIGH"; <br />

read·in of data is per· <br />

formed at the "LOW" <br />

level of this signal. <br />

These signals represent <br />

information of the <br />

1st to 8th bits of <br />

parallel data respectively.<br />

Each signal is <br />

at "HIGH" level when <br />

data is logical "1" and <br />

"LOW" when logical <br />

"0". <br />

Approx .. 5J.1S pulse. <br />

"LOW" indicates that <br />

data has been received <br />

and that the printer <br />

is ready to accept <br />

other data. <br />

A "HIGH" signal <br />

indicates that the <br />

printer cannot receive <br />

data. The signal <br />

becomes "High" in <br />

the following cases: <br />

1. During data entry<br />

2. During printing<br />

operation<br />

3. In OFF·LlNE state<br />

4. During printer error<br />

status.<br />

2-74


Table 10. Connector Pin Assignment and Descriptions<br />

of Interface Signals (cont.)<br />

Signal Return<br />

Pin No. Pin No. Signal Direction Description<br />

12 30 PE Out A "HIGH" signal<br />

indicates that the<br />

printer is out of paper.<br />

13 - SLCT Out This signal indicates<br />

that the printer is in<br />

the selected state.<br />

14 - AUTO In With this signal being<br />

FEED XT<br />

at "LOW" level, the<br />

paper is automatically<br />

fed one line after<br />

printing.<br />

(The signal level can<br />

be fixed to "LOW"<br />

with DIP SW pin 2·3<br />

provided on the<br />

control circuit board.)<br />

15 - NC Not used.<br />

16 - OV Logic GN D level.<br />

17 - CHASSIS·GND - Printer chassis GN D.<br />

In the printer, the<br />

chassis GN D and the<br />

logic GN D are isolated<br />

from each other.<br />

18 - NC - Not used.<br />

19-30 - GND - TWISTED·PAI R <br />

RETU RN signal <br />

GN D level. <br />

31 - INIT In When the level of this<br />

signal becomes" LOW"<br />

the printer controller<br />

is reset to its initial<br />

state and the print<br />

buffer is cleared. This<br />

signal is normally at<br />

"HIGH"level, and<br />

its pulse width must<br />

be more than 50!1S at<br />

the receiving<br />

terminal.<br />

2-75


Table 10. Connector Pin Assignment and Descriptions<br />

of Interface Signals (cont.)<br />

Signal Return<br />

Pin No. Pin No. Signal Direction Description<br />

32 ERROR Out The level of this signal<br />

becomes "LOW"<br />

when the printer is<br />

in­<br />

1. PAPER END state<br />

2. OFF·LINE state<br />

3. Error state<br />

33 - GND - Same as with Pin No.<br />

19t030.<br />

34 - NC - Not used.<br />

35 Pulled up to +5V<br />

through 4.7 Kn<br />

resistance.<br />

36 - SLCTIN In Data entry to the<br />

printer is possible<br />

only when the level<br />

of th is signal is<br />

"LOW". (Internal<br />

fixing can be carried<br />

out with DIP SW 1-8.<br />

The condition at the<br />

time of shipment is<br />

set" LOW" for this<br />

signal.)<br />

NOTES<br />

1: "Direction" refers to the direction of signal flow as viewed from the printer.<br />

2: "Return" denotes "TWISTED PAl R RETU RN" and is to be connected<br />

at signal ground level.<br />

As to the wiring for the interface, be sure to use a twisted-pair cable for<br />

each signal and never fail to complete connection on the Return side. To<br />

prevent noise effectively, these cables should be shielded and connected<br />

to the chassis of the System Unit and the printer, respectively_<br />

3: All interface conditions are based on TTL level. Both the rise and fall times<br />

of each signal must be less than O.2.us.<br />

4: Data transfer must not be carried out by ignoring the ACKN LG or BUSY<br />

signal. (Data transfer to this printer can be carried out only after confirming<br />

the AC KN LG signal or when the level of the BUSY signal is "LOW".)<br />

2-76


(4) Data transfer sequence<br />

Fig. 17 shows the sequence for data transmission.<br />

BUSY--""<br />

r""'\ ACKNLG<br />

0.51'


~<br />

ASCII Coding Table<br />

Table 11 shows all available codes when the Printer is set for<br />

operation with standard coding by setting the DIP switch pin 2-4 to<br />

the OFF position. This DIP switch pin is factory-set to the OFF<br />

position.<br />

Table 11. ASCII Coding Table<br />

-Q-<br />

'"-<br />

u..<br />

:::<br />

Ṉ<br />

:::<br />

W<br />

0<br />

(.)<br />

'"<br />

Q- <br />

.....,<br />

"'"<br />

-<br />

~<br />

. ­<br />

+<br />

~<br />

~<br />

- 0<br />

-<br />

u..<br />

u..<br />

..<br />

-<br />

./<br />

....J<br />

V'<br />

u..<br />

0<br />

Q-<br />

CC<br />

(.)<br />

--­<br />

E<br />

:;:<br />

"<br />

I<br />

~<br />

0-<br />

0<br />

en<br />


ASCII Control Codes<br />

Control Codes<br />

Various kinds ofcontrol codes are contained in Table 11. These control<br />

codes are recognized by the printer and perform specified functions<br />

~upon receipt of these codes. The following are descriptions of respective<br />

control codes.<br />

(1) CR (Carriage Return)<br />

When the CR code is transmitted to the print buffer, all data<br />

stored in the print buffer is printed.<br />

(When AUTO FEED XT (Pin No. 14) is at "LOW" level or<br />

DIP switch pin 2-2 is ON, the paper is advanced one line<br />

automatically after printing.)<br />

~ When 80 columns of print data (including spaces) are<br />

continuously received and the following data is valid and<br />

printable, the Printer automatically begins to print the<br />

data stored in the print buffer. In this case, if AUTO<br />

FEED XT is at "LOW" level or DIP switch pin 2-3 is<br />

ON, the paper is advanced one line after printing.<br />

(2) LF (Line Feed)<br />

When the LF code is input, all data in the print buffer is printed<br />

~ and the paper is advanced one line.<br />

Note: If no data precedes the LF code, or if all preceding data<br />

is "SPACE", only paper feeding is performed.<br />

For example, if the data is transferred in the order of<br />

DATA-+CR-+LF, DATA will be printed by the CR<br />

code, and when the Printer receives the LF code, it only<br />

carries out one line feed.<br />

(3) VT (Vertical Tab)<br />

When the VT code is input, all data preceding this code is<br />

printed. And the paper is advanced to the line position set by<br />

"ESC B" (described later). If no vertical tab position is set by<br />

ESC B, the VT code behaves like the LF code. Therefore, the<br />

paper is advanced one line after printing.<br />

(4) FF (Form Feed)<br />

The FF code carries out the printing of all data stored in the<br />

print buffer and advances the paper to the next predetermined<br />

Top ofForm position. The Top ofForm is determined when the<br />

POWR switch is turned on or the INIT signal is applied. Ifthe<br />

form length per page is not set by "ESC C+n", it is regarded<br />

as 66 or 72 lines.<br />

2-79


Note: The form length of72 lines per page is applicable to only<br />

the version marked with identifier code "M72" on the<br />

rear side of the lower case of the Printer.<br />

This code always initializes the printing of the data stored in<br />

the print buffer.<br />

(5) SO (Shift Out)<br />

Whell the SO code is input, all data that follows it in the same<br />

line will be printed out in enlarged (double width) characters.<br />

This code is cancelled by the printing operation or the input of<br />

"DC 4" code and can be input at any column position on a line.<br />

Therefore, normal size and enlarged characters can be mixed<br />

on the same line.<br />

1. [DATA] ABC 1so 1 DEF 1DC41 GHI ~ [!;£J <br />

[PRINT]<br />

ABCDEFGHI <br />

2. [DATA ABCD ~ EFGH ~ ~ IJLK 1SO 1 MNOP ~ ~<br />

[PRINT<br />

ABCDEFGH <br />

IJKLMNOP <br />

(6) SI (Shift In)<br />

When the SI code is input, all data that follows it will be printed<br />

out in condensed characters. This code is cancelled by the input 1""""\<br />

of "DC 2" code. The SI code can be input at any column<br />

position on a line, but all characters/symbols on the line<br />

containing SI code are printed out in condensed characters.<br />

When printing condensed characters, the data capacity of the<br />

print buffer will become 132 columns per line.<br />

When the SO code is received after the input of the SI code,<br />

condensed enlarged characters (double width of condensed<br />

characters) can be printed. This condition is cancelled by<br />

"DC 4" code, and the character size returns to "condensed".<br />

1. [DATA] ~ ABCDEFGHIJKL ~ ~ <br />

[PRINT]<br />

ABCDEFGHIJKL <br />

2. [DATA] ABC @] DEF ~ GHIJKL ~ ~ <br />

[PRINT]<br />

ABCDEFGHIJKL <br />

(7) DC 4 (Device Control 4)<br />

The DC 4 code cancels the SO mode.<br />

[DATA] ~ ABCDEF ~ GHI 1DC 41 JKL ~ ~ <br />

[PRINT] ABCDEFGHIJKL <br />

2-80


(8) DC 2 (Device Control 2) <br />

The DC 2 code cancels the SI mode. <br />

[DATA] ~ ABCDEF ~ GHI ~ ~ ~ JKLMN ICR I~<br />

[PRINT] ABCDEFGHI<br />

JKLMN<br />

(9) HT (Horizontal Tab)<br />

The HT code carries out the horizontal tabulation. Ifthere is no<br />

tab position set, this code is ignored. The tab stop positions are<br />

set by "ESC D+n" (described later).<br />

(10) CAN (Cancel)<br />

Upon the input of the CAN code, all data previously stored in<br />

the print buffer is cancelled. Therefore, this code is regarded as<br />

the print buffer clear command. This code clears the print<br />

buffer, but control codes (Excluding the SO code) are still valid<br />

even ifthe CAN code is transferred. The validity or invalidity of<br />

the CAN code is selectable by the DIP switch pin 1-4 on the<br />

control circuit board.<br />

(11) DEL (Delete)<br />

This code functions the same as the CAN code. The validity or<br />

invalidity of the DEL code is selectable by the DIP switch pin<br />

1-5 on the control circuit board.<br />

(12) DC 1 (Device Control 1)<br />

The DC 1 code places the Printer in the Selected state. With the<br />

Printer in the Selected state, if the DC 1 code is input during<br />

data transfer, all data stored before the DC 1 code is ignored.<br />

(13) DC 3 (Device Control 3)<br />

The DC 3 code places the Printer in the Deselected state. In<br />

other words, it disables the Printer to receive data. Once the<br />

Printer is put in the Deselected state by the DC 3 code, the<br />

Printer will not revert to the Selected state unless the DC 1 code<br />

is input again.<br />

Note: When the DC 1 and DC 3 codes are used, DIP switch<br />

pin 1-8 should be in the "OFF" position.<br />

r'"'\, 1. [DATA] [Q[!J AAAAA 1DC 31 BBBBB @DJ CCCCC ~ [ill<br />

[PRINT]<br />

AAAAACCCCC<br />

2. [DATA] AAAAA @fJ] BBBBB IDC 31 CCCCC ~ @BJ [ill<br />

[PRINT]<br />

BBBBB<br />

2-81


Relations among the ON LINE switch, SLCT IN signal, <br />

DC1/DC3 code and interface signals are shown in Table <br />

12 below. <br />

Table 12. DCl/DC3 And Data Entry<br />

ON LINE<br />

SWITCH<br />

SLCTIN DC llDC 3 ERROR BUSY ACKNLG SLCT DATA ENTRY<br />

OFF-LINE HIGHILOW DC llDC 3 LOW HIGH Not LOW Impossible <br />

Generated <br />

DC I HIGH LOWI Generated HIGH Possible<br />

HIGH<br />

(Normal entry)<br />

HIGH<br />

DC 3 HIGH LOWI Generated LOW Possible <br />

HIGH<br />

(See Note 1.) <br />

ON-LINE LOW DC llDC 3 HIGH LOW/ Generated HIGH Possible<br />

HIGH<br />

(N ormal entry)<br />

NOTES<br />

1: In Table 12, it is assumed that as soon as the Printer receives data, it sends back the ACKNLG signal, <br />

though this data is not stored in the print buffer_ In this status, the Printer is waiting for the DC I <br />

code for normal entry_ <br />

2: The DC I/OC 3 code is valid under the condition that the DIP switch pin 1-8 is OFF, namely, the<br />

level of SLCT IN at the pin No_ 36 of the interface connector is "HIGH"_ When SLCT IN is "LOW",<br />

the DC I/DC 3 code is not valid.<br />

(14) NUL (Null)<br />

The NUL code is regarded as the termination for tabulation<br />

setting sequence (described in detail later).<br />

(15) BEL (Bell) ~<br />

When the BEL code is input, the buzzer sounds for about 3<br />

seconds.<br />

(16) Escape (ESC) control<br />

(a) Escape numerical control<br />

Input ofan "ESC" code followed by an ASCII numeric<br />

code permits each of the following functions to be<br />

performed.<br />

1) ESC 0 (Escape 0)<br />

Receipt of an "ESC" followed by ASCII code<br />

"0" causes the line spacing to be set at 1/8 inch.<br />

Input of the ESC 2 code or INIT signal to the<br />

interface connector or turning the power off and on<br />

again causes the line spacing to return to 1/6 inch.<br />

2) ESC 1 (Escape 1)<br />

Receipt of an "ESC" followed by ASCII code<br />

"1" causes the line spacing to be set at 7 /72 inch. ~<br />

Input of the ESC 2 code or INIT signal to the<br />

interface connector or turning the power off and on<br />

again causes the line spacing to return to 1/6 inch.<br />

2-82


(b)<br />

3) ESC 2 (Escape 2)<br />

Receipt of an "ESC" followed by ASCII code<br />

"2" causes the line spacing to be set at 1/6 inch.<br />

When the POWER switch is turned on, the line<br />

spacing is set at initia11/6 inch. The ESC 2 code is<br />

also a command to execute "ESC A+n" modes<br />

(described later).<br />

4) ESC 8 (Escape 8)<br />

The ESC 8 code makes it possible to transmit data<br />

even if there is no paper in the Printer. This code<br />

should be transmitted before the Printer runs out<br />

of paper. After transmitting this code, when the<br />

Printer runs out of paper, the PE signal of the<br />

interface connector turns to High level; the<br />

ERROR signal remains at High level.<br />

5) ESC 9 (Escape 9)<br />

This code cancels the ESC 8 condition. When the<br />

power is turned on, the Printer is initialized into<br />

ESC 9 status. Therefore, the Printer cannot<br />

receive data when there is no paper.<br />

6) ESC SI<br />

This code functions the same as "SI".<br />

7) ESC SO<br />

This code functions the same as "SO".<br />

ESC alphabetic control<br />

Receipt of an "ESC" code followed by ASCII code<br />

"X"(alphabetic code) permits each of the following<br />

functions to be performed.<br />

Note: "n" represents a 7-bit binary number, and the<br />

most significant bit is not treated as data. "+" is<br />

inserted for the purpose of legibility only, and<br />

should not be input in actual operation.<br />

1) ESC A+n<br />

This code specifies the amount of line spacing in<br />

the Line Feed 1 «n>10


The ESC A code is the command only to store<br />

spacing data into the memory. In other words,<br />

even if spacing data was transferred into the<br />

memory, the Printer does not actually carry out<br />

the line spacing in accordance with the spacing<br />

data. To execute the line spacing in accordance<br />

with the stored data, the ESC 2 code should be<br />

followed. Namely, the ESC 2 code is considered<br />

as the execution command for the line spacing.<br />

[DATA] AAAAAAA ICRI [LFl BBBBBBB ICRI !!£] IESC A+24 I<br />

CCCCCCC ICR 1 I1I] DDDDDDD I ESC 21 ICR 1 [ill<br />

[PRINT]<br />

EEEEEEE ICRI ITIJ FFFFFFF ICRI ILFI<br />

AAAAAAA}<br />

BBBBBBB<br />

CCCCCCC<br />

DDDDDDD}<br />

EEEEEEE<br />

1/6 inch = 12 steps/72<br />

1/3 inch = 24 steps/72<br />

FFFFFFF<br />

Note: <br />

When "n" is actually transferred to the<br />

Printer as data, it is transferred in the form<br />

of a 7-bit binary number.<br />

In case of "ESC A+24", actual output to<br />

the Printer is performed as<br />

HHH in hexadecimal<br />

code.<br />

2) ESC B+nl +n2+nk+NUL<br />

(1«n>1O


ehaves like the LF code. Therefore, the paper is <br />

advanced one line after printing. <br />

Receipt of "ESC B" code causes the Printer to <br />

accept the following codes as tab stop line num­<br />

bers until the NUL code is input. The lack of the <br />

NUL code will cause incorrect data printout. <br />

The form length must be set by "ESC C+n" code <br />

prior to setting tab stops. <br />

Input of"ESC B" code followed by only the NUL <br />

code cancels predetermined tab stops. <br />

[DATA] IEseBI H H H INULI<br />

AAAAAAA IVTI BBBBBBB IVTI eeeeeee IVTI DDDDDDD<br />

[PRINT] AAAAAAA .... 1st line<br />

BBBBBBB ... ,4th lines<br />

eeeeeee .... 6th lines<br />

DDDDDDD .... 10th lines<br />

3) ESC C+n (1 «n>1010< 127,Ie::; 112)<br />

This code specifies the horizontal tab stop positions.<br />

The first 112 tab stops per line are<br />

recognized in the Printer, and subsequent tab<br />

stops are ignored. Tab stop numbers must be<br />

received in incremental numerical order.<br />

If a tab stop position of higher value than 80 is<br />

received in normal character printing mode, all<br />

horizontal tab functions after 80 columns are<br />

ignored.<br />

To execute tab stop positions, the HT code should<br />

be input. The HT code is ignored when the horizontal<br />

tab position has not been programmed.<br />

2-85


The NUL code should be input as the command<br />

for the termination ofthe tab set sequence, and the<br />

lack ofthis code will cause incorrect data printout.<br />

1. In case of 5th, 10th and 21st columns.<br />

[DATA] IESCDI H H H INUll ABC l8Il DEF [BIJ GHI [8IJ JKl <br />

@j]1lli <br />

[PRINT] ABC DEF GHI JKl<br />

2. In case of lack of stop position.<br />

[DATA] I ESC DI H H INULI ABC lEIl DEF [!ill GHI [8] JKL @ID [IT]<br />

[PRINT] ABC DEF GHIJKL<br />

3. In case of character data transferring over next tab stop.<br />

[DATA] IESCDI H H H INUll ABCDEF [8II GHI OITJ JKL @ID lIT)<br />

[PRINT] ABCDEF GHI JKl<br />

4. In case of transferring two HT codes at a time.<br />

[DATA] IESC DI H H H I NULl ABCD [8II I SPACE I IT!:!] EFGH [gjJ [];£J<br />

[PRINT] ABCD EFGH<br />

5) ESC E<br />

The ESC E code causes the Printer to print<br />

emphasized characters. Emphasized printing<br />

gives the character a stronger impression on the<br />

paper.<br />

This code can be input in any column position on a <br />

line. <br />

The speed ofthe head carriage reduces to 40 CPS <br />

while printing emphasized characters. <br />

1. [DATA] IESC E I ABCDEFGHI ICR I [ill<br />

[PRINT]<br />

ABCDEFGHI<br />

2. [DATA] Isol IESC E I ABCDEFGHI ICR I (ill<br />

[PRINT]<br />

ABCDEFGHI<br />

6) ESC F<br />

The ESC F code cancels the emphasized printing<br />

mode.<br />

7) ESCG<br />

The ESC G code causes the Printer to perform the<br />

double printing. Double printing is carried out in<br />

the following manner:<br />

a) A character is printed. <br />

b) The paper is advanced by 1/216 inch. <br />

c) The print head prints the same character <br />

again.<br />

In this way, the character becomes bold.<br />

2-86


[DATA] IESCGI ABCDEFGHI<br />

[PRINT]<br />

ABCDEFGHI<br />

ICRI ILFI<br />

8) ESC H<br />

The ESC H code cancels the double printing<br />

mode.<br />

2-87


2-88 <br />

NOTES


5 1/4-Inch Diskette Drive Adapter<br />

The System Unit has space and power for one or two 5-1/4" Diskette<br />

Drives. The drives are soft sectored, single sided, with 40 tracks. They<br />

are Modified Frequency Modulation (MFM) coded in 512 byte<br />

~ sectors, giving a formatted capacity of 163,840 bytes per drive. They<br />

have a track to track access time of 8 ms and a motor start time<br />

of 500 ms.<br />

The 5-1/4" Diskette Drive Adapter fits in one of the System Board's<br />

five System Expansion Slots. It attaches to the two drives via an<br />

internal daisy chained flat cable which connects to one end ofthe drive<br />

adapter. The adapter has a second connector on the other end which<br />

extends through the rear panel of the System Unit. This connector<br />

contains the signals for two additional external drives, thus the 5-1/4"<br />

Diskette Drive Adapter is capable of attaching four 5-1/4" drives, two<br />

internal, and two external.<br />

The adapter is designed for double density MFM coded drives and uses<br />

write precompensation with an analog phase locked loop for clock and<br />

data recovery. The adapter is a general purpose device using the NEe<br />

IlPD765 compatible controller. Thus the drive parameters are<br />

programmable. In addition, the attachment supports the drive's write<br />

~ protect feature.<br />

The adapter is buffered on the I/O bus and uses the System Board direct<br />

memory access (DMA) for record data transfers. An interrupt level is<br />

also used to indicate operation complete and status condition requiring<br />

processor attention.<br />

In general, the 5-1/4" Diskette Drive Adapter presents a high-level<br />

command interface to software I/O drivers. A block diagram of the<br />

5-1/4" Diskette Drive Adapter is on the following page.<br />

2-89


N I'-"<br />

~<br />

~<br />

r--­<br />

BUFFER<br />

I--­<br />

...... '­<br />

INTR.<br />

) <br />

..<br />

I'v- rv'<br />

~<br />

I<br />

CLOCK &<br />

TIMING CKT<br />

WRITE WRITt DATA<br />

PRECOMP.<br />

f-- CKT ~ ­~<br />

•<br />

1 ---<br />

...<br />

L-4 o_.<br />

~<br />

WRITE fI)<br />

DATA i'--- / I-- li'i;'"<br />

...... RODATA<br />

n><br />

OATA f-----,<br />

VCO SYNC SEPARATOR <br />

STD.OATA<br />

I"'"<br />

DATA WINDOW<br />

r-:' .... _. o<br />

I"'"<br />

-<<br />

T<br />

NEC STEP n><br />

HOPPY<br />

DISK<br />

DIRECTION<br />

CONTROLLER :><br />

WRITE ENABLE Q..<br />

~<br />

HEAD SHECT<br />

"0<br />

INDEX n><br />

f"<br />

-'"1<br />

WRITE PROTECT<br />

f"<br />

"-J t::d<br />

TRACT a<br />

L. -1'0.<br />

I"'" -o<br />

JRESET DRIVE A MOTOR ON<br />

DIGITAL <br />

I<br />

o _.<br />

L I---B <br />

I--C ~<br />

CONTRD L ...<br />

-0<br />

OQ<br />

l I---c<br />

e<br />

PORT OHDOER DRIVE A SELECT '"1<br />

~<br />

-B<br />

1---0<br />

UI<br />

'"<br />

(")<br />

li'i;'"<br />

Figure 19. 5%" DISKETTE DRIVE ADAPTER BLOCK DIAGRAM<br />

) )


~<br />

Functional Description<br />

From a programming point ofview, this attachment consists of an 8-bit<br />

digital output register in parallel with a NEC ,uPD765 or equivalent<br />

Floppy Disk Controller (FDC).<br />

In the following description, drives numbers 0-3 are equivalent to drives<br />

A-D respectively.<br />

~<br />

~<br />

Digital Output Register (DOR)<br />

The Digital Output Register (DOR) is an output only register used to<br />

control drive motors, drive selection, and feature enable. All bits are<br />

cleared by the I/O interface reset line. The bits have the following<br />

functions:<br />

Bits 0 and 1<br />

Bit 2<br />

Bit 3<br />

Bits 4,5,6, and 7<br />

Floppy Disk Controller (FDC)<br />

These bits are decoded by the hardware to select<br />

one drive if its motor is on:<br />

Bit 1 0 Drive<br />

0 0 A<br />

o liB<br />

1 0 2 C<br />

1 1 3 D<br />

The FDC is held reset when this bit is clear. It<br />

must be set by the program to enable the FDC.<br />

This bit allows the FDC interrupt and DMA<br />

requests to be gated onto the I/O interface. Ifthis<br />

bit is cleared, the interrupt and DMA request I/O<br />

interface drivers are disabled.<br />

These bits control respectively the motors of<br />

drives 0,1,2,A,B,C, and 3,D. If a bit is clear,<br />

the associated motor is off, and the drive<br />

cannot be selected.<br />

The following is a brief summary ofthe registers and commands implemented<br />

by the FDC.<br />

The FDC contains two registers which may be accessed by the main<br />

system processor; a Status Register and a Data Register. The 8-bit<br />

Main Status Register contains the status information of the FDC, and<br />

may be accessed at any time. The 8-bit Data Register (actually<br />

consisting ofseveral registers in a stack with only one register presented<br />

to the data bus at a time) stores data, commands, parameters, and FDD<br />

status information. Data bytes are read out of, or written into, the Data<br />

2-91


Register in order to program or obtain the results after a particular<br />

command. The Main Status Register may only be read and is used to<br />

facilitate the transfer of data between the processor and FDC.<br />

The bits in the Main Status Register are defmed as follows:<br />

Bit<br />

Number<br />

Name Symbol Description<br />

DBOFDD FDDABusy DAB FDD number is in the<br />

Seek mode.<br />

DBI FDD B Busy DBB FDD number I is in the<br />

Seek mode.<br />

DB2 FDD C Busy DCB FDD number 2 is in the<br />

Seek mode.<br />

DB3 FDDDBusy DDB FDD number 3 is in the<br />

Seek mode.<br />

DB4 FDC Busy CB A read or write command<br />

is in process.<br />

DB5 Non-DMA NDM The FDC is in the non-<br />

Mode<br />

DMAmode.<br />

DB6 Data Input! DIO Indicates direction of data<br />

transfer between FDC<br />

and Processor. If<br />

D I 0 = "I", then transfer<br />

is from FDC Data Regis­<br />

- ter to the Processor, If<br />

DIO = "0", then transfer<br />

is from the Processor to<br />

FDC Data Register.<br />

DB7 Request for RQM Indicates Data Register is<br />

Master<br />

ready to send or receive<br />

data to or from the Processor.<br />

Both bits DIO and<br />

RQM should be used to<br />

perform the handshaking<br />

functions of "ready" and<br />

"direction" to the<br />

processor.<br />

2-92


The FOe is capable of performing 15 different commands. Each<br />

command is initiated by a multi-byte transfer from the processor, and<br />

the result after execution of the command may also be a multi-byte<br />

transfer back to the processor. Because ofthis multi-byte interchange of<br />

information between the FOe and the processor, it is convenient to<br />

~ consider each command as consisting of three phases:<br />

Command Phase<br />

The FDC receives all information required to perform a particular operation<br />

from the processor.<br />

Execution Phase<br />

The FOe performs the operation it was instructed to do.<br />

Result Phase<br />

After completion of the operation, status and other housekeeping<br />

information are made available to the processor.<br />

2-93


Programming Considerations<br />

Table 13. Symbol Descriptions<br />

The following tables define the symbols used in the command summary<br />

which follows.<br />

SYMBOL<br />

NAME<br />

AO Address Une 0<br />

C<br />

0 Data<br />

Cylinder Number<br />

07-00 Data Bus<br />

OTL<br />

EDT<br />

GPl<br />

H<br />

HO<br />

HlT<br />

HUT<br />

MF<br />

MT<br />

N<br />

NCN<br />

Data length<br />

End of Track<br />

Gap length<br />

Head Address<br />

Head<br />

Head load Time<br />

Head Unload Time<br />

FM or MFM Mode<br />

Multi-Track<br />

Number<br />

New Cylinder<br />

Number<br />

OESCRIPTION<br />

AO controls selection of Main Status Register<br />

(AO = 0) or Data Register (AO = 1).<br />

Cstands for the current/selected Cylinder<br />

(track) number of the medium.<br />

ostands for the data pattern which is going to<br />

be written into a Sector.<br />

8-bit Data Bus, where 07 stands for a most<br />

significant bit, and DO stands for a least<br />

significant bit.<br />

When N is defined as 00, OTl stands for the<br />

data length which users are going to read out<br />

or write into the Sector.<br />

EDT stands for the final Sector number on a<br />

Cylinder.<br />

GPl stands for the length of Gap 3 (spacing<br />

between Sectors excluding VCD Sync. Field).<br />

Hstands for head number 0 or 1, as specified<br />

in 10 field.<br />

HO stands for a selected head number 0 or 1.<br />

(H = H 0 in all command words.)<br />

H l T stands for the head load time in the F 0 0<br />

(4 to 512 ms in 4 ms increments).<br />

HUT stands for the head unload time after a<br />

read or write operation has occurred (0 to<br />

480 ms in 32 ms increments.)<br />

If M F is low, FM mode is selected, and if it is high,<br />

MFM mode is selected only if MFM is implemented.<br />

If MT is high, a multi-track operation is to<br />

be performed. (A cylinder under both HOO<br />

and H D 1 will be read or written.)<br />

Nstands for the number of data bytes written<br />

in a Sector. <br />

NCN stands for a new Cylinder number, which <br />

is going to be reached as a result of the Seek <br />

operation. Desired position of Head. <br />

2-94


Table 13. Symbol Descriptions (continued)<br />

SYMBOL<br />

NO<br />

<strong>PC</strong>N<br />

R<br />

R/W<br />

SC<br />

SK<br />

SRT<br />

NAME<br />

Non-DMA Mode<br />

Present Cylinder<br />

Number<br />

Record<br />

Read/Write<br />

Sector<br />

Skip<br />

Step Rate Time<br />

ST 0 Status 0<br />

ST 1 Status 1<br />

ST 2 Status 2<br />

ST3 Status 3<br />

STP<br />

USO,<br />

US1<br />

Scan Test<br />

Unit Select<br />

DESCRIPTION<br />

ND stands for operation in the Non-DMA Mode.<br />

<strong>PC</strong>N stands for Cylinder number at the completion<br />

of SENSE INTER RUPT STATUS Command,<br />

indicating the position of the Head at present<br />

time.<br />

Rstands for the Sector number, which will<br />

be read or written.<br />

R!W stands for either Read (R) or Write (W)<br />

signal.<br />

SC indicates the number of Sectors per Cylinder.<br />

SK stands for Skip Deleted Data Address Mark.<br />

SRT stands for the Stepping Rate for the FDD.<br />

(2 to 32 ms in 2 ms increments'!<br />

ST 0-3 stand for one of four registers which<br />

store the status information after a command<br />

has been executed. This information is available<br />

during the result phase after command execution.<br />

These registers should not be confused<br />

with the main status register (selected by AO =0).<br />

ST 0-3 may be read only after a command has<br />

been executed and contain information<br />

relevant to that particular command.<br />

During a Scan operation, if STP = 1, the data in<br />

contiguous sectors is compared byte by byte<br />

with data sent from the processor (or DMA),<br />

and if STP = 2, then alternate sectors are<br />

read and compared.<br />

US stands for a selected drive number<br />

encoded the same as bits 0 and 1<br />

of the digital register (DOR) p 2-91<br />

2-95


Command Summary<br />

oindicates 'logical 0' for that bit, 1 means 'logical 1',<br />

X means 'don't care'.<br />

DATA BUS<br />

PHASE RIW D7 D6 D5 D4 D3 D2 Dl DO REMARKS<br />

READ DATA<br />

Command W MT MF SK 0 0 1 1 0 Com mand Codes<br />

W X X X X X HD US1 usn<br />

W C Sector 10<br />

W H information prior<br />

W R to Command execution<br />

W<br />

N<br />

W<br />

EDT<br />

W<br />

GPl<br />

W<br />

DlL<br />

Exec"tion<br />

Data-transfer between<br />

the FDD and main-system<br />

Result R ST 0 Status information after<br />

R ST 1 Command execution<br />

R ST 2<br />

R C Sector 10 information<br />

R H after Command execution<br />

R<br />

R<br />

R<br />

N<br />

READ DELETED DATA<br />

Command W MT MF SK 0 1 1 0 0 Command Codes<br />

W X X X X X HD US1 usn<br />

w C Sector I D information<br />

W H prior to Command<br />

W R execution<br />

W<br />

N<br />

W<br />

EDT<br />

W<br />

GPl<br />

W<br />

DlL<br />

Execution<br />

Data-transfer between<br />

the FDD and main-system<br />

Result R ST 0 Status information after<br />

R ST 1 command execution<br />

R ST 2<br />

R C Sector 10 information<br />

R H after command execution<br />

R<br />

R<br />

R<br />

N<br />

WRITE DATA<br />

Command W MT MF 0 0 0 1 0 1 Command Codes<br />

W X X X X X HD US1 usn<br />

w C Sector I D information<br />

Execution<br />

W H to command execution<br />

W<br />

R<br />

W<br />

N<br />

W<br />

EDT<br />

W<br />

GPl<br />

W<br />

DTl<br />

Data-transfer between<br />

the main-system and FDD<br />

Result R STO Status information after<br />

R ST 1 command execution<br />

R ST 2<br />

R C Sector 10 information<br />

R H after command execution<br />

2-96 <br />

R<br />

R<br />

R<br />

N


Command Summary (continued) <br />

DATA BUS<br />

PHASE RIW 07 06 05 04 03 02 01 DO REMARKS<br />

WRITE DELETED DATA<br />

Command W MT MF 0 0 1 0 0 1 Command Codes<br />

W X X X X X HO US1 usn<br />

W C Sector 10 information<br />

W H prior to command<br />

W R execution<br />

W<br />

N<br />

Execution<br />

Result<br />

W<br />

W<br />

W<br />

EDT<br />

GPL<br />

DTL<br />

Data-transfer between<br />

FDD and main-system<br />

Status 10 information<br />

after common execution<br />

R<br />

R<br />

ST 0<br />

ST 1<br />

R ST 2<br />

R C Sector 10 information<br />

R H after command execution<br />

R<br />

R<br />

R<br />

N<br />

READ A TRACK<br />

Command W 0 MF SK 0 0 0 1 0 Command Codes<br />

W X X X X X HD US1 usn<br />

W C Sector 10 information<br />

W H prior to command<br />

W R execution<br />

W<br />

N<br />

W<br />

EDT<br />

W<br />

GPL<br />

W<br />

DTL<br />

Execution<br />

Data-transfer between<br />

the FDO and main-system.<br />

FDC reads all of cylinders<br />

contents from index hole<br />

to EDT.<br />

Result R STO Status information after<br />

R ST 1 command execution<br />

R ST 2<br />

R C Sector 10 information<br />

R H after command execution<br />

R<br />

R<br />

R<br />

N<br />

READID<br />

Command W 0 MF 0 0 1 0 1 0 Command Codes<br />

W X X X X X HD US1 usn<br />

Execution<br />

The first correct ID<br />

information on the<br />

cylinder is stored in<br />

data register.<br />

Result R STO Status information<br />

R ST 1 after command execution<br />

R ST 2<br />

R C Sector 10 information<br />

R H during execution phase<br />

R<br />

R<br />

R<br />

N<br />

f:<br />

f;<br />

f:<br />

~<br />

I=.:<br />

2-97


Command Summary (continued) <br />

OATA BUS<br />

PHASE R/W 07 06 05 04 03 02 01 00 REMARKS<br />

FORMAT A TRACK<br />

Command W 0 MF 0 0 1 1 0 0 Command Codes<br />

W X X X X X HD US1 usn<br />

w N Bytes/Sector<br />

W SC Sector/Track<br />

W GPL Gap 3<br />

W 0 filler byte<br />

Execution<br />

FOe formats an entire<br />

cylinder<br />

Result R ST 0 Status information<br />

R ST 1 after command<br />

R ST 2 execution<br />

R C Iil this case, the ID<br />

R H information has no<br />

R R meaning<br />

R<br />

N<br />

SCAN EQUAL<br />

Command W MT MF SK 1 0 0 0 1 Command Codes<br />

W X X X X X HO US1 usn<br />

W C Sector lDinformatio n<br />

W H prior to command<br />

W R execution<br />

W<br />

N<br />

W<br />

EDT<br />

W<br />

GPL<br />

W<br />

STP<br />

Execution<br />

Data compared between<br />

the FOD and main-system<br />

Result R STO Status information after<br />

R ST 1 command execution<br />

R ST 2<br />

R e Sector ID information<br />

R<br />

H<br />

R<br />

R<br />

R<br />

N<br />

SCAN LOW OR EQUAL<br />

Command W MT MF SK 1 1 0 0 1 Command Codes<br />

W X X X X X HO US1 usn<br />

W C Sector 10 information<br />

W H prior to command<br />

W R execution<br />

W<br />

N<br />

W<br />

EDT<br />

W<br />

GPL<br />

W<br />

STP<br />

Execution<br />

Oata compared between<br />

the FOO and main-system<br />

Result R STU Status information after<br />

R ST 1 command execution<br />

R<br />

ST2<br />

R C Sector 10 information<br />

R H after command execution<br />

R<br />

R<br />

R<br />

N<br />

2-98


Command Summary (continued) <br />

DATA BUS<br />

PHASE RIW 07 06 05 04 03 02 01 DO REMARKS<br />

SCAN HIGH OR EQUAL<br />

Command W MT MF SK 1 1 1 0 1 Command Codes<br />

W X X X X X HD US1 usa<br />

w C Sector 10 information<br />

W H prior to command<br />

W R execution<br />

W<br />

N<br />

W<br />

EDT<br />

W<br />

GPL<br />

W<br />

STP<br />

Execution<br />

Data compared between<br />

the FDD and main-system<br />

Result R ST 0 Status information after<br />

R ST 1 command execution<br />

R ST 2<br />

R C Sector 10 information<br />

R H after command execution<br />

R<br />

R<br />

R<br />

N<br />

RECALIBRATE<br />

Command W 0 0 0 0 0 1 1 1 Command Codes<br />

W X X X X X 0 US1 usa<br />

Execution Head retracted to track 0<br />

No Result<br />

Phase<br />

SENSE INTERRUPT STATUS<br />

Command W 0 0 0 0 1 0 0 0 Command Codes<br />

Result R ST 0 Status information at<br />

R <strong>PC</strong>N the end of seek operati<br />

on about the F 0 C<br />

SPECIFY<br />

Command W 0 0 0 0 0 0 1 1 Command Codes<br />

W -SRT HUT­<br />

W --HLT NO<br />

No Result<br />

Phase<br />

SENSE DRIVE STATUS<br />

Command W 0 0 0 0 0 1 0 0 Command Codes<br />

W X X X X X HD US1 usa<br />

Result R ST 3 Status information<br />

about FDD<br />

SEEK<br />

Command W 0 0 0 0 1 1 1 1 Command Codes<br />

Execution<br />

No Result<br />

Phase<br />

W X X X X X HD US1 usa<br />

w<br />

NCN<br />

Head is positioned<br />

over proper cylinder<br />

on diskette<br />

INVALID<br />

Command W Invalid Codes Invalid command codes<br />

(NoDp - FDC goes into<br />

standby state)<br />

Result R ST 0 STO=80<br />

2-99


Command Status Registers<br />

Table 14. Status Register 0<br />

NO.<br />

07<br />

06<br />

NAME<br />

Interrupt<br />

Code<br />

05 Seek End<br />

BIT<br />

04 Equipment<br />

Check<br />

03 Not Ready<br />

02 Head Address<br />

01 Unit Select 1<br />

DO Unit Select 0<br />

SYMBOL<br />

IC<br />

SE<br />

EC<br />

NR<br />

HO<br />

US 1<br />

US 0<br />

DESCRIPTION<br />

07 = 0 and 06 = 0<br />

Normal termination of command, (NT),<br />

Command was completed and properly<br />

executed.<br />

07 = 0 and 06 =1<br />

Abnormal termination of command,<br />

(AT). Execution of command was<br />

started, but was not successfully<br />

completed.<br />

07 =1 and 06 = 0<br />

Invalid command issue (lC). Command<br />

wh ich was issued was never started.<br />

07 = 1 and 06 =1<br />

Abnormal termination because during<br />

command execution the ready signal<br />

from FOO changed state.<br />

When the FOC completes the Seek<br />

command, this flag is set to 1 (high).<br />

If a fault signal is received from the<br />

FOO, or if the track 0 signal fails to<br />

occur after 77 step pulses (recalibrate<br />

command) then this flag is set.<br />

When the F 0 0 is in the not·ready state<br />

and a read or write command is issued,<br />

this flag is set. If a read or write command<br />

is issued to side 1 of a single sided drive,<br />

then this flag is set.<br />

This flag is used to indicate the state<br />

of the head at interrupt.<br />

These flags are used to indicate a Drive<br />

unit Number at interrupt.<br />

2-100


Table 15. Status Register I<br />

BIT<br />

NO. NAME SYMBOL<br />

D7 End of Cylinder EN<br />

D6 - ­<br />

D5 Data Error DE<br />

D4 Over Run OR<br />

D3 - ­<br />

D2 No Data ND<br />

Dl Not Writable NW<br />

DO Missing Address MA<br />

Mark<br />

DESCRIPTION<br />

When the FD Ctries to access a sector<br />

beyond the final sector of a cylinder,<br />

this flag is set.<br />

Not used. This bit is always 0 (low).<br />

When the FDC detects a CRC error in<br />

either the I D field or the data field, ~<br />

this flag is set. t;<br />

~<br />

If the FDC is not serviced by the main· t;<br />

systems during data transfers within a f-<br />

certain time interval, this flag is set.<br />

Not used. This bit is always 0 (low).<br />

During Execution of a Read Data, Write<br />

Deleted Data, or Scan command, if the<br />

FDC cannot find the sector specified<br />

in the I D register, this flag is set.<br />

During execution of the Read I D<br />

command, if the FDC cannot read<br />

the I D field without an error, then<br />

this flag is set.<br />

During the execution of the Read-a-<br />

Cylinder command, if the starting<br />

sector cannot be found, then this<br />

flag is set.<br />

During Execution of a Write Data, Write<br />

Deleted Data, or Format aCyl inder<br />

command, if the FDC detects a write<br />

protect signal from the F DO, then this<br />

flag is set.<br />

If the FDC cannot detect the I D Address<br />

Mark, this flag is set. Also at the same<br />

time, the MD (Missing Address Mark in<br />

Data Field) of Status Register 2 is set.<br />

2-101


Table 16. Status Register 2<br />

BIT<br />

NO. NAME SYMBOL<br />

07 - ­<br />

06 Control Mark CM<br />

05 Data Error in DO<br />

Data Field<br />

04 Wrong Cylinder WC<br />

03 Scan Equal Hit SH<br />

02 Scan Not SN<br />

Satisifed<br />

01 Bad Cylinder BC<br />

00 Missing Address MD<br />

Mark in Data<br />

Field<br />

DESCRIPTION<br />

Not Used. This bit is always 0 (low).<br />

During execution of the Read Data or<br />

Scan command, if the FDC encounters<br />

a sector which contains a Deleted Data<br />

Address Mark, this flag is set.<br />

If the FOC detects a CRC error in the<br />

data then this flag is set.<br />

This bit is related with the NO bit, and<br />

when the contents of Con the medium<br />

are different from that stored in the<br />

ID Register, this flag is set.<br />

During execution of the Scan command,<br />

if the condition of "equal" is satisfied,<br />

this flag is set.<br />

During execution of the Scan command,<br />

if the FDC cannot find a sector on the<br />

cylinder which meets the condition, then<br />

this flag is set.<br />

This bit is related with the NO bit, and<br />

when the contents of C on the medium<br />

are different from that stored in the ID<br />

Register, and the content of C is FF, then<br />

this flag is set.<br />

When data is read from the medium, if<br />

the FDC cannot find a Data Address<br />

Mark or Deleted Data Address Mark,<br />

then this flag is set.<br />

2-102


Table 17. Status Register 3<br />

BIT<br />

NO. NAME SYMBOL DESCRIPTION<br />

07 Fault FT This bit is used to indicate the status of<br />

the Fault signal from the FOO.<br />

OS Write Protected WP<br />

05 Ready RY<br />

04 Track 0 TO<br />

03 Two Side TS<br />

02 Head Address HO<br />

01 Unit Select 1 US 1<br />

DO Unit Select 0 US 0<br />

This bit is used to indicate the status of<br />

the Write Protected signal from the FOD.<br />

This bit is used to indicate the status of<br />

the Ready signal from the FDD.<br />

I<br />

This bit is used to indicate the status of f:<br />

the Track 0 signal from the FOO. ~<br />

This bit is used to indicate the status of<br />

the Two Side signal from the FDD.<br />

This bit is used to indicate the status of<br />

Side Select signal to the FOD.<br />

This bit is used to indicate the status of<br />

the Unit Select 1 signal to the FOO.<br />

This bit is used to indicate the status of<br />

the Unit Select 0 signal to the FOD.<br />

~<br />

I<br />

Programming Summary<br />

DPe Registers (Ports)<br />

FDC Data Reg<br />

FDe Main, Status Reg<br />

Digital Output Reg<br />

I/O Address 3F5<br />

110 Address 3F4<br />

I/O Address 3F2<br />

Bit 0 Drive OO:DR#A 10: DR #C<br />

1 Select 01: DR #B 11: DR #D<br />

2 Not FDC Reset<br />

3 Enable INT & DMA Requests<br />

4 Drive A Motor Enable<br />

5 Drive B Motor Enable<br />

6 Drive . C Motor Enable<br />

7 Dnve D Motor Enable<br />

All bits cleared with channel reset.<br />

2-103


Interrupt 6<br />

DMA 2<br />

100 Disk Format <br />

1 Head, 45 cylinders, 8 sectors/TRK, 512 bytes/sector,MFM. <br />

FDC Constants<br />

N: H'02', SC: 08, HUT: F, SRT: C, GPL FORMAT: H'05',<br />

GPL RD/WR: 2A, HLT: 01, (8ms track-track)<br />

Drive Constants<br />

HD Load 35 ms<br />

HD Settle 25 ms<br />

Motor Start 500 ms<br />

Comments<br />

1. Head loads with drive select, wait HD Load time before RD/WR<br />

2. Following access, wait HD Settle time before RD/WR<br />

3. Drive motors should be off when not in use. Only A or B and C or D<br />

may run simultaneously. Wait Motor Start time before RD/WR ,..-.....,<br />

4. Motor must be on for drive to be selected.<br />

5. Data Errors can occur while using a Home Television as the<br />

system display. Locating the TV too close to the diskette area can<br />

cause this to occur. To correct the problem, move the TV away<br />

from, or to the opposite side of the System Unit.<br />

System I/O Channel Interface<br />

All signals are TTL compatible:<br />

MPUL 5.5 Vdc<br />

LPUL 2.7 Vdc<br />

MPDLO.5 Vdc<br />

LPDL -0.5 Vdc<br />

The following lines are used by this adapter.<br />

+DO-7 (Bidirectional, Load: 1 74LS; Driver: 74LS 3-state) ~<br />

These eight lines form a bus by which all commands,<br />

status, and data are transferred. Bit 0 is the loworder<br />

bit.<br />

2-104


~<br />

~<br />

+AO-9 <br />

+AEN<br />

-lOW<br />

-lOR<br />

-DACK2<br />

+T/C<br />

+RESET<br />

+DRQ2<br />

~ +IRQ6<br />

(Adapter Input, Load: 1 74LS)<br />

These ten lines form an address bus by which a<br />

register is selected to receive or supply the byte<br />

transferred via lines DO-7. Bit 0 is the low-order bit.<br />

(Adapter Input, Load: 1 74LS)<br />

The content of lines AO-9 is ignored if this line is<br />

active.<br />

(Adapter Input, Load: 1 74 LS)<br />

The content of lines DO-7 is stored in the register<br />

addressed by lines AO-9 or DACK2 at the trailing<br />

edge of this signal.<br />

(Adapter Input, Load: 1 74LS)<br />

The content of the register addressed by lines AO-9<br />

or DACK2 is gated onto lines DO-7 when this line<br />

is active.<br />

(Adapter Input, Load: 2 74LS)<br />

This line active degates output DRQ2, selects the<br />

FDC data register as the source/destination of bus<br />

DO-7, and indirectly gates T / C to IRQ6.<br />

(Adapter Input, Load: 4 74 LS)<br />

This line and DACK2 active indicates that the byte<br />

of data for which the DMA count was initialized is<br />

now being transferred.<br />

(Adapter Input, Load: 1 74LS)<br />

An up level aborts any operation in process and<br />

clears the Digital Output Register (DOR).<br />

(Adapter Output, Driver: 74LS 3-state)<br />

This line is made active when the attachment is ready<br />

to transfer a byte ofdata to or from main storage. The<br />

line is made inactive by DACK2 becoming active or<br />

an I/O read of the FDC data register.<br />

(Adapter Output, Driver: 74LS 3-state)<br />

This line is made active when the FDC has completed<br />

an operation. It results in an interrupt to a<br />

routine which should examine the FDC result bytes<br />

to reset the line and determine the ending condition.<br />

2-105


Drive A and B Interface<br />

All signals are TTL compatible:<br />

MPUL 5.5 Vdc<br />

LPUL 2.4 Vdc<br />

MPDLO.4 Vdc<br />

LPDL -0.5 Vdc<br />

All adapter outputs are driven by open-collector gates. The drive(s)<br />

must provide termination networks to Vcc (except Motor Enable 1<br />

which has a two kohm resistor to Vcc).<br />

Each adapter input is terminated with a 150 ohm resistor to V cc.<br />

Adapter Outputs<br />

-Drive Select A&B (Driver: 7438)<br />

These two lines are used by drives A&B to<br />

de gate all drivers to the adapter and<br />

receivers from the attachment (except Motor<br />

Enable) when the line associated with a drive is<br />

not active.<br />

-Motor Enable A&B (Driver: 7438)<br />

The drive associated with each of these lines r"\<br />

must control its spindle motor such that it starts<br />

when the line becomes active and stops when<br />

the line becomes not active.<br />

-Step (Driver: 7438)<br />

The selected drive moves the read/write head<br />

one cylinder in or out per the direction line<br />

for each pulse present on this line.<br />

-Direction (Driver: 7438)<br />

For each recognized pulse of the step line the<br />

read/write head moves one cylinder toward<br />

the spindle if this line is active, and away<br />

from the spindle if not-active.<br />

-Write Data (Driver: 7438)<br />

For each not-active to active transition of this<br />

line while Write Enable is active, the selected<br />

drive causes a flux change to be stored on<br />

the disk.<br />

-Write Enable (Driver: 7438)<br />

The drive disables write current in the head<br />

unless this line is active.<br />

2-106


Adapter Inputs<br />

-Index<br />

-Write Protect<br />

r"\<br />

-Track 0<br />

-Read Data<br />

The selected drive supplies one pulse per<br />

disk revolution on this line.<br />

The selected drive makes this line active if<br />

a write protected diskette is mounted in the<br />

drive.<br />

The selected drive makes this line active if<br />

the read/write head is over track O.<br />

The selected drive supplies a pulse on this<br />

line for each flux change encountered on the<br />

disk.<br />

2-107


5-1/4" Diskette Drive Adapter<br />

Internal Interface Specifications<br />

34 PIN KEYED<br />

EDGE CONNECTOR<br />

NOTE: LANDS 1-33 ARE ON THE BACKSIDE<br />

OF THE BOARD, LANDS 2-34 ARE ON THE<br />

FRONT, OR COMPONENT SIDE.<br />

COMPONENT<br />

SIDE<br />

AT STANDARD TTL LEVELS<br />

Land No.<br />

.....<br />

"'"<br />

...<br />

...<br />

...<br />

"'" .....<br />

...<br />

.....<br />

.....<br />

<strong>IBM</strong> 5 1/4" "'"<br />

Diskette<br />

Drives ...<br />

...<br />

"'"<br />

Ground-Odd Numbers<br />

Unused<br />

Index<br />

Motor Enable A<br />

Drive Select B<br />

Drive Select A<br />

Write Data<br />

Write Enable<br />

Track 0<br />

Write Protect<br />

Read Data<br />

Select Head 1<br />

Unused<br />

1-33 <br />

2,4,6 <br />

8 ---.. ...<br />

10<br />

Motor Enable B<br />

16 5 1/4" Diskette<br />

Direction (Stepper Motor! 18<br />

Drive<br />

Adapter<br />

Step Pulse<br />

20<br />

12<br />

14<br />

22<br />

24<br />

26 ..<br />

...<br />

28 ...<br />

<br />

30 ... <br />

32<br />

34<br />

2-108


5-1/4" Diskette Drive Adapter<br />

External Interface Specifications<br />

REAR PANEL<br />

37 PIN '0' SHELL<br />

CONNECTOR<br />

o<br />

1 • • 20<br />

• •<br />

• •<br />

• •<br />

• • 37<br />

o<br />

AT STANDARD TTL LEVELS<br />

Pin no.<br />

Unused<br />

1 ·5 <br />

Index 6 ..<br />

I... Motor Enable C 7<br />

1""1"<br />

I...<br />

....<br />

Drive Select 0 8<br />

... Drive Select C 9<br />

I""'"<br />

-<br />

.....<br />

Motor Enable 0 10<br />

I... Direction (Stepper Motod 11<br />

External .....<br />

5%" Diskette<br />

Drives ... Step Pulse 12 Drive<br />

....<br />

Adapter<br />

... Select Head 1 13<br />

~<br />

Write Enable 14<br />

...<br />

-<br />

....­<br />

Track 0 15 Write Protect 16 Read Data 17 ..<br />

~-..<br />

Write Data 18<br />

Ground 20·37<br />

..<br />

2-109


5-1/4" Diskette Drive<br />

The <strong>IBM</strong> 5-1/4" Diskette Drive is a single sided, double density, 40<br />

track unit. The Diskette Drive has a formatted capacity of 163,840<br />

bytes, and is capable of reading and recording digital data using<br />

Modified Frequency Modulation (MFM) methods. User access for<br />

diskette loading is provided by way of a slot located at the front ~<br />

of the unit.<br />

The Diskette Drive is fully self-contained and requires no operator<br />

intervention during normal operation. The Drive consists of a spindle<br />

drive system, a head positioning system, and read/write/erase system.<br />

When the front latch is opened, access is provided for the insertion of a<br />

diskette. The diskette is positioned in place by plastic guides, and the<br />

front latch. In!out location is ensured when the diskette is inserted until<br />

a back stop is encountered.<br />

Closing the front latch activates the cone/clamp system resulting in<br />

centering of the diskette and clamping of the diskette to the drive hub.<br />

The drive hub is driven at a constant speed of 300 rpm by a servo<br />

controlled DC motor. In operation, the magnetic head is loaded into<br />

contact with the recording medium whenever the front latch is closed.<br />

The magnetic head is positioned over the desired track by means of a<br />

4-phase stepper motor/band assembly and its associated electronics.<br />

This positioner employs a one-step rotation to cause a I-track linear<br />

movement. When a write-protected diskette is inserted into the Drive,<br />

the write-protect sensor disables the write electronics of the Drive and<br />

an appropriate signal is applied to the interface.<br />

When performing a write operation, a 0.33 mm (0.013-in.) data track<br />

is recorded. This track is then tunnel erased to 0.30 mm (0.012 in.).<br />

Data recovery electronics include a low-level read amplifier, differentiator,<br />

zero-crossing detector, and digitizing circuits. All data decoding<br />

is provided by the adapter card.<br />

The Drive is also supplied with the following sensor systems:<br />

(I)<br />

A track 00 switch which senses when the Head/Carriage<br />

assembly is positioned at Track 00.<br />

(2) The index sensor, which consists of a LED light source and<br />

phototransistor, is positioned such that when an index hole is ,.-......,<br />

detected, a sigital signal is generated.<br />

2-110


(3) The write-protect sensor disables the Diskette Drive electronics<br />

whenever a write-protect tab is applied to the diskette.<br />

For Interface Information, refer to the Diskette Drive Adapter<br />

section.<br />

~ Diskettes<br />

The <strong>IBM</strong> 5-1/4" Diskette Drive uses a standard 133.4 mm (5.25 in.)<br />

diskette. For programming considerations, single sided, double density<br />

soft sectored diskettes are used. The figure below is a simplified<br />

drawing of the diskette used with the Diskette Drive. This recording<br />

medium is a flexible magnetic disk enclosed in a protective jacket. The<br />

protected disk, free to rotate within the jacket, is continuously cleaned<br />

by the soft fabric lining of the jacket during normal operation.<br />

Read/Write erase head access is made through an opening in the jacket.<br />

Openings for the drive hub and diskette index hole are also provided.<br />

_____ m<br />

11--­<br />

3.S6 mm<br />

(D.140 INCH) 630 + 0.25 mm 133.4 mm<br />

I - I~Fr{025+ 0.01 INCH) j- (5.251NCH)<br />

I 1 ~~~~~~TlVE~ /' -- - - ---- "-..<br />

I - JACKET I -, /<br />

1 to IOXIDECOATED \\<br />

SPINDLE<br />

~ 9) E~ 133.4mm I MYLARDIS~.<br />

~ @ ~~ {5025j1NCHI ( \0)<br />

m gf LINER Ir~ ~ ~g~~ss /<br />

1<br />

___ '33.4mm -j- - ~.'-.... ·O~~~/:~TU/RE /<br />

1... (5.25 INCH)<br />

----<br />

­<br />

I<br />

-----<br />

RECORDING MEDIUM<br />

2-111


Table 18.<br />

Mechanical and Electrical Specifications<br />

Media<br />

Tracks per inch<br />

Number of Tracks<br />

Dimensions<br />

Height<br />

Width<br />

Depth<br />

Weight<br />

Temperature<br />

(Exclusive of Media)<br />

Operating<br />

Non-operating<br />

Relative Humidity<br />

(Exclusive of Media)<br />

Operating<br />

Non-operating<br />

Seek Time<br />

Head Setting Time<br />

Error Rate<br />

Head Life<br />

Media Life<br />

Disk Speed<br />

Instantaneous Speed Variation<br />

Start/Stop Time<br />

Transfer Rate<br />

Recording Mode<br />

Power<br />

Industry-compatible 5%-inch diskette<br />

48<br />

(4·0)<br />

85.85 mm (3_38 inches)<br />

149.10 mm (5.87 inches)<br />

203.2 mm (8.0 inches)<br />

2.04 Kg (4.5 Ibs.)<br />

100eto 440 C (500 F to 1120 F)<br />

-400eto 600 C(-400 Fto 1400 F)<br />

20% to 80% (Non-condensing)<br />

5% to 95% (Non-condensing)<br />

8 msec track to track<br />

25 msec !last track addressed)<br />

1 per 10 9 (recoverable)<br />

1 per 10 12 (non-recoverable)<br />

1 per 10 6 (seeks)<br />

20,000 hours (normal use)<br />

3.0 x 10 6 passes per trac k <br />

300 rpm ± 1.5% (long term) <br />

±3.0% <br />

500 msec (maximum) <br />

250 Kbits/sec <br />

MFM <br />

+12 dc ± 0.6v 900 rna AVE. <br />

+5v de ± 0.25 v, 600 rna AVE. <br />

2-112


Memory Expansion Options<br />

Two Memory Expansion Options offered for the <strong>IBM</strong> Personal<br />

Computer are the 32K x 9 and the 64K x 9 Memory Expansion<br />

Options. These options plug into any ofthe five System Expansion slots<br />

on the System Board. These options are used to extend system memory<br />

beyond 64KB. A maximum of 64KB of memory may be installed on<br />

the System Board as modules without using any System Expansion<br />

Slots or Expansion Options.<br />

An expansion option must be configured to reside at sequential32K or<br />

64K memory address boundary within the system address space. This<br />

is done by setting dip switches on the option.<br />

The expansion options are designed with 250 ns access 16K x 1<br />

dynamic memory chips. On the 32KB card, 16-pin industry standard<br />

parts are used. On the 64 KB card, stacked modules are used resulting<br />

in a 32K xI 18-pin module. This allows the 32KB and 64KB to have<br />

approximately the same packaging densities.<br />

Both expansion options are parity checked and if a parity error is<br />

detected, a latch is set and an I/O channel check line is activated,<br />

indicating an error to the processor.<br />

".-,., In addition to the memory modules, the expansion options contain the<br />

following circuits: bus buffering, dynamic memory timing generation,<br />

address multiplexing, and card select decode logic.<br />

Dynamic memory refresh timing and address generation are functions<br />

which are not performed on the expansion options but are done once on<br />

the System Board and made available in the I/O channel for all devices.<br />

To allow the System to address 32KB and 64KB Memory Expansion<br />

Options, refer to the system configuration switch settings page 2-28.<br />

Operating Characteristics<br />

The System Board operates at a frequency of 4.77 Mhz, which results<br />

in a clock frequency of 210 ns.<br />

Normally, four clock cycles are required for a bus cycle so that an<br />

840 nsec memory cycle time is achieved. Memory write and memory<br />

".-,., read cycles both take four clock cycles, or 840 ns.<br />

2-113


General specifications for memory used on both cards are:<br />

Access - 250 ns <br />

Cycle - 410 ns <br />

Memory Module Description<br />

Each option contains 18 dynamic memory modules. The 32KB<br />

Memory Expansion Option utilizes 16K x 1 bit modules and the<br />

64KB Memory Expansion Options utilizes 32K x 1 bit modules.<br />

Both memory modules require three voltage levels (+5Vdc, -5Vdc,<br />

+ 12V dc) and 128 refresh cycles every 2 msec. Absolute maximum<br />

access times are:<br />

From RAS: 250 ns <br />

From CAS: 165 ns <br />

Table 19. Memory Module Pin Configuration<br />

PIN<br />

NO.<br />

16K X 1 BIT MODULE<br />

(Used on 32KB Card)<br />

1 - 5V<br />

2 Data In **<br />

3 - Write<br />

4 - RAS<br />

5 AO<br />

6 A2<br />

7 Al<br />

8 +12V<br />

9 +5V<br />

10 A5<br />

11 A4<br />

12 A3<br />

13 A6<br />

14 Data Out **<br />

15 - CAS<br />

16 GND<br />

17 - *<br />

18 - *<br />

32K X 1 BIT MODULE<br />

(Used on 64KB Card)<br />

- 5V<br />

Data In **<br />

- Write<br />

- RAS 0<br />

- RAS 1<br />

AO<br />

A2<br />

A1<br />

+12V<br />

+ 5V<br />

A5<br />

A4<br />

A3<br />

A6<br />

Data Out **<br />

- CAS 1<br />

- CASO<br />

GND<br />

* 16K X 1 bit m.odule has only 16 pins. <br />

** Data In and Data Out are tied together (three state bus). <br />

2-114


Switch - Configurable Start Address<br />

Each card has a small DIP Module which contains eight switches. The<br />

switches are used to set the card start address as follows:<br />

Table 20. DIP Module Start Address<br />

NO.<br />

DESCRIPTION<br />

1 ON: A19=O; OFF: A19=1<br />

2 ON: A18=O; OFF: A18=1<br />

3 ON: A17=O; OFF: A17=1<br />

4 ON: A16=O; OFF: A16=1<br />

5 ON: A15=O; OFF: A15=1 *<br />

6 Not Used<br />

7 Not Used<br />

8 Used Only In 64KB RAM Card *<br />

* Switch No.8 may be set on the 64KB Memory Expansion Option to use only half the<br />

memory on the card (i.e., 32KB). If Switch No.8 is ON, all 64KB is accessible. If Switch<br />

No.8 is 0 F F, address bit A15 (as set by Switch No.5) is used to determine wh ich 32KB<br />

are accessible and the 64KB option behaves exactly like a 32KB option.<br />

2-115


2-116 <br />

NOTES


­<br />

Game Control Adapter<br />

The Game Control Adapter allows the system to attach paddles and<br />

joysticks. Up to four paddles or two joysticks may be attached. In<br />

addition, four input for switches are provided. Paddle and joystick<br />

positions are determined by changing resistive values sent to the<br />

adapter. The adapter plus system software converts the present<br />

resistive value to a relative paddle orjoystick position. On receipt ofan<br />

output signal, four timing circuits are started. By determining the time<br />

required for the circuit to time out (a function of the resistance), the<br />

paddle position can be determined. This card could be used as a general<br />

purpose I/O card with four analog (resistive) inputs plus four digital<br />

input points. This card fits into any ofthe five System Board I/O slots.<br />

The game control interface cable attaches to the rear ofthe card which<br />

protrudes through the rear panel of the System Unit.<br />

Game Control Adapter Block Diagram<br />

A9 - AO<br />

'\ ..<br />

../<br />

CONVERT A RESISTIVE INPUT<br />

I 10 ...<br />

...<br />

DECODE TO K<br />

4 I<br />

AEN .. INSTRUCTION RESISTANCE<br />

lOW .. DIGITAL "<br />

PU LSE<br />

lOR ..<br />

.--­<br />

.....- TYPICAL FREQUENCY <br />

07·00 OF 833 Ht <br />

A<br />

DATA BUS A<br />

,r<br />

8 BUFFER/ 4<br />

... DRIVER "­ "<br />

DIGITAL INPUTS<br />

A<br />

"<br />

....<br />

4 I<br />

Figure 20. GAME CONTROL ADAPTER BLOCK DIAGRAM<br />

2-117


Functional Description<br />

Address Decode<br />

The select on the Game Control Adapter is generated by two<br />

74LS138's as an address decoder. AEN must be inactive while the<br />

address is 201 in order to generate the select. The select allows a write r-.,<br />

to fire the one-shots or a read to give the values ofthe trigger buttons and<br />

one-shot outputs.<br />

Data Bus Buffer/Driver<br />

The data bus is buffered by a 74LS244 buffer/driver. For an IN from<br />

address X'20 1', the Game Control Adapter will drive the data bus; at<br />

all other times the buffer is left in the high impedance state.<br />

Trigger Buttons<br />

The trigger button inputs are read via an IN from address X'20 I'. A<br />

trigger button is on each joystick/paddle. These values are seen on<br />

data bits 7 through 4 (see Software Interface sub-section). These<br />

buttons default to an open state and are read as "1". When a button is<br />

depressed, it is read as "0". Software should be aware that these<br />

buttons are NOT debounced in hardware.<br />

Joystick Positions<br />

The joystick position is indicated by a potentiometer for each<br />

coordinate. Each potentiometer has a range from 0 to 100 K ohms that<br />

varies the time constant for each of the four one-shots. As this time<br />

constant is set at different values, the output of the one-shot will be of<br />

varying durations.<br />

All four one-shots are fired at once by an OUT to address X'201'. All<br />

four one-shot outputs will go true after the fire pulse and will remain<br />

high for varying times depending on where each potentiometer is set.<br />

These four one-shot outputs are read via an IN from address X'201 '<br />

and are seen on data bits 3 through O.<br />

2-118


I/O Channel Description<br />

A9-AO:<br />

D7-DO:<br />

1""""'\ lOR, lOW:<br />

AEN:<br />

+SV:<br />

GND:<br />

AI9-AlO:<br />

MEMR,MEMW:<br />

DACKO-DACK3:<br />

IRQ7-IRQ2<br />

DRQ3-DRQ1:<br />

ALE, TIC:<br />

I""""'\CLK, OSC:<br />

Address lines 9 through 0 are used to<br />

address the Game Control Adapter.<br />

Data lines 7 through 0 are the data bus.<br />

I/O Read and I/O Write are used when reading<br />

from or writing to an adapter (IN, OUT).<br />

When active, the adapter must be inactive<br />

and the data bus driver inactive.<br />

Power for the Game Control Adapter.<br />

Common ground.<br />

Unused<br />

Unused<br />

Unused<br />

Unused<br />

Unused<br />

Unused<br />

Unused<br />

1/0 CHCK: Unused<br />

I/O CH RDY:<br />

HRQI/O CH:<br />

RESETDRV:<br />

-Sv, + 12v, -12v:<br />

Interface Description<br />

Unused<br />

Unused<br />

Unused<br />

Unused<br />

The Game Control Adapter has 8 input lines, 4 of which are digital<br />

inputs and 4 of which are resistive inputs. The inputs are read with one<br />

IN from address x'20 1'.<br />

The 4 digital inputs each have a lK ohm pullup resistor to +SV. With<br />

~ no drive on these inputs, a' l' is read. For a '0' reading, the inputs must<br />

be pulled to ground.<br />

The 4 resistive inputs, measured to +SV, will be converted to a digital<br />

pulse with a duration proportional to the resistive load, acccording to<br />

the following equation:<br />

Time = 24.2 fJ-sec + 0.011 (r) fJ-sec<br />

2-119


The user must first begin the conversion by an OUT to address x'201 '.<br />

An IN from address x'201' will show the digital pulse go high and<br />

remain high for the duration according to the resistance value. All four<br />

bits (Bit 3-Bit 0) function in the same manner, their digital pulse will all<br />

go high simultaneously and will reset independently according to the<br />

input resistance value.<br />

Input from address x'201'<br />

Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 <br />

, I<br />

J<br />

\ I<br />

Digital '" Inputs<br />

Resistive --Inputs<br />

The typical input to the Game Control Adapter is a set ofjoysticks or<br />

game paddles.<br />

The joysticks will typically have a set of two joysticks (A&B). These<br />

will have one or two buttons each with two variable resistances each,<br />

with a range from 0 to 100 K ohms. One variable resistance will<br />

indicate the X coordinate and the other variable resistance will indicate<br />

the Y coordinate. This should be attached to give the following<br />

input data:<br />

Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0<br />

B-#}. B-#l A-#2 A-#l B-Y B-X A-Y A-X <br />

Button Button Button Button Coord. Coord. Coord. Coord. <br />

The game paddles will have a set of two (A&B) or four (A,B,C, & D)<br />

paddles. These will have one button each and one variable resistance<br />

each, with a range from 0 to 100 K ohms. This should be attached to<br />

give the following input data:<br />

Bit 7 Bit 6 Bit 5 Bit4 Bit 3 Bit 2 Bit 1 Bit 0<br />

D C B A D C B A<br />

Button Button Button Button Coord. Coord. Coord. Coord.<br />

A schematic diagram for attaching a set of game controllers is on<br />

page 2-121.<br />

2-120


) ) ) <br />

15 PIN MALE '0' SHELL c....t<br />

o<br />

'<<br />

CONNECTOR<br />

-f)<br />

__ -, JOYSTICK A ~<br />

JOYSTICK B<br />

~------------, _--- 1~ r-------------~ I I /-- • I I til<br />

f)<br />

I I 2 I I t:r'<br />

~<br />

: X COORDINATE : 9 • : 6 X COORDINATE :<br />

I • 3 I<br />

3<br />

L- BUTTON I<br />

: '1'~ ;:<br />

't'<br />

~<br />

.....<br />

-f)<br />

, BUTTON,.! : ,0 I<br />

i ~ ; : :<br />

Y COORDINATE : 12 • : :<br />

~ I I • 6 : I Y COO RDIN ATE<br />

I I 13 • I I ~<br />

(I)<br />

.....<br />

: : • 7 I : <br />

I I 14 • : I <br />

I I • 8 I I <br />

I L _____________J" I J 15 • I I L _____________ ...1<br />

---<br />

_--"",,' I<br />

-~<br />

NOTE: POTENTIOMETER FOR X & Y COORDINATES HAS A RANGE OF 0 TO 100KQ.<br />

BUTTON IS NORMALLY OPEN; CLOSED WHEN DEPRESSED.<br />

-tv Figure 21. JOYSTICK SCHEMATIC <br />

3YVMOYVH


Game Controller Adapter (Analog Input) <br />

Connector Specifications<br />

REAR PANEL<br />

· .·SS •<br />

15 PIN "0" SHELl~<br />

CONNECTOR<br />

0<br />

1 9<br />

• •<br />

~ 0e • •••<br />

«;)<br />

• • 15<br />

0<br />

••<br />

AT STANDARD TIL LEVELS <br />

Voltage<br />

AMP <br />

Pin No.<br />

... + 5 Volts 1<br />

....<br />

Button 4 2 ....<br />

Position 0 3<br />

...<br />

..<br />

Ground 4<br />

Ground 5<br />

Position 1 6 ....<br />

External Button 5 7 .... Game Control<br />

Devices<br />

...<br />

Adapter<br />

... + 5 Volts 8 <br />

...<br />

"" + 5 Volts 9 <br />

"" Button 6 10 ""­<br />

...<br />

Position 2 11 .....<br />

Ground 12<br />

Position 3 13 ....<br />

Button 7 14 ...<br />

... + 5 Volts 15<br />

....<br />

..<br />

2-122


Asynchronous Communications Adapter<br />

The Asynchronous Communications Adapter is a 4"H x 5"W card<br />

that plugs into a System Expansion Slot. All system control signals and<br />

voltage requirements are provided through a 2 x 31 position card edge<br />

~ tab. Ajumper module is provided to select either RS-232-C or current<br />

loop operation.<br />

The adapter is fully programmable and supports asynchronous<br />

communications only. It will add and remove start bits, stop bits, and<br />

parity bits. A programmable baud rate generator allows operation from<br />

50 baud to 9600 baud. Five, six, seven or eight bit characters with 1,<br />

1-1/2, or 2 stop bits are supported. A fully prioritized interrupt system<br />

controls transmit, receive, error, line status and data set interrupts.<br />

Diagnostic capabilities provide loopback functions oftransmit/receive<br />

and input! output signals.<br />

Figure (22) is a block diagram ofthe Asynchronous Communications<br />

Adapter.<br />

The heart of the adapter is a INS8250 LSI chip or functional equivalent.<br />

The following is a summary of the 8250's key features:<br />

• Adds or Delete Standard Asynchronous Communication Bits<br />

(Start, Stop, and Parity) to or from Serial Data Stream.<br />

• Full Double Buffering Eliminates Need for Precise<br />

Synchronization.<br />

• Independently Controlled Transmit, Receive, Line Status, and<br />

Data Set Interrupts.<br />

• Programmable Baud Rate Generator Allows Division of Any<br />

Input Clock by 1 to (2 16 -1) and Generates the Intemal16x Clock.<br />

• Independent Receiver Clock Input.<br />

• MODEM Control Functions Clear to Send (CTS), Request to<br />

Send (RTS), Data Set Ready (DSR), Data Terminal Ready<br />

(DTR), Ring Indicator (RI), and Carrier Detect.<br />

• Fully Programmable Serial-Interface Characteristics<br />

5-, 6-, 7-, or 8-Bit Characters<br />

Even, Odd, or No-Parity Bit Generation and Detection<br />

1-, 1 1/2-, or 2-Stop Bit Generation<br />

Baud Rate Generation (DC to 9600 Baud)<br />

2-123


• False Start Bit Detection.<br />

• Complete Status Reporting Capabilities.<br />

• Line Break Generation and Detection.<br />

• Internal Diagnostic Capabilities.<br />

Loopback Controls for Communications Link Fault <br />

Isolation. <br />

Break, Parity, Overrun, Framing Error Simulation. <br />

• Full Prioritized Interrupt System Controls.<br />

All communications protocol is a function of the system microcode<br />

and must be loaded before the adapter is operational. All pacing ofthe<br />

interface and control signal status must be handled by the system<br />

software.<br />

Asynchronous Communications Block Diagram<br />

ADDRESS BUSS<br />

ADDRESS <br />

DECODE <br />

CHIP SELECT<br />

DATA BUS<br />

INTERRUPT<br />

OSCILLATOR<br />

1.8432 Mhz <br />

--" <br />

8250<br />

ASYNCH RONOUS<br />

COMMUNICATIONS<br />

ELEMENT<br />

EIA<br />

RECEIVERS<br />

EIA<br />

DRIVERS<br />

A<br />

CURRENT LOOP<br />

Y ~<br />

J<br />

A<br />

L<br />

L.<br />

25 PIN<br />

"D"SHELLCONNECTOR<br />

Figure 22. ASYNCHRONOUS COMMUNICATIONS ADAPTER <br />

BLOCK DIAGRAM <br />

2-124


Modes of Operation<br />

The different modes of operation are selected by programming the<br />

8250 Asynchronous Communications Element. This is done by<br />

selecting the I/O address (3F8 to 3FF) and writing data out to the card.<br />

Address bit AO, Al and A2 select the different registers which define<br />

r"'\ the modes of operation. Also, the Divisor Latch Access Bit (Bit 7) of<br />

the line control register is used to select certain registers.<br />

I/O Decode for Communications Adapter<br />

Table 21. I/O Decodes (3F8 to 3FF)<br />

I/O<br />

DECODE REGISTER SELECTED DLABSTATE<br />

3FB TX BUFFER DLAB=O (WRITE)<br />

3FB RX BUFFER DLAB=O (READ)<br />

3FB DIVISOR LATCH LSB DLAB=l<br />

3F9 DIVISOR LATCH MSB DLAB=l<br />

3F9 INTERRUPT ENABLE REGISTER DLAB=O<br />

3FA<br />

3FB<br />

3FC<br />

3FD<br />

3FE<br />

INTERRUPT IDENTIFICATION<br />

REGISTERS<br />

LINE CONTROL REGISTER<br />

MODEM CONTROL REGISTER<br />

LINE STATUS REGISTER<br />

MODEM STATUS REGISTER<br />

ADDRESS BITS<br />

A9 A8 A7 A6 A5 A4 A3 A2 A1 AD DLAB REGISTER<br />

3F8 to 3FF 1 1 1 1 1 1 1 X X X<br />

0 0 0 0 Receive Buffer<br />

(read), Transmit<br />

Holding Reg.<br />

(write)<br />

0 0 1 0 Interrupt Enable<br />

0 1 a x Interrupt Identification<br />

0 1 1 X Li ne Control<br />

1 a 0 X Modem Control<br />

1 0 1 X Line Status<br />

1 1 a X Modem Status<br />

1 1 1 X None<br />

0 a 0 1 Divisor Latch (LSB)<br />

0 0 1 1 Divisor Latch (MSB)<br />

A2, Al and AO bits are "Don't Cares" and are used to select the<br />

different register of the communications chip.<br />

2-125


Interrupts<br />

One interrupt line is provided to the system. This interrupt is IRQ4 and<br />

will be positive active. To allow the communications card to send<br />

interrupts to the system, Bit 3 of the Modem Control Register must be<br />

set = 0 (low). At this point, any interrupts allowed by the Interrupt<br />

Enable Register will cause an interrupt. ,...-.......<br />

The data format will be as follows:<br />

TRANSMITTER OUTPUT AND RECEIVER INPUT<br />

00 01 02 03 04 05 06 07<br />

Transmit <br />

Oata Marking <br />

Data Bit 0 is the ftrst bit to be transmitted or received. The adapter<br />

automatically inserts the start bit, the correct parity bit if programmed<br />

to do so, and the stop bit ( 1, 1-1/2 or 2 depending on the comm.and in<br />

the Line Control Register).<br />

Interface Description<br />

The communications adapter provides an EIA RS-232-C like interface.<br />

One 25 pin "D" shell, male type connector is provided to attach<br />

various peripheral devices. In addition, a current loop interface is also<br />

located in this same connector. Ajumper block is provided to manually<br />

select either the voltage interface, or the current loop interface.<br />

The current loop interface is provided to attach certain printers<br />

provided by <strong>IBM</strong> Corporation that use this particular type ofinterface.<br />

Pin 18 + receive current loop data (20Ma)<br />

Pin 25 - receive current loop return (20Ma)<br />

Pin 9 + transmit current loop return (20Ma)<br />

Pin 11 - transmit current loop data (20Ma)<br />

2-126


I TRANSMIT 'IACUIT I<br />

+5V<br />

~ 4S-"l<br />

Tx DATA ----I~.,..-----------.,:~ :11::1<br />

+5V<br />

RECEIVE CIRCUIT<br />

PIN 18 4---t-.,<br />

OPTO ISOLATOR<br />

5.SK.I1<br />

:>0--- Rx DATA<br />

PIN 25 "'__+--J<br />

+5V<br />

Figure 23. CURRENT LOOP INTERFACE<br />

~<br />

The voltage interface is a serial interface. It supports certain data and<br />

control signals as listed below.<br />

Pin 2<br />

Pin 3<br />

Pin 4<br />

Pin 5<br />

Pin 6<br />

Pin 7<br />

Pin 8<br />

Pin 20<br />

Pin 22<br />

Transmit Data<br />

Receive Data<br />

Request to Send<br />

Clear to Send<br />

Data Set Ready<br />

Signal Ground<br />

Carrier Detect<br />

Data Terminal Ready<br />

Ring Indicate<br />

The adapter converts these signals to/from TTL levels to EIA voltage<br />

levels. These signals are sampled or generated by the communication<br />

control chip. These signals can then be sensed by the system software<br />

to determine the state of the interface or peripheral device.<br />

2-127


Voltage Interchange Information<br />

Interface<br />

Interchange Voltage Binary State Signal Condition Control Function<br />

Positive Voltage = Binary (0) = Spacing =On<br />

Negative Voltage = Binary (1) = Marking =Off<br />

Invalid Levels<br />

+15V----------­<br />

On Function<br />

+3V ----------­<br />

0\1 Invalid Levels<br />

-3V ----------­<br />

Off Function<br />

-15V----------­<br />

Invalid Levels<br />

The signal will be considered in the "marking" condition when the<br />

voltage on the interchange circuit, measured at the interface point, is<br />

more negative than minus three volts with respect to signal ground. The<br />

signal will be considered in the "spacing" condition when the voltage is<br />

more positive than plus three volts with respect to signal ground. The<br />

region between plus three volts and minus three volts is defined as the<br />

transition region, will be considered in invalid levels. The voltage which<br />

is more negative than -15V or more positive than +15V will be<br />

considered in invalid levels.<br />

During the transmission of data, the "marking" condition will be used<br />

to denote the binary state "one" and "spacing" condition will be used to<br />

denote the binary state "zero".<br />

For interface control circuits, the function is "on" when the voltage<br />

is more positive than +3V with respect to signal ground and is "off"<br />

when the voltage is more negative than -3V with respect to signal<br />

ground.<br />

2-128


INS8250 Functional Pin Description<br />

The following describes the function of all INS8250 input/output pins.<br />

Some of these descriptions reference internal circuits.<br />

Note: In the following descriptions, a low represents a logic 0 (0 volt<br />

,.-......, nominal) and a high represents a logic 1 (+2.4 volts nominal).<br />

Input Signals<br />

Chip Select (SCO, CS1, CS2), Pins 12-14: When CSO and CSI are high<br />

and CS2 is low, the chip is selected. Chip selection is complete when<br />

the decoded chip select signal is latched with an active (low) Address<br />

Strobe (ADS) input. This enable comunication between the INS8250<br />

and the CPU.<br />

Data Input Strobe (DISTRDISTR) Pins 22 and 21: When DISTR is<br />

high or DISTR is low while the chip is selected, allows the CPU to read<br />

status information or data from a selected register of the INS8250.<br />

Note: Only an active DISTR or DISTR input is required to transfer<br />

data from the INS8250 during a read operation. Therefore, tie either<br />

the DISTR input permanently low or the DISTR input permanently<br />

high, if not used.<br />

,.-......, Data Output Strobe (DOSTR, DOSTR), Pins 19 and 18: When<br />

DOSTR is high or DOSTR is low while the chip is selected, allows the<br />

CPU to write data or control words into a selected register of the<br />

INS8250.<br />

Note: Only an active DOSTR or DOSTR input is required to transfer<br />

data to the INS8250 during a write operation. Therefore, tie either the<br />

DPSTR input permanently low or the DOSTR input permanently high,<br />

if not used.<br />

Address Strobe (ADS), Pin 25: When low, provides latching for the<br />

Register Select (AO, AI, A2) and Chip Select (SOC, CSl, CS2)<br />

signals.<br />

Note: An active ADS input is required when the Register Select<br />

(AO, AI, A2) signals are not stable for the duration of a read or write<br />

operation. If not required, the ADS input permanently low.<br />

2-129


Register Select (AO, AI, A2), Pins 26-28: These three inputs are used<br />

during a read or write operation to select an INS8250 register to read<br />

from or write into as indicated in the table below. Note that the state of<br />

the Divisor Latch Access Bit (DLAB), which is the most significant bit<br />

of the Line Control Register, affects the selection of certain INS8250<br />

registers. The DLAB must be set high by the system software to access<br />

the Baud Generator Divisor Latches.<br />

DLAB A2 A1 AD Register<br />

0 0 0 0 Receiver Buffer (read), Transmitter Holding<br />

Register (write)<br />

0 0 0 1 Interrupt Enable<br />

X 0 1 0 Interrupt Identification (read only)<br />

X 0 1 1 Li ne Co ntrol<br />

X 1 0 0 MODEM Control<br />

X 1 0 1 line Status<br />

X 1 1 0 MODEM Status<br />

X 1 1 1 None<br />

1 D 0 0 Divisor Latch (least significant byte)<br />

1 D D 1 Divisor Latch (most significant byte)<br />

Master Reset (MR), Pin 35: When high, clears all the registers<br />

(except the Receiver Buffer, Transmitter Holding, and Divisor<br />

Latches), and the control logic of the INS8250. Also, the state of<br />

various output signals (SOUT, INTRPT, OUT 1, OUT 2, RTS,<br />

DTR) are affected by an active MR input. (Refer to Table 1.)<br />

Receiver Clock (RCLK), Pin 9: This input is the I6x baud rate<br />

clock for the receiver section of the chip.<br />

Serial Input (SIN), PintO: Serial data input from the communications<br />

link (peripheral device, MODEM, or data set).<br />

Clear to Send (CTS), Pin 36: The CTS signal is a MODEM control<br />

function input whose condition can be tested by the CPU by reading<br />

Bit 4 (CTS) of the MODEM Status Register. Bit 0 (DCTS) of the<br />

MODEM Status Register indicates whether the CTS input has<br />

changed state since the previous reading of the MODEM Status<br />

Register.<br />

Note: Whenever the CTS bit ofthe MODEM Status Register changes<br />

state, an interrupt is generated if the MODEM Status Interrupt<br />

is enabled.<br />

2-130


Data Set Ready (DSR), Pin 37: When low, indicates that the<br />

MODEM or data set is ready to establish the communications link and<br />

transfer data with the INS8250. The DSR signal is a MODEM-control<br />

function input whose condition can be tested by the CPU by reading Bit<br />

5 (DSR) of the MODEM Status Register. Bit 1 (DDSR) of the<br />

MODEM Status Register indicates whether the DSR input has<br />

r""\ changed state since the previous reading of the MODEM Status<br />

Register.<br />

~ Whenever the DSR bit ofthe MODEM Status Register changes<br />

state, an interrupt is generated if the MODEM Status Interrupt<br />

is enabled.<br />

Received Line Signal Detect (RLSD), Pin 38: When low, indicates<br />

that the data carrier has been detected by the MODEM or data set.<br />

The RLSD signal is a MODEM-Control function input whose<br />

condition can be tested by the CPU by reading Bit 7 (RLSD) of the<br />

MODEM Status Register. Bit 3 (DRLSD) of the MODEM Status<br />

Register indicates whether the RLSD input has changed state since the<br />

previous readingof the MODEM Status Register.<br />

Note: Whenever the RLSD bit of the MODEM Status Register<br />

changes state, an interrupt is generated ifthe MODEM Status Interrupt<br />

is enabled.<br />

~ Ring Indicator (RI), Pin 39: When low, indicates that a telephone<br />

ringing signal has been received by the MODEM or data set. The RI<br />

signal is a MODEM-control function input whose condition can be<br />

tested by the CPU by reading Bit 6 (RI) of the MODEM Status<br />

Register. Bit 2 (TERI) of the MODEM Status Register indicates<br />

whether the RI input has changed from a low to a high state since the<br />

previous reading of the MODEM Status Register.<br />

Note: Whenever the RI bit of the MODEM Status Register changes<br />

from a high to a low state, an interrupt is generated if the MODEM<br />

Status Interrupt is enabled.<br />

vce, Pin 40: +5 volt supply.<br />

VSS, Pin 20: Ground (O-volt) reference.<br />

2-131


Output Signals<br />

Data Terminal Ready (DTR), Pin 33: When low, informs the<br />

MODEM or data set that the INS8250 is ready to communicate. The<br />

DTR output signal can be set to an active low by programming Bit 0<br />

(DTR) of the MODEM Control Register to a high level. The DTR<br />

signal is set high upon a Master Reset operation.<br />

Request to Send(RTS), Pin 32: When low, informs the MODEM or<br />

data set that the INS8250 is ready to transmit data. the RTS output<br />

signal can be set to an active low by programming Bit 1 (RTS) of the<br />

MODEM Control Register. The RTS signal is set high upon a Master<br />

Reset operation.<br />

Output 1 (OUT 1), Pin 34: User-designated output that can be set to<br />

an active low by programming Bit 2 (OUT 1) ofthe MODEM Control<br />

Register to a high level. The OUT 1 signal is set high upon a Master<br />

Reset operation.<br />

Output 2 (OUT 2), Pin 31: User-designated output that can be set<br />

to an active low by programming Bit 3 (OUT 2) of the MODEM<br />

Control Register to a high level. The OUT 2 signal is set high upon a<br />

Master Reset operation.<br />

Chip Select Out (CSOUT), Pin 24: When high, indicates that the<br />

chip has been selected by active CSO, CSl, and CS2 inputs. No data<br />

transfer can be initiated until the CSOUT signal is a logic 1.<br />

Driver Disable (DDIS), Pin 23: Goes low whenever the CPU is<br />

reading data from the INS8250. A high-level DDIS output can be<br />

used to disable an external transceiver (if used between the CPU and<br />

INS8250 on the D7-DO Data Bus) at all times, except when the CPU<br />

is reading data.<br />

Baud Out (BAUDOUT), Pin 15: 16x clock signal for the transmitter<br />

section of the INS8250. The clock rate is equal to the main reference<br />

oscillator frequency divided by the specified divisor in the Baud<br />

Generator Divisor Latches. The BAUDOUT may also be used for the<br />

receiver section by typing this output to the RCLK input of the chip.<br />

Interrupt (INTRPT), Pin 30: Goes high whenever anyone of the<br />

following interrupt types has an active high condition and is enabled via<br />

the IER: Receiver Error Flag; Received Data Available; Transmitter<br />

Holding Register Empty; and MODEM Status. The INTRPT Signal is<br />

reset low upon the appropriate interrupt service or a Master Reset<br />

operation.<br />

Serial Output (SOUT), Pin 11: Composite serial data output to the<br />

communications link (peripheral, MODEM or data set). The SOUT<br />

signal is set to the Marking (Logic 1) state upon a Master Reset<br />

operation.<br />

2-132


Input/Output Signals<br />

Data (D7-DO) Bus, Pins 1-8: This bus comprises eight TRI-STATE<br />

input/output lines. The bus provides bidirectional communications<br />

between the INS8250 and the CPU. Data, control words, and status<br />

information are transferred via the D7-DO Data Bus.<br />

r"\ External Clock Input/Output (XTAL1, XTAL2, Pins 16 and 17:<br />

These two pins connect the main timing reference (crystal or signal<br />

clock) to the INS8250.<br />

Programming Considerations<br />

Table 22. Asynchronous Communications Reset Functions<br />

Register/Signal<br />

Interrupt Enable Register<br />

Interrupt Identification<br />

Register<br />

Line Control Register<br />

MODEM Control Register<br />

Line Status Register<br />

MODEM Status Register<br />

SOUT<br />

INTRPT (RCVR Errs)<br />

INTRPT (RCVR Data<br />

Ready)<br />

INTRPT (RCVR Data<br />

Ready)<br />

INTRPT (MODEM<br />

Status Changes)<br />

OUT 2<br />

RTS<br />

DTR<br />

OUT 1<br />

Reset Control<br />

Master Reset<br />

Master Reset<br />

Master Reset<br />

Master Reset<br />

Master Reset<br />

Master Reset<br />

Master Reset<br />

Read LSR/MR<br />

Read RBR/MR<br />

Read II R/Write<br />

THR/MR<br />

Read MSR/MR<br />

Master Reset<br />

Master Reset<br />

Master Reset<br />

Master Reset<br />

Reset State <br />

All Bits Low <br />

(0-3 Forced and 4-7 <br />

Permanent) <br />

Bit 0 is High, <br />

Bits 1 and 2 Low <br />

Bits 3-7 are <br />

Permanently Low <br />

All Bits Low <br />

All Bits Low <br />

Except Bits 5 & 6 are High <br />

Bits 0-3 Low <br />

Bits 4-7 - Input Signal <br />

High <br />

Low <br />

Low <br />

Low <br />

Low <br />

High <br />

High <br />

High <br />

High <br />

2-133


INS8250 Accessible Registers<br />

The system programmer may access or control any of the INS8250<br />

registers via the CPU. These registers are used to control INS8250<br />

operations and to transmit and receive data.<br />

INS8250 Line Control Register<br />

The system programmer specifies the format of the asynchronous data<br />

communications exchange via the Line Control Register. In addition to<br />

controlling the format, the programmer may retrieve the contents ofthe<br />

Line Control Register for inspection. This feature simplifies system<br />

programming and eliminates the need for separate storage in system<br />

memory ofthe line characteristics. The contents of the Line Control<br />

Register are indicated and described below.<br />

Line Control Register (LCR)<br />

3FB<br />

BIT 7 6 5 4 3 2 1 0<br />

I' I : Word L,"gth SoI,01 Bit DIW LSD)<br />

Word Length Select Bit 1 (WLS1)<br />

Number of Stop Bits (STB)<br />

~--~Parity Enable (PEN)<br />

'------~Even Parity Select (EPS)<br />

'-------~Stick Parity<br />

L--_____~ Set Break<br />

L--______.... Divisor Latch Access Bit (DLAB)<br />

Bit 0 and 1: These two bits specify the number of bits in each<br />

transmitted or received serial character. The encoding of bits 0 and 1<br />

is as follows:<br />

Bit 1 Bit 0 Word Length<br />

0 0 5 Bits<br />

0 1 6 Bits<br />

1 0 7 Bits<br />

1 1 8 Bits<br />

Bit 2: This bit specifies the number of Stop bits in each transmitted or<br />

received serial character. If bit 2 is a logic 0, 1 Stop bit is generated or<br />

checked in the transmit or receive data, respectively. Ifbit 2 is logic 1<br />

when a 5-bit word length is selected via bits 0 and 1, 1-1/2 Stop bits are<br />

generated or checked. Ifbit 2 is logic 1 when either a 6-, 7-, or 8-bit word<br />

length is selected, 2 Stop bits are generated or checked.<br />

2-134


Bit 3: This bit is the Parity Enable bit. When bit 3 is a logic 1, a Parity<br />

bit is generated (transmit data) or checked (receive data) between the<br />

last data word bit and Stop bit ofthe serial data. (The Parity bit is used<br />

to produce an even or odd number of 1's when the data word bits and the<br />

Parity bit are summed.)<br />

~ Bit 4: This bIt is the Even Parity Select bit. When bit 3 is a logic 1 and<br />

bit 4 is a logic 0, an odd number oflogic 1 's is transmitted or checked in<br />

the data word bits and Parity bit. When bit 3 is a logic 1 and bit 4 is a<br />

logic 1, an even number of bits is transmitted or checked.<br />

Bit 5: This bit is the Stick Parity bit. When bit 3 is a logic 1 and bit 5 is a<br />

logic 1, the Parity bit is transmitted and then detected by the receiver as<br />

a logic 0 if bit 4 is a logic 1 or as a logic 1 if bit 4 is a logic O.<br />

Bit 6: This bit is the Set Break Control bit. When bit 6 is a logic 1, the<br />

serial output (SOUT) is forced to the Spacing (logic 0) state and<br />

remains there regardless of other transmitter activity. The set break is<br />

disabled by setting bit 6 to a logic O. This feature enables the CPU to<br />

alert a terminal in a computer communications system.<br />

Bit 7:This bit is the Divisor Latch Access Bit (DLAB). It must be set<br />

high (logic 1) to access the Divisor Latches ofthe Baud Rate Generator<br />

during a Read or Write operation. Itmust be set low (logic 0) to access<br />

~ the Receiver Buffer, the Transmitter Holding Register, or the Interrupt<br />

Enable Register.<br />

INS8250 Programmable Baud Rate Generator<br />

The INS8250 contains a programmable Baud Rate Generator that is<br />

capable oftaking the clock input (1.8432 MHz) and dividing it by any<br />

divisor from 1 to (21 6 -1). The output frequency ofthe Baud Generator<br />

is 16x the Baud rate [divisor #= (frequency input) / (baud rate x 16)].<br />

Two 8-bit latches store the divisor in a 16-bit binary format. These<br />

Divisor Latches must be loaded during initialization in order to ensure<br />

desired operation of the Baud Rate Generator. Upon loading either of<br />

the Divisor Latches, a 16-bit Baud counter is immediately loaded. This<br />

prevents long counts on initial load.<br />

2-135


Divisor Latch Least Significant Bit (DLL)<br />

3F8<br />

DLAB=l<br />

BIT 7 6 5 4 3 2 o<br />

LS<br />

BIT<br />

0<br />

BIT 1<br />

BIT 2<br />

BIT 3<br />

BIT4<br />

'--------------- BIT 5<br />

Divisor Latch Most Significant Bit (DLM)<br />

3F9<br />

DLAB=l<br />

BIT 7 6 5 4 3 2 1 0<br />

I L... BIT8<br />

BIT 6<br />

BIT 7<br />

~BIT9<br />

'----------t~ BIT 10<br />

'---------. BIT 11<br />

L..-___________ BIT 12<br />

'-------------__ BIT 13<br />

'---------------__ BIT 14<br />

"-----------------__ BIT 15<br />

Table 23 illustrates the use of the Baud Rate Generator with a<br />

frequency of 1.8432 Mhz. For baud rates of 9600 and below, the error<br />

obtained is minimal.<br />

Note: The maximum operating frequency of the Baud Generator is<br />

3.1 Mhz. In no case should the data rate be greater than 9600 Baud.<br />

2-136


Table 23. BAUD RATE AT 1.843 Mhz<br />

Desired Divisor Used Percent Error<br />

Baud to Generate Difference Between<br />

Rate 16x Clock Desired & Actual<br />

Decimal Hex <br />

50 2304 '900' -­<br />

75 1536 '600' -­<br />

110 1047 '417' 0.026<br />

134.5 857 '359' 0.058 <br />

150 768 '300' -­<br />

300 384 '180' -­<br />

600 192 'OCO' -­<br />

1200 96 '060' -­<br />

1800 64 '040' -­<br />

2000 58 '03A' 0.69 <br />

2400 48 '030' -­<br />

3600 32 '020' -­<br />

4800 24 '018' -­<br />

7200 16 '010' -­<br />

9600 12 'OOC' -­<br />

~ Line Status Register<br />

This 8-bit register provides status information to the CPU concerning<br />

the data transfer. The contents ofthe Line Status Register are indicated<br />

and described below.<br />

Line Status Register (LSR)<br />

3FD<br />

BIT 6 4 3 2 1 0<br />

DATA READY (DR)<br />

OVERRUN ERROR (OR)<br />

I Li=:<br />

PARITY ERROR (PE)<br />

... FRAMING ERROR (FE)<br />

!:<br />

:.<br />

BREAK INTERRUPT (BI)<br />

TRANSMITTER HOLDING<br />

REGISTER EMPTY (TH RE)<br />

...<br />

po TX SHIFT REGISTER<br />

EMPTY (TSRE)<br />

=0<br />

-<br />

2-137


Bit 0: This bit is the receiver Data Ready (DR) indicator. Bit 0 is set to a<br />

logic 1 whenever a complete incoming character has been received and<br />

transferred into the Receiver Buffer Register. Bit 0 may be reset to a<br />

logic 0 either by the CPU reading the data in the Receiver Buffer<br />

Register or by writing a logic 0 into it from the CPU.<br />

Bit 1: This bit is the Overrun Error (OE) indicator. Bit 1 indicates that r--...<br />

data in the Receiver Buffer Register was not read by the CPU before the<br />

next character was transferred into the Receiver Buffer Register,<br />

thereby destroying the previous character. The OE indicator is reset<br />

whenever the CPU reads the contents of the Line Status Register.<br />

Bit 2: This bit is the Parity Error (PE) indicator. Bit 2 indicates that<br />

the received data character does not have the correct even or odd parity,<br />

as selected by the even parity-select bit. the PE bit is set to a logic 1<br />

upon detection of a parity error and is reset to a logic 0 whenever the<br />

CPU reads the contents of the Line Status Register.<br />

Bit 3:This bit is the Framing Error (FE) indicator. Bit 3 indicates that<br />

the received character did not have a valid Stop bit. Bit 3 is set to a logic<br />

1 whenever the Stop bit following the last data bit or parity bit is<br />

detected as a zero bit (Spacing level).<br />

Bit 4: This bit is the Break Interrupt (BI) indicator. Bit 4 is set to a logic<br />

1 whenever the received data input is held in the Spacing (logic 0) state r--...<br />

for longer than a full word transmission time (that is, the total time of<br />

Start bit + data bits + Parity + Stop bits).<br />

Note: Bits 1 through 4 are the error conditions that produce a Receiver<br />

Line Status interrupt whenever any of the corresponding conditions<br />

are detected.<br />

Bit 5: This bit is the Transmitter Holding Register Empty (THRE)<br />

indicator. Bit 5 indicates that the INS8250 is ready to accept a new<br />

character for transmission. In addition, this bit causes the INS8250 to<br />

issue an interrupt to the CPU when the Transmit Holding Register<br />

Empty Interrupt enable is set high. The THRE bit is set to a logic 1<br />

when a character is transferred from the Transmitter Holding Register<br />

into the Transmitter Shift Register. The bit is reset to logic 0<br />

concurrently with the loading of the Transmitter Holding Register by<br />

the CPU.<br />

Bit 6: This bit is the Transmitter Shift Register Empty (TSRE)<br />

indicator. Bit 6 is set to a logic 1 whenever the Transmitter Shift<br />

Register is idle. It is reset to logic 0 upon a data transfer from the<br />

Tranmitter Holding Register to the Transmitter Shift Register. Bit 6<br />

is a read-only bit.<br />

Bit 7: This bit is permanently set to logic O.<br />

2-138


Interrupt Identification Register<br />

The INS8250 has an on-chip interrupt capability that allows for<br />

complete flexibility in interfacing to all the popular microprocessors<br />

presently available. In order to provide minimum software overhead<br />

during data character transfers, the INS8250 prioritizes interrupts into<br />

r"\ four levels. The four levels of interrupt conditions are as follows:<br />

Receiver Line Status (priority 1); Received Data Ready (priority 2);<br />

Transmitter Holding Register Empty (priority 3); and MODEM<br />

Status (priority 4).<br />

Information indicating that a prioritized interrupt is pending and the<br />

type of that interrupt are stored in the Interrupt Identification Register<br />

(refer to Table 5). The Interrupt Identification Register (IIR), when<br />

addressed during chip-select time, freezes the highest priority interrupt<br />

pending and no other interrupts are acknowledged until that particular<br />

interrupt is serviced by the CPU. The contents ofthe IIR are indicated<br />

and described below.<br />

Interrupt Identification Register (IIR)<br />

3FA<br />

BIT 6 5 4 3 2 1 0<br />

I L: 0 If INTERRUPTPENDING<br />

I I ~~ INTERRUPT 10 BIT (0)<br />

I ­ INTER RUPT 10 BIT (1)<br />

'--------~ ~ 0<br />

'-----------.... ~ 0<br />

'-------------~ ~O<br />

L-____________~ ~O<br />

'-----------------.... ~O<br />

Bit 0: This bit can be used in either a hardwired prioritized or polled<br />

environment to indicate whether an interrupt is pending. When bit 0 is a<br />

logic 0, an interrupt is pending and the IIR contents may be used as a<br />

pointer to the appropriate interrupt service routine. When bit 0 is a logic<br />

1, no interrupt is pending and polling (if used) continued.<br />

Bits 1 and 2: These two bits ofthe IIR are used to identify the highest<br />

priority interrupt pending as indicated in Table 5.<br />

,.,-...., Bits 3 through 7:These five bits of the IIR are always logic O.<br />

2-139


Table 24. Interrupt Control Functions<br />

Interrupt I D<br />

Register<br />

Bit 2 Bit 1 Bit 0<br />

0 0 1<br />

1 1 0<br />

1 0 0<br />

0 1 0<br />

0 0 0<br />

Priority<br />

Level<br />

-<br />

Highest<br />

Second<br />

Third<br />

Fourth<br />

Interrupt Set and Reset Functions<br />

Interrupt<br />

Type<br />

None<br />

Receiver<br />

Line Status<br />

Received<br />

Data Available<br />

Transmitter<br />

Holding Register<br />

Empty<br />

MODEM Status<br />

Interrupt<br />

Source<br />

None ­<br />

Overrun Error<br />

or<br />

Parity Error<br />

or<br />

Framing Error<br />

or<br />

Break Interrupt<br />

Receiver<br />

Data Available<br />

Transmitter<br />

Holding Register<br />

Empty<br />

Clear to Send<br />

or<br />

Data Set Ready<br />

or<br />

Ring Indicator<br />

or<br />

Received Line<br />

Si gna I 0 etect<br />

Interrupt<br />

Reset Control<br />

Reading the<br />

Line Status<br />

Register<br />

Reading the<br />

Receiver<br />

Buffer<br />

Register<br />

Reading the<br />

II R Register<br />

(if source of<br />

interrupt)<br />

or<br />

Writing into<br />

the Transmitter<br />

Holding<br />

Register<br />

Reading the<br />

MODEM Status<br />

Register<br />

2-140


Interrupt Enable Register<br />

This 8-bit register enables the four types of interrupt of the INS8250<br />

to separately activate the chip Interrupt (INTRPT) output signal. It is<br />

possible to totally disable the interrupt system by resetting bits 0<br />

through 3 of the Interrupt Enable Register. Similarly, by setting the<br />

r'\ appropriate bits of this register to a logic 1, selected interrupts can be<br />

enabled. Disabling the interrupt system inhibits the Interrupt Identification<br />

Register and the active (high) INTRPT output from the chip.<br />

All other system functions operate in their normal manner, including<br />

the setting of the Line Status and MODEM Status Registers. The<br />

contents of the Interrupt Enable Register are indicated and<br />

described below.<br />

Interrupt Enable Register (IER)<br />

3F9<br />

DLAB=O<br />

BIT 7 6 4 3 1 0<br />

L::<br />

p =0<br />

~------------------__• =0<br />

=0<br />

~----------------__________~. =0<br />

1= ENABLE DATA<br />

AVAILABLE INTERRUPT<br />

I=ENABLE TX HOLDING REG<br />

EMPTY INTERRUPT<br />

1= ENABLE RECEIVE LINE<br />

STATUS INTERRUPT<br />

I=ENABLE MODEM STATUS<br />

INTERRUPT<br />

Bit 0: This bit enables the Received Data Available Interrupt when set<br />

to logic 1.<br />

Bit 1: This bit enables the Transmitter Holding Register Empty<br />

Interrupt when set to logic 1.<br />

Bit 2: This bit enables the Receiver Line Status Interrupt when set to<br />

logic 1.<br />

Bit 3: This bit enables the MODEM Status Interrupt when set to<br />

logic 1.<br />

r-"\ Bits 4 through 7: These four bits are alway logic O.<br />

2-141


MODEM Control Register<br />

This 8-bit register controls the interface with the MODEM or data set<br />

(or a peripheral device emulating a MODEM). The contents of the<br />

MODEM Control Register are indicated and described below.<br />

MODEM Control Register (MCR)<br />

3FC<br />

BIT 6 5 43210<br />

~:<br />

. L=;~ ~~~~ESTTOSEND(RTS)<br />

_III~IL<br />

I.<br />

I<br />

- OUT2<br />

'---------.. LOOP<br />

~------------------~<br />

L-______________________•<br />

DATA TERMINAL READY IOTR!<br />

;0 ;0<br />

~------------------------__. ;0<br />

Bit 0: This bit controls the Data Terminal Ready (DTR) output. When<br />

bit 0 is set to a logic 1, the DTR output is forced to a logic O. When bit 0<br />

is reset to a logic 0, the DTR output is forced to a logic 1.<br />

Note: The DTR output of the INS8250 may be applied to an EIA<br />

inverting line driver (such as the DS1488) to obtain the proper polarity<br />

input at the succeeding MODEM or data set.<br />

Bit 1: This bit controls the Request to Send (RTS) output. Bit 1 affects<br />

the RTS output in a manner identical to that described above for bit O.<br />

Bit 2: This bit controls the Output 1 (OUT 1) signal, which is an<br />

auxiliary user-designated output. Bit 2 affects the OUT 1 output in a<br />

manner identical to that described above for bit O.<br />

Bit 3: This bit controls the Output 2 (OUT 2) signal, which is an<br />

auxiliary user-designated output. Bit 3 affects the OUT 2 output in a<br />

manner identical to that described above for bit O.<br />

Bit 4: This bit provides a loopback feature for diagnostic testing of the<br />

INS8250. When bit 4 is set to logic 1, the following occur: the<br />

transmitter Serial Output (SOUT) is set to the Marking (logic 1) state;<br />

the receiver Serial Input (SIN) is disconnected; the output of the<br />

Transmitter Shift Register is "looped back" into the Receiver Shift<br />

Register input; the four MODEM Control inputs (CTS,DSR, RLSD,<br />

and RI) are disconnected; and the four MODEM Control outputs<br />

(DTR, RTS, OUT 1, and OUT 2) are internally connected to the four<br />

MODEM Control inputs. In the diagnostic mode, data that is<br />

transmitted is immediately received. This feature allows the processor<br />

to verify the transmit- and receive-data paths of the INS8250.<br />

r"\<br />

r"\<br />

2-142


In the diagnostic mode, the receiver and transmitter interrupts are fully<br />

operational. The MODEM Control Interrupts are also operational but<br />

the interrupts' sources are now the lower four bits of the MODEM<br />

Control Register instead of the four MODEM Control inputs. The<br />

interrupts are still controlled by the Interrupt Enable Register.<br />

r--... The INS8250 interrupt system can be tested by writing into the lower<br />

four bits ofthe MODEM Status Register. Setting any ofthese bits to a<br />

logic 1 generates the appropriate interrupt (if enabled). The resetting of<br />

these interrupts is the same as in normal INS8250 operation. To return<br />

to normal operation, the registers must be reprogrammed for normal<br />

operation and then bit 4 ofthe MODEM Control Register must be reset<br />

to logic O.<br />

Bits 5 through 7: These bits are permanently set to logic O.<br />

MODEM StMus Register<br />

This 8-bit register provides the current state ofthe control lines from the<br />

MODEM (or peripheral device) to the CPU. In addition to this currentstate<br />

information, four bits of the MODEM Status Register provide<br />

change information. These bits are set to a logic 1 whenever a control<br />

input from the MODEM changes state. They are reset to logic 0<br />

whenever the CPU reads the MODEM Status Register.<br />

~ The content of the MODEM Status Register are indicated and<br />

described below.<br />

MODEM Status Register (MSR)<br />

3FE<br />

BIT 6 5 4 3 2 1 0<br />

L::<br />

DELTA CLEAR TO<br />

I<br />

SEND WCTS)<br />

DELTA DATASET<br />

READY WDSR)<br />

L----____• TRAILING EDGE RING<br />

INDICATOR (TERI)<br />

DELTA RX LINE SIGNAL<br />

OETECT WRLSD)<br />

CLEAR TO SEND (CTS)<br />

~------------;.~ DATA SET READY (oSD)<br />

'---------------. RING INDICATOR (RI)<br />

'-----------------. RECEIVE LINE SIGNAL<br />

DETECT (RLSD)<br />

2-143


Bit 0: This bit is the Delta Clear to Send (DCTS) indicator. Bit 0<br />

indicates that the CTS input to the chip has changed state since the last<br />

time it was read by the CPU.<br />

Bit 1: This bit is the Delta Data Set Ready (DDSR) indicator. Bit 1<br />

indicates that the DSR input to the chip has changed state since the last<br />

~~~re~~~~ll ~<br />

Bit 2: This bit is the Trailing Edge of Ring Indicator (TERI) detector.<br />

Bit 2 indicates that the RI input to the chip has changed from an On<br />

(logic 1) to an Off (logic 0) condition.<br />

Bit 3: This bit is the Delta Received Line Signal Detector (DRLSD)<br />

indicator. Bit 3 indicates that the RLSD input to the chip has changed<br />

state.<br />

Note: Whenever bit 0, 1, 2, or 3 is set to a logic 1, a MODEM Status<br />

interrupt is generated.<br />

Bit4: This bit is the complement ofthe Clear to Send (CTS) input. Ifbit<br />

4 (loop) of the MCR is set to a 1, this bit is equivalent to RTS in the<br />

MCR<br />

Bit 5: This bit is the complement ofthe Data Set Ready (DSR) input. If<br />

bit 4 ofthe MCR is set to ai, this bit is equivalent to DTR in the MCR<br />

Bit6: This bit is the complement ofthe Ring Indicator (RI) input. Ifbit 4 r-...<br />

of the M CR is set to aI, this bit is equivalent to OUT 1 in the M CR<br />

Bit 7: This bit is the complement of the Received Line Signal Detect<br />

(RLSD) input. If bit 4 ofthe MCR is set to ai, this bit is equivalent to<br />

OUT 2 of the MCR<br />

Receiver Buffer Register<br />

The Receiver Buffer Register contains the received character as<br />

defined below.<br />

Receiver Buffer Register (RBR)<br />

3F8 DLAB;O READ ONLY<br />

BIT 4 3 2 1 0<br />

I<br />

~~ m~ml<br />

1,----1________<br />

'---.--------:. DATABIT4 <br />

'-----------. DATABIT5 <br />

'-----------------. DATA BIT 6 <br />

'-----------------.. DATA BIT 7 <br />

Bit 0 is the least significant bit and is the first bit serially received.<br />

2-144


Transmitter Holding Register <br />

The Transmitter Holding Register contains the character to be serially <br />

transmitted and is defined below: <br />

Transmitter Holding Register (THR) <br />

r'"'\<br />

3F8 DLAB=O WRITE ONLY<br />

BIT 7 6 5 4 3 2 1 0<br />

I I • DATA BIT 0<br />

L----==; DATA BIT 1<br />

'---------1. DATA BIT 2<br />

'---------.. DATABIT3<br />

'-------------1. DATA BIT 4<br />

L--------------a DATA BIT 5<br />

'---------------____ DATA BIT 6<br />

L-_______________----I~ DATA BIT 7<br />

Bit 0 is the least significant bit and is the first bit serially transmitted.<br />

2-145


Selecting The Interface Format<br />

The Voltage or Current loop interface is selected by plugging the<br />

programmed shunt module, with the locator dot up or down. See the<br />

figure below for the two configurations.<br />

D<br />

o<br />

D<br />

D<br />

o<br />

ASYNCHRONOUS<br />

COMMU N ICATI 0 NS 1....I...I...L..J..I....L...L.J~t..L.L.JL...L...L..L..L.J.J..L.L~II-'-I-..................<br />

ADAPTER<br />

CURRENT LOOP<br />

INTERFACE<br />

DOT DOWN<br />

VOLTAGE INTERFACE<br />

DOT UP<br />

Figure 23. SELECTING THE INTERFACE FORMAT<br />

2-146


Asynchronous Communications Adapter Connector<br />

Interface Specifications<br />

REAR PANEL<br />

/""\ \\<br />

External<br />

Device<br />

_OCZ5<br />

o<br />

~ 0~<br />

AT STANDARD TTL LEVELS<br />

Description <br />

...<br />

....<br />

... ,<br />

NC <br />

Transmit Data <br />

Receive Data<br />

Request to send<br />

Clear to send<br />

Data set ready<br />

Signal ground<br />

Carrier detect<br />

... +Transmit current loop return (20 rna)<br />

~<br />

NC<br />

....L<br />

....<br />

-Transmit current loop data (20 rna)<br />

NC<br />

NC<br />

NC<br />

NC<br />

NC<br />

NC<br />

+Receive current loop data (20 rna)<br />

NC<br />

Data Terminal Ready<br />

NC<br />

Ring Indicate<br />

NC<br />

NC<br />

- Receive current loop return (20 rna)<br />

Pin<br />

1<br />

2<br />

3 ..<br />

4<br />

5<br />

..<br />

r'<br />

6<br />

..<br />

7<br />

8<br />

..<br />

9<br />

0<br />

• 25<br />

• •<br />

•<br />

•<br />

• • 14<br />

•<br />

0<br />

10<br />

11<br />

Asynchronous<br />

12<br />

Communications<br />

13 Adapter<br />

14 (RS232C)<br />

15<br />

16<br />

17<br />

18 ...<br />

19<br />

20<br />

21<br />

22<br />

23 •<br />

24<br />

25 ..<br />

..<br />

NOTE:<br />

To avoid inducing voltage surges on interchange circuits, signals from interchange<br />

circuits shall not be used to drive inductive devices, such as relay coils.<br />

2-147


2-148 <br />

NOTES


SECTION 3. ROM and SYSTEM<br />

r", USAGE<br />

Contents:<br />

ROM BIOS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .<br />

BIOS Cassette Logic. . . . . . . . . . . . . . . . . . . . . . . . . . . . .<br />

Keyboard Encoding and Usage . . . . . . . . . . . . . . . . . . .<br />

Low Memory Maps. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .<br />

3-2 <br />

3-8 <br />

3-11 <br />

3-21 <br />

3-1


ROM BIOS<br />

The ROM resident Basic I/O System (BIOS) provides the device<br />

level control of the major I/O devices in the System Unit. The<br />

BIOS routines allow the assembly language programmer to<br />

perform block (diskette and cassette) or character (Video, ~<br />

communications, keyboard and printer) level I/O operations<br />

without any concern for device address and operating characteristics.<br />

Additionally, system services such as time of day and<br />

memory size determination are provided. The goal is to provide<br />

an operational interface to the system and relieve the programmer from<br />

concern over hardware device characteristics.<br />

Finally the BIOS interface· insulates the user from the hardware<br />

allowing new devices to be added to the System Unit, yet<br />

retaining the BIOS level interface to the device. In this manner,<br />

user programs become transparent to hardware modifications<br />

and enhancements. A complete listing of the BIOS is provided<br />

in Appendix "A".<br />

Use of BIOS<br />

Access to the BIOS function is through the 8088 software<br />

interrupts. Each BIOS entry point is available through its own<br />

interrupt, which can be found in the interrupt vector listing.<br />

The software interrupts lOH through lAH each access a<br />

different BIOS routine. For example, to determine the amount<br />

of memory available in the system,<br />

INT 12H<br />

will invoke the memory size determination routine in BIOS<br />

and return the value to the caller.<br />

Parameter Passing<br />

All parameters passed to and from the BIOS routines go through<br />

the 8088 registers. The prologue of each BIOS function indicate<br />

the registers used on the call and the return. For the memory<br />

size example above, no parameters are passed, and the result,<br />

memory size in 1 K Byte increments is returned in the<br />

AX register.<br />

Where a BIOS function has several possible operations, the AH<br />

register is used on input to indicate the desired operation. For<br />

example, to set the time of day, the following code is required.<br />

3-2


MOV AH,l ;function is to set time of<br />

day.<br />

MOV CX,HIGH_COUNT ;establish the current time. <br />

MOV DX, Low_COUNT <br />

INT lAH ;Set the time. <br />

~ While to read the time of day:<br />

MOV AH,O ;function is to read the time<br />

of day.<br />

INT lAH ;read the timer.<br />

As a general rule, the BIOS routines preserve all registers except<br />

for AX and the flags. Other registers are modified on return<br />

only if they are returning a value to the caller. The exact register<br />

usage can be seen in the prologue of each BIOS function.<br />

Interrupt Vector Listing<br />

Interrullt Number Name BIOS Initialization<br />

0 Divide by Zero None<br />

1 Single Step None<br />

2 Non Maskable NMLlNT (FOOO:E2C3)<br />

3 Breakpoint None<br />

4 Overflow None<br />

5 Print Screen PRINLSCREEN (FOOO:FF54)<br />

6 Unused<br />

7 Unused<br />

8 Time of Day TIMER-INT (FOOO:FEA5)<br />

9 Keyboard KLINT (FOOO:E987)<br />

A<br />

Unused<br />

B<br />

8259<br />

Unused<br />

C<br />

Interrupt<br />

Unused (Reserved Communications)<br />

D<br />

Vectors<br />

Unused <br />

E Diskette DISK_I NT (FOOO:EF57) <br />

F<br />

Unused (Reserved Printer) <br />

10 Video VIDEO_I 0 (FOOO:F065) <br />

11 Equipment Check EQUIPMENT (FOOO:F84D) <br />

12 Memory MEMORY_SIZE_DETERMINE (FOOO:F841) <br />

13 Diskette DISKETTE_I 0 (FOOO:EC59) <br />

14 BIOS Communications RS2.3LI 0 (FOOO:E739) <br />

15 Entry Cassette CASSETTE_I 0 (FOOO:F859) <br />

16 Points Keyboard KEYBOARD_I 0 (FOOO:E82E) <br />

17 Printer PRINTER_I 0 (FOOO:EF02) <br />

18 Cassette BASI C (F600:0000) <br />

19 Bootstrap BOOLSTRAP (FOOO:E6F2) <br />

lA Time of Day TIME_OF_DAY (FOOO:FE6E) <br />

lB User Supplied Keyboard Break DUMMY_RETURN (FOOO:FF53) <br />

lC Routines Timer T\ick , DUMMY RETU RN (FOOO: FF53) <br />

lD Video Initialization VIDEO_PARMS (FOOO:FOA4)<br />

IE<br />

BIOS<br />

Diskette Parameters DISK_BASE (FOOO:EFC7)<br />

IF<br />

Parameters<br />

Video Graphics Chars None<br />

3-3


3-4 <br />

NOTES


Vectors With Special Meanings<br />

Interrupt 1 BH - Keyboard Break Address<br />

This vector points to the code to be exercised when the CTRL<br />

BREAK keys are depressed on the keyboard. The vector is<br />

r-"\ invoked while responding to the keyboard interrupt, and control<br />

should be returned via an lRET instruction. The power on routines<br />

initialize this vector to point to an lRET instruction, so that nothing<br />

happens when CTRL BREAK keys are depressed unless<br />

the application program sets a different value.<br />

Control may be retained by this routine, with the following<br />

problems. The BREAK may have occurred during interrupt<br />

processing, so that one or mor End of Interrupt commands must<br />

be set to the 8259 controller. Also, all I/O devices should be reset in<br />

case an operation was underway at that time.<br />

Interrupt 1 CH - Timer Tick<br />

This vector points to the code to be executed on every tick of the<br />

system clock. This vector is invoked while responding to the<br />

timer interrupt, and control should be returned via an lRET<br />

~ instruction. The power on routines initialize this vector to point<br />

. to an lRET instruction, so that nothing happens unless the<br />

application modifies the pointer. It is the responsibility of the<br />

application to save and restore all registers that will be modified.<br />

Interrupt IDH - Video Parameters<br />

This vector points to a data region containing the parameters<br />

required for the initialization of the 6845 on the video card. Note<br />

that there are four separate tables, and all four must be<br />

reproduced if all modes of operation are to be supported. The<br />

power on routines initialize this vector to point to the parameters<br />

contained in the ROM video routine.<br />

Interrupt 1 EH - Diskette Parameters<br />

This vector points to a data region containing the parameters<br />

required for the diskette drive. The power on routines initialize<br />

the vector to point to the parameters contained in the ROM<br />

diskette routine. These default parameters represent the<br />

specified values for any <strong>IBM</strong> drives attached to the machine.<br />

Changing this parameter block to reflect the specifications of<br />

the other drives attached may be necessary.<br />

3-5


Interrupt 1 FH - Graphics Character Extensions<br />

When operating in the graphics modes ofthe Color/Graphics Monitor<br />

Adapter (320 x 200 or 640 x 200), the read/write character interface<br />

will form the character from the ASCII code point, using a set of dot<br />

patterns. The dot patterns for the first 128 code points are<br />

contained in ROM. To access the other 128 code points, this ~<br />

vector must be established to point at a table of up to I K bytes,<br />

where each code point is represented by 8 bytes of graphic<br />

information. At power on this vector is initialized to 0:0, and it is<br />

the responsibility of the user to change this vector if the<br />

additional code points are required.<br />

Other Read/Write Memory Usage<br />

The <strong>IBM</strong> ROM BIOS routines use 256 bytes of memory starting <br />

at absolute 400 to 4FF. Locations 400-407 contain the base <br />

addresses of any RS232 cards attached to the system, O's ifnone <br />

attached. These locations, in order, represent the 0 to 3 values used as <br />

the parameter to the RS232 BIOS routine. Locations <br />

408-40F provide the same function, but for the PRINTER. <br />

Memory locations 300-3FF are used as a stack area during the <br />

power on initialization, and the bootstrap, when control passed <br />

to it from power on. If the user desires the stack in a different area, ~<br />

it must be set by the application. <br />

Note: Use the Interrupt Vector Listing as an aid to locate these topics <br />

in the ROM BIOS listing, Appendix "A". <br />

BIOS Programming Tip<br />

When programming with BIOS you should keep in mind that if an error<br />

is reported by the diskette code, to reset the diskette adapter and retry<br />

the operation. A specified number of retrys should be required on reads<br />

to ensure the problem is not due to motor start-up.<br />

3-6


BIOS Memory Map <br />

STARTING ADDRESS HEX<br />

00000<br />

00080<br />

BIOS<br />

INTERRUPT<br />

VECTORS<br />

AVAILABLE<br />

INTERRUPT<br />

VECTORS<br />

00400<br />

BIOS<br />

DATA<br />

AREA<br />

00500<br />

USER<br />

READ/<br />

WRITE<br />

MEMORY<br />

,. L".<br />

.... L".<br />

,.~<br />

,..~<br />

F4000<br />

F6000<br />

USER<br />

READ ONLY<br />

MEMORY<br />

CASSETTE<br />

BASIC<br />

INTERPRETER<br />

FEOOO<br />

BIOS<br />

PROGRAM<br />

AREA<br />

Figure 24. BIOS MEMORY MAP<br />

3-7


BIOS Cassette Logic<br />

Software Algorithms<br />

Interrupt 15<br />

The cassette routine will be called with the request type in AH and ~<br />

the address of the bytes to be read or written will be specified by <br />

(ES):(BX) and the number of bytes to read/write will be specified by <br />

(CX). The actual number of bytes read will be returned in (DX). <br />

Read block and write block will automatically tum the motor on at the <br />

start and off at the end. The requests are as follows: <br />

(AH) = 0 Tum the cassette motor on. <br />

(AH) = 1<br />

(AH) = 2<br />

(AH) = 3<br />

STATUS:<br />

AH=OO<br />

AH=Ol<br />

AH=02<br />

AH=04<br />

AH=80<br />

Note:<br />

Cassette Write<br />

Tum the cassette motor off. <br />

(Read Block ) Read (CX) bytes into <br />

memory beginning at address (ES):(BX)<br />

and return actual number of bytes read in<br />

(DX). Return the cassette status in (AH).<br />

(Write Block) Write (CX) bytes onto the <br />

cassette beginning at address (DS):(BX). <br />

Return the cassette status in (AH). <br />

No errors<br />

CRC-Error (Read Block)<br />

No data transitions<br />

No leader<br />

Invalid command<br />

The carry flag will be set on any error.<br />

The WRITE BLOCK routine writes a tape block on the cassette. The <br />

tape block is described in Data Record Architecture page (3-10). <br />

The WRITE BLOCK routine turns on the cassette motor and a syn­<br />

chronization bit (0) and then writes 256 bytes of all ones, the leader, <br />

to the tape. Next, one or more data blocks are written (depends on <br />

number in CX). After each data block of 256 bytes, a two byte <br />

CRC is written. The data bytes are taken from the memory location <br />

pointed at by ES. <br />

The WRITE BYTE routine disassembles the byte and writes it a <br />

bit at a time to the cassette. The method used is to set TIMER 2 to <br />

the period of the desired data bit. The timer is set to a period of <br />

1.0 millisecond for a one bit and 0.5 millisecond for a zero bit.<br />

3-8


The timer is set mode 3 which means it will output a square wave<br />

with period given by its count register. The timer's period is changed on<br />

the fly for each data bit to be written to the cassette. Ifthe number of<br />

data bytes to be written is not an integral multiple off 25 6, then after the<br />

last desired data byte from memory has been written, the data block will<br />

~ be extended to 256 bytes by writing multiples ofthe last data byte. The<br />

last block will be closed with two CRC bytes as usual. After the last<br />

data block, a trailer consisting of four bytes of all one bits will be<br />

written. Finally, the motor will be turned off. There are no errors<br />

reported by this routine.<br />

\.-- 250 USEC ----.j<br />

I<br />

r<br />

500 USEe<br />

·1<br />

ZERO BIT<br />

lONE BIT<br />

~<br />

1000 USEC<br />

I~<br />

·1<br />

Cassette Read<br />

The READ BLOCK routine turns on the cassette motor and then<br />

delays for approximately 0.5 secs for it to come up to speed.<br />

The READ BLOCK routine then searches for leader and must<br />

detect all one bits for approximately 1/4 ofleader length before it<br />

can look for the sync byte. If a correct sync byte (X '16') is not<br />

found, the routine goes back and searches for leader again.<br />

The data is read a bit a a time and assembled into bytes. After<br />

each byte is assembled it is written into memory at location<br />

ES:BX and then BX is incremented by one.<br />

After each multiple of 256 data bytes are read, the CRe is read<br />

and compared to the eRe generated. If a eRe error is detected,<br />

the routine will exit with the carry flag set to indicate an error<br />

and status (AH) - 01 for eRe error. DX will contain the number<br />

of bytes written into memory.<br />

Note: The Time of Day Interrupt (IRQO) is disabled during the<br />

cassette read operation.<br />

3-9


Data Record Architecture <br />

MOTOR<br />

ON<br />

MOTOR<br />

OFF<br />

1. Leader 256 bytes (of ones)<br />

2. Sync byte ASCII Sync Char (X'16')<br />

3. Sync byte (X '16')<br />

4. Data Blocks 256 bytes<br />

5. CRC -- 2 bytes - for each data block<br />

Error Recovery<br />

Error recovery is handled by software. A cyclic redundancy<br />

check (CRC) is used to detect errors. The polynomial used is:<br />

G(X) - X16 «X12 « X5 X 1<br />

Which is the polynomial used by the SDLC interface. Essentially,<br />

as bits are written/read from tape, they are passed through<br />

the CRC-register in software. After a block of data is written, the<br />

complemented value of the calculated CRC-register is written on<br />

tape. On reading the cassette data, the CRC bytes are read and<br />

compared to the generated CRC value. If the read CRC does not<br />

equal the generated one, the processor's carry flag is set and<br />

status (AH) is set to X'Ol' to indicate a CRC error has occurred.<br />

Also, the routine is exited on CRC error.<br />

3-10


Keyboard Encoding and Usage<br />

Encoding<br />

The keyboard routine provided by <strong>IBM</strong> in ROM BIOS is<br />

responsible for converting the keyboard scan codes into what<br />

~ill be termed "Extended ASCII".<br />

Extended ASCII encompasses one byte character codes with<br />

possible values of 0-255, an extended code for certain extended<br />

keyboard functions and functions that are handled within the<br />

keyboard routine or through interrupts.<br />

Character Codes<br />

The following character codes are passed through the BIOS<br />

keyboard routine to the system or application program. A<br />

"-1" means the combination is suppressed in the keyboard<br />

routine. The codes are returned in AL. See Appendix C for exact<br />

codes. Use keyboard Scan Code diagram for reference page 2-17.<br />

Table 25. Character Codes<br />

KEY# BASE CASE UPPER CASE CTRL ALT<br />

1 ESC ESC ESC -1 <br />

2 1 Y2 -1 Note 1 <br />

3 2 @ NU L (000) Note 1 Note 1 <br />

4 3 # -1 Note 1 <br />

5 4 $ -1 Note 1 <br />

6 5 % -1 Note 1 <br />

7 6 1\ RS (030) Note 1 <br />

8 7 & -1 Note 1 <br />

9 8 * -1 Note 1 <br />

10 9 ( -1 Note 1 <br />

11 0 ) -1 Note 1 <br />

12 - -<br />

US (031) Note 1<br />

13 = + -1 Note 1 <br />

14 Backspace (008) Backspace (OOS) DEL(127) -1 <br />

15 ---+t (009) I+- (Note 1) -1 -1 <br />

16 q 0 DCl (017) Note 1 <br />

17 w W ETB (023) Note 1 <br />

18 a E ENQ (005) Note 1 <br />

19 r R DC2 (018) Note 1 <br />

20 t T DC4 (020) Note 1 <br />

21 Y<br />

Y EM (025) Note 1 <br />

22 u U NAK (O21) Note 1 <br />

23 i I HT (O09) Nota 1 <br />

24 0 0 SI (O15) Note 1 <br />

25 p P OLE (O16) Note 1 <br />

26 [ ! ESC (O27) -1 <br />

27 ] I GS (029) -1 <br />

3-11


Table 25. Character Codes (cont.)<br />

KEY # BASE CASE UPPER CASE<br />

CTRL<br />

ALT<br />

28 CR CR <br />

29CTRL -1 -1 <br />

30 a A <br />

31 s S <br />

32 d D <br />

33 f F <br />

34 g G <br />

35 h H <br />

36 j J <br />

37 k K <br />

38 I L <br />

39 : <br />

,<br />

40 "<br />

\ <br />

~<br />

41<br />

42SHIFT -1 -1 <br />

43<br />

I <br />

\ I<br />

44 z Z <br />

45 x X <br />

46 c C <br />

47 v V <br />

48 b B <br />

49 n N <br />

50 m M<br />

51 <<br />

,<br />

52 ><br />

53 / ?<br />

54SHIFT -1 -1<br />

55 * (Note 2)<br />

56ALT -1 -1<br />

57 SP SP<br />

58 CAPS -1 -1<br />

LOCK<br />

59 NUL (Note 1) NUL (Note 11<br />

60 NUL (Note 1) NUL(Notel)<br />

61 NUL (Note 1) NU L (Note 1)<br />

62 NUL(Notel) NUL (Note 1)<br />

63 NUL (Note 1) NUL (Note 1)<br />

64 NUL (Note 1) NUL (Note 1)<br />

65 NUL (Note 1) NUL (Note 1)<br />

66 NUL (Note 1) NUL (Note 1)<br />

67 NUL (Note 1) NUL (Note 1)<br />

68 NUL (Note 1) NUL (Note 1)<br />

69NUM -1 -1<br />

LOCK <br />

70SCROLL -1 -1 <br />

LOCK <br />

LF (010) -1<br />

-1 -1<br />

SOH (001) Note 1<br />

DC3 (019) Note 1<br />

EOT (004) Note 1<br />

ACK (006) Note 1<br />

BEL (007) Note 1<br />

BS (008) Note 1 <br />

LF (010) Note 1 <br />

VT(Ol1) Note 1 <br />

FF(012) Note 1 <br />

-1 -1 <br />

-1 -1 <br />

-1 -1 <br />

-1 -1 <br />

FS (028) -1<br />

SUB (026) Note 1<br />

CAN (024) Note 1<br />

ETX (003) Note 1<br />

SYN (022) Note 1<br />

STX (002) Note 1<br />

SO (014) Note 1 <br />

CR (013) Note 1 <br />

-1 -1 <br />

-1 -1 <br />

-1 -1 <br />

-1 -1 <br />

(Note 1) -1<br />

-1 -1<br />

SP<br />

SP<br />

-1 -1<br />

NUL (Note 1) NUL (Note 1)<br />

NUL (Note 1) NUL (Note 1)<br />

NUL (Note 1) NU L (Note 1)<br />

NUL (Note 1) NUL (Note 1)<br />

NUL (Note 1) NUL (Note 1)<br />

NUL (Note 1) NU L (Note 1)<br />

NUL (Note 1) NU L (Note 1)<br />

NUL (Note 1) NUL (Note 1)<br />

NU L (Note 1) NUL (Note 1)<br />

NUL (Note 1) NUL (Note 1)<br />

Pause -1<br />

(Note 2)<br />

Break -1<br />

(Note 2)<br />

Note 1: Refer to Extended Codes Page (3-13).<br />

Note 2: Refer to Special Handling Page (3-15).<br />

3-12


Keys 71-83 have meaning only in base case, in NUMLOCK (or<br />

shifted) states, or in CTRL state. It should be noted that the shift<br />

key temporarily reverses the current NUMLOCK state.<br />

KEY # NUM LOCK BASE CASE ALl ClRL<br />

71 7 Home (Note 1) Note 1 Clear Screen<br />

72 8 of' (Note 1) Note 1 -1<br />

73 9 PageUp (Note 1) Note 1 Top of Text & Home<br />

74 - - -1 -1<br />

75 4 ~ (Note 1) Note 1 Reverse Word<br />

(Note 1)<br />

76 5 -1 Note 1 -1<br />

77 6 ~ (Note 1) Note 1 Adv Word<br />

(Note 1)<br />

78 + + -1 -1<br />

79 1 End (Note 1) Note 1 Erase to EO L<br />

(Note 1)<br />

80<br />

81<br />

2<br />

3<br />

..v<br />

(Note 1)<br />

PageDown (Note 1)<br />

Note 1<br />

Note 1<br />

-1<br />

Erase to EOS<br />

(Note 1)<br />

82 0 INS Note 1 -1<br />

83 DEL (Notes 1,2) Note 2 Note 2<br />

Note 1: Refer to Extended Codes Page (3-13).<br />

Note 2: Refer to Special Handling Page (3-15).<br />

Extended Codes<br />

A. Extended Functions<br />

For certain functions that can not be represented in the<br />

standard ASCII code, an extended code is used. A character<br />

code of 000 (NUL) is returned in AL. This indicates that the<br />

system or application program should examine a second<br />

code that will indicate the actual function. Usually, but not<br />

always, this second code is the scan code of the primary key<br />

that was pressed. This code is returned in AH.<br />

3-13


Table 26. Keyboard Extended Functions<br />

SECOND CODE<br />

FUNCTION<br />

3 NUL Character<br />

15<br />

16-25 ALTn, W, E, R, T, Y, U, I, 0, P<br />

30-38 ALT A, S, 0, F, G, H, J, K, L<br />

44-50 ALT Z, X, C, V, B, N, M<br />

59-68 Fl-Fl0 Function Keys Base Case<br />

71 Home<br />

72 t<br />

73 Page Up & Home Cursor<br />

75


ALT - Temporarily shifts keys 2-13, 16-25, 30-38,44-50, and<br />

59-68 to ALT state. Used with CTRL and DEL to cause<br />

system reset function described in Section 1.3.<br />

ALT has a special use to allow the user to enter any character<br />

code (0-255) into the system from the keyboard. The user<br />

holds down the ALT key and types the decimal value of<br />

characters using the numeric keyboard (keys 71-73, 75-77,<br />

79-82). The ALT key is then released. If more than three<br />

digits are typed, a modulo 256 result is created. These three<br />

keys are interpreted as a character code (000-255) and are<br />

transmitted through the keyboard routine to the system or<br />

application program. ALT is handled internal to keyboard<br />

routine.<br />

CAPS LOCK - Shifts keys 16-25, 30-38, 44-50 to upper case<br />

A second depression of CAPS LOCK reverses the action.<br />

Handled internal to keyboard routine.<br />

NUM LOCK - Shifts keys 71-73, 75-77, 79-83 to numeric<br />

state. A second depression of NUM LOCK reverses the<br />

action. Handled internal to keyboard routine.<br />

SCROLL LOCK - Interpreted by appropriate application<br />

programs as indicating that the use of the cursor control<br />

keys should cause windowing over the text rather than<br />

cursor movement. A second depression of SCROLL LOCK<br />

reverses the action. The keyboard routine simply records<br />

the current shift state of SCROLL LOCK. It is up to the<br />

system or application program to perform the function.<br />

C. Shift Key Priorities and Combinations<br />

If combinations of ALT, CTRL and SHIFT are pressed and<br />

only one is valid, the precedence is as follows: Highest is<br />

ALT, then CTRL, then SHIFT. The only valid combination<br />

is ALT CTRL, which is used in system reset.<br />

Special Handling<br />

A. System Reset<br />

The combination of ALT CTRL DEL (Key 83) will result in<br />

the keyboard routine initiating the equivalent of a system<br />

reset/reboot. Handled internal to keyboard routine.<br />

3-15


B. Break<br />

The combination CTRL BREAK will result in the keyboard<br />

routine signaling interrupt -lAo Also, the extended characters<br />

(AL =DOH, AH = DOH) will be returned.<br />

Power up initialization, this interrupt is set up to cause the <br />

break sequence to be ignored. It is up to the system or<br />

application initialization code to change the interrupt <br />

vector in order to support an actual "break" function. <br />

C. Pause<br />

The combination CTRL NUM-LOCK will cause the keyboard<br />

interrupt routine to loop, waiting for any key except<br />

NUM-LOCK to be pressed. This provides a system/<br />

application transparent method of suspending list/print/<br />

etc. temporarily, and then resuming. The "Unpause" key <br />

is thrown away. Handled internal to keyboard routine. <br />

D. The following keys will have their typematic action<br />

suppressed by the keyboard routine: CTRL, SHIFT, ALT,<br />

NUM-LOCK, SCROLL-LOCK, CAPS LOCK, INS.<br />

E. Print Screen<br />

The combination SHIFT-PRINT SCREEN (Key 55) will<br />

result in an interrupt invoking the print screen routine.<br />

This routine works in alpha/graphics mode, with unrecognizable<br />

characters printing as blanks.<br />

The keyboard routine does its own buffering. The buffer is big<br />

enough to support a fast typist. If a key is entered when the<br />

buffer is full, the key will be ignored and the "bell" will<br />

be sounded.<br />

r'" <br />

3-16


Keyboard Usage<br />

This section is intended to outline a set ofguidelines for key usage when<br />

performing commonly used functions.<br />

~ Table 27. Keyboard - Commonly Used Functions<br />

FUNCTION<br />

Home Cursor<br />

Return to outermost menu<br />

Move cursor up<br />

Page up, scroll backwards<br />

25 lines & home<br />

Move cursor left<br />

Move cursor right<br />

Scroll to end of text<br />

Place cursor at end of line<br />

Move cursor down<br />

Page down, scroll forwards<br />

25 lines & home<br />

Start/Stop insert text at<br />

cursor, shift text right<br />

in buffer<br />

Delete character at cursor<br />

Destructive bac kspace<br />

Tab forward<br />

Tab reverse<br />

Clear screen and home<br />

Scroll up<br />

Scroll down<br />

Scroll left<br />

Scroll right<br />

Delete from cursor to<br />

EOL<br />

Exit/Escape<br />

Start/Stop Echo screen<br />

to printer<br />

Delete from cursor to<br />

EOS<br />

KEY(S) <br />

HOME <br />

HOME <br />

i<br />

PG UP<br />

...- Key 75<br />

~<br />

END<br />

!<br />

PGON<br />

INS<br />

DEL<br />

...- Key 14<br />

--./<br />

I+­<br />

CTRL HOME<br />

i<br />

!<br />

...­<br />

~<br />

CTRLEND<br />

ESC<br />

PRTSC<br />

CTRL K55<br />

GTRL PG<br />

ON<br />

COMMENT<br />

Editors; word processors<br />

Menu driven applications<br />

Full screen editor, word<br />

processor<br />

Editors; word processors<br />

Text, command entry<br />

Text, command entry<br />

Editors; word processors<br />

Full screen editor, word<br />

processor<br />

Editors; word processors<br />

Text, command entry<br />

Text, command entry<br />

Text, command entry<br />

Text entry<br />

Text entry<br />

Command entry<br />

In scroll lock mode<br />

In scroll lock mode<br />

In scroll lock mode<br />

In scroll lock mode<br />

Text, command entry<br />

Editor, 1 level of menu, etc<br />

Any time<br />

Text, command entry<br />

3-17


Table 27. Keyboard - Commonly Used Functions (cont.)<br />

FUNCTION<br />

Advance word<br />

Reverse word<br />

Window Right<br />

Window Left<br />

Enter insert mode<br />

Exit insert mode<br />

Cancel current line<br />

Suspend system (pause)<br />

Break interrupt<br />

System reset<br />

Top of document and<br />

home cursor<br />

Standard Function Keys<br />

Secondary function keys<br />

Extra function keys<br />

Extra function keys<br />

KEY(S)<br />

CTRL -+<br />

CTRL ~<br />

CTRL -+<br />

CTRL ~<br />

INS<br />

INS<br />

ESC<br />

CTRL<br />

NUMLOCK<br />

CTRL<br />

BREAK<br />

ALTCTRL<br />

DEL<br />

CTRL PG UP<br />

F1-F10<br />

SHIFT F1-F10<br />

CTRL F1-F10<br />

ALTF1-F10<br />

ALT Keys<br />

2-13<br />

(1-9,0,-,=)<br />

ALT A-Z<br />

COMMENT<br />

Text entry<br />

Text entry<br />

When text is too wide to fit<br />

screen<br />

When text is too wide to fit<br />

screen<br />

Line editor<br />

Line editor<br />

Command entry, text entry<br />

Stop list, stop program, etc.<br />

Resumes on any key<br />

Interrupt current process<br />

Reboot<br />

Editors, word processors<br />

Primary function keys<br />

Extra function keys if 10<br />

are not sufficient<br />

Used when stickers are<br />

put along top of keyboard<br />

Used when function starts<br />

with same letter as one of<br />

the alpha keys<br />

3-18


Table 28. BASIC Screen Editor Special Functions<br />

FUNCTION<br />

Carriage return<br />

Line feed<br />

Bell<br />

Home<br />

Cursor up<br />

Cursor down<br />

Cursor left<br />

Cu rsor right<br />

Advance one word<br />

Reverse one word<br />

Insert<br />

Delete<br />

Clear screen<br />

Freeze output<br />

Tab advance<br />

Stop execution (break)<br />

Delete current line<br />

Delete to end of line<br />

Position cursor to end of line<br />

KEY<br />

~<br />

CTRl -.J<br />

CTRl G<br />

HOME<br />

\<br />

+­<br />

--+-<br />

CTRl--+-<br />

CTRl +­<br />

INS<br />

DEl<br />

CTRl HOME<br />

CTRl NUMlOCK<br />

--.,<br />

CTRl BREAK<br />

ESC<br />

CTRl END<br />

END<br />

".-..." Table 29. DOS Special Functions<br />

FUNCTION<br />

Suspend<br />

Echo to printer<br />

Stop echo to printer<br />

Exit cllrrent function<br />

(break)<br />

Backspace<br />

Line feed<br />

Cancel line<br />

Copy character<br />

Copy till match<br />

Copy remaining<br />

Skip character<br />

Skip until match<br />

Enter insert mode<br />

Exit insert mode<br />

Make new line the template<br />

String separator in REPLACE<br />

End of file in keyboard input<br />

KEY<br />

CTRl NUMlOCK<br />

CTRL-PRTSC<br />

(Key 55 any case)<br />

CTRl·PRTSe<br />

(Key 5!J any case)<br />

CTRL<br />

BREAK<br />

+- Key 14<br />

CTRl -.J<br />

ESC<br />

Flor --+­<br />

F2<br />

F3<br />

DEl<br />

F4<br />

INS<br />

INS<br />

F5<br />

F6<br />

F6<br />

3-19


3-20 <br />

NOTES


Low Memory Maps (O-'0600'x)<br />

Table 30. Interrupt Vectors (O-7F)<br />

ADDRESS INTERRUPT<br />

HEX HEX FUNCTION<br />

0-3 0 Divide by Zero<br />

4-7 1 Single step<br />

8-B 2 Non-Maskable Interrupt (NMI)<br />

C-F 3 Break Point Instruction ('CC'x)<br />

10-13 4 Overflow<br />

14-17 5 Print Screen<br />

18-1 F 6,7 Reserved<br />

20-23 8 Timer (18.2 per second)<br />

24-27 9 Keyboard Interrupt<br />

28-37 A,B,C,D Reserved<br />

38-3B E Diskette Interrupt<br />

3C-3F F Reserved<br />

40-43 10 Video I/O Call<br />

44-47 11 Equipment Check Call<br />

48-4B 12 Memory Check Call<br />

4C-4F 13 Diskette I/O Call<br />

50-53 14 RS232 I/O Call<br />

54-57 15 Cassette I/O Call<br />

58-5B 16 Keyboard I/O Call<br />

5C-5F 17 Printer I/O Call<br />

60-63 18 ROM Basic Entry Code<br />

64-67 19 Boot Strap Loader<br />

68-6B 1A Time of Day Call<br />

6C-6F 1B Get Control on Keyboard Break: Note 1<br />

70-73 1C Get Control on timer interrupt: Note 1<br />

74-77 10 Pointer to video initialization table: Note 2<br />

78-7B 1E Pointer to diskette parameter table: Note 2<br />

7C-7F 1F Pointer to table (1 KB) for graphics character<br />

Generator for ASCII 128-255. Defaults to 0:0<br />

Notes:<br />

(1 ) Initialized at power up to point to an IRET Instruction.<br />

(2) Initialized at power up to point to tables in ROM.<br />

3-21


Table 31. BASIC and DOS Reserved Interrupts<br />

(80-3FF)<br />

ADDRESS<br />

HEX<br />

INTERRUPT <br />

HEX <br />

80-83 20<br />

84-87 21<br />

88-8B 22<br />

8C-SF 23<br />

90-93 24<br />

94-97 25<br />

98-9B 26<br />

9C-9F 27<br />

AO-FF 28-3F<br />

100-1 FF 40-7F<br />

200-217 80-85<br />

218-3C3 86-FO<br />

3C4-3FF F1-FF<br />

FUNCTION<br />

DOS Program Terminate<br />

ODS Function Call<br />

ODS Terminate Address<br />

ODS CTRL-BRK Exit Address<br />

ODS Fatal Error Vector<br />

DOS Absolute Disk read<br />

ODS Absolute Disk write<br />

ODS Terminate, Fix in Storage<br />

Reserved for 0 OS<br />

Not Used<br />

Reserved By BASIC<br />

Used by BASIC Interpreter while BASIC is Running.<br />

Not Used<br />

Table 32. Reserved Memory Locations (400-SFF)<br />

ADDRESS<br />

HEX<br />

MODE<br />

400-48F ROM BIOS<br />

490-4CF ODS<br />

400-4EF<br />

4FO-4FF<br />

500-5FF<br />

500 ODS<br />

504 ODS<br />

510-511 BASIC<br />

512-515 BASIC<br />

516-519 BASIC<br />

51A-51O BASIC<br />

FUNCTION<br />

See BIOS Listing <br />

Used by ODS Mode Command <br />

Reserved <br />

Reserved as Intra·Application Communication <br />

area for any application. <br />

Reserved for ODS and BASIC <br />

Print Screen status flag store. <br />

O-Print screen not active or successful print <br />

screen operation. <br />

1-Print screen in progress. <br />

255-Error encountered during print screen <br />

operation. <br />

Single drive mode status byte. <br />

BASIC's segment address store. <br />

Clock interrupt vector segment: offset store. <br />

Break key interrupt vector segment: 'offset store. <br />

Disk error interrupt vector segment: ·offset store. <br />

3-22


BASIC Workspace Variables<br />

If you do DEF SEG (Default workspace segment)<br />

OFFSET<br />

LENGTH<br />

Line number of current line being executed X '2E' 2<br />

Line number of last error X '347' 2<br />

Offset into segment of start of program text X '30' 2<br />

Offset into of start of variables X '358' 2<br />

(end of program text 1-1)<br />

Keyboard buffer contents X'SA' 1<br />

if O-no characters in buffer<br />

if l-characters in buffer<br />

if you POKE & H6A, 0 you<br />

flush any characters in buffer<br />

Example:<br />

100 Print PEEK (&H2E) + 256*PEEK (&H2F)<br />

) L H<br />

100<br />

I<br />

X'S4'<br />

I<br />

X '00'<br />

I <br />

3-23


3-24 <br />

NOTES


APPENDICES<br />

Contents:<br />

Appendix A: ROM BIOS Listing ............................ . <br />

Appendix B: Assembly Instruction Set <strong>Reference</strong> .............. . <br />

Appendix C: OfCharacters, Keystrokes and Color .............. . <br />

Appendix D: Logic Diagrams ................................ . <br />

Appendix E: Unit Specifications ............................. . <br />

A-O


APPENDIX A<br />

~ ROM BIOS LISTINGS<br />

CONTENTS <br />

ITEM<br />

Equates and Data Areas<br />

Power-on Self-test<br />

Boot Strap Loader<br />

r""\ I/O Support<br />

Asynchronous<br />

Communications<br />

(RS 232) I/O<br />

Keyboard I/O<br />

Diskette I/O<br />

Printer I/O<br />

Display (VIDEO) I/O<br />

Cassette I/O<br />

System Configuration Analysis<br />

Memory-Size-<br />

Determination<br />

Equipment-<br />

Determination<br />

(Options)<br />

~<br />

Graphics-Character Generator<br />

Time-of-day<br />

Print Screen<br />

Notes for the BIOS Listing<br />

LINE<br />

NUMBER<br />

1<br />

198<br />

1355<br />

1410 <br />

1640 <br />

2255 <br />

3007 <br />

3119 <br />

4977 <br />

4903<br />

4933<br />

5503 <br />

5642 <br />

5817 <br />

ADDRESS PAGE<br />

A-2<br />

E016 A-4<br />

E6F2 A-20<br />

E729 A-20<br />

E82E A-23<br />

EC59 A-32<br />

EFD2 A-42<br />

F045 A-43<br />

F859 A-68<br />

F841 A-67<br />

F84D A-67<br />

FA6E A-75<br />

FE6E A-77<br />

FF53 A-79<br />

. A-81<br />

A-I


lOC OBJ LINE SOURCE<br />

STITlE( ROM BIOS FOR <strong>IBM</strong> PERSONAL COMPUTER)<br />

; -----------------------­<br />

; EQUATES<br />

; ------------------------­<br />

0060 PORT_A EQU 60H i 8255 PORT A ADDR<br />

0061 PORT_B EQU 61H j 8255 PORT B ADDR<br />

0062 PORT.C EQU 62H ;8255 PORT C ADDR<br />

0063 CMO]ORT EQU 63H<br />

0020 9 INTAOO EQU 20H ;8259 PORT<br />

0021 10 INTAOl EQU 21H ;8259 PORT<br />

0020 11 EOI EQU 20H<br />

0040 12 TIMER EQU 'OK<br />

0043 13 TIM.tTl EQU '3H ;8253 TINER CONTROL PORT ADDR<br />

0040 14 TINERO EQU 'OH ;8253 TIMER/CNTER a PORT ADDR<br />

0001 15 THIHT EQU 01 ITIHER a INTR RECVD MASK<br />

0008 16 OMAoa EQU 06 ;oNA STATUS REG PORT ADDR<br />

0000 17 DHA EQU 00 JDMA CHANNEL a ADDRESS REG PORT ADoR<br />

0540 18 MAX.PERIOD EQU 540H<br />

0410 I. MIN.PERIOD EQU 410H<br />

0060 20 KBD.IN EQU 60H IKEYBDARD DATA IN AOOR PORT<br />

0002 21 KBDINT EQU 02 ;KEYBOARD INTR I1A.SK<br />

0060 22 KB.DATA EQU 60H ; KEYBOARD SCAN CODE PORT<br />

0061 23<br />

24<br />

KB.CTL EQU 61H ; CONTROL BITS FOR KEYBOARD SENSE DATA<br />

1-------------------------------------------­<br />

25 j 8088 INTERRUPT LOCATIONS<br />

26 ;------------­----------­------------­-------­<br />

0000 27 ABSO SEGMENT AT 0<br />

0000 2. LABEL BYTE<br />

0008 2. ORG 2*'<br />

0008 30 LABEL WORD<br />

0014 31 ORG 5*'<br />

0014<br />

LABEL<br />

0020<br />

0020<br />

33<br />

3.<br />

O.G<br />

.*.<br />

LABEL<br />

WORD<br />

WORD<br />

0020 35 LABEl DWORD<br />

0040 36 O.G 10H*4<br />

0040 37 LABEl WORD<br />

0074 38 ORG IDH*4<br />

0074 39 LABEL DWORD I POINTER TO VIDEO PARHS<br />

0078 .0 ORG 01EH*4 I INTERRUPT IEH<br />

0078 .1 OISK]OINTER LABEl DWORD<br />

D07C .2 DRG 01 FH*4 ; LOCATION OF POINTER<br />

DO?C 43 EXT_PTR LABEL DWORD I POINTER TO EXTENSION<br />

7COO<br />

••<br />

ORG 7COOH<br />

7COO .s BOOT_LOCN LABEl FAR<br />

46 ABSO ENDS<br />

47<br />

48 j--------------------­<br />

49 ; STACK -­ USED DURING INITIALIZATION ONLY<br />

50 ;---------------------­<br />

51 STACK SEGHEUT AT 30H<br />

0000 (128 ???? I 52 DW 128 DUPf?)<br />

0100 53 TOS LABEl WORD<br />

54 STACK ENOS<br />

55<br />

56 ;------------------­------------------------­<br />

57 ; RON BIOS DATA AREAS<br />

58 j ---­--­-­---­------------------------------­<br />

0040 59 DATA SEGHENT AT 40H<br />

0000 (4 ????) 60 RS232_BASE OW 4 DUPf?) ; ADDRESSES OF RS232 ADAPTERS<br />

0008 (4 !???) 61 PRWTER_BASE DW 4 DUP(? I ; ADDRESSES OF PRINTERS<br />

0010 ???? 62 EQUIPJLAG DW ; nlSTALLED HARDWARE<br />

0012 ?? 63 MFG_TST DB ; INITIALIZATION FLAG<br />

0013 ???? 64 MEMeRY.SIZE DW ; MEMORY SIZE IN K BYTES<br />

0015 ???? 65 IO.RAM_SIZE DW ; MEMORY IN I/O CHANNEL<br />

0017 ?? 69 KBJLAG DB<br />

66 ; - -­------­---------------------------------­<br />

67 ; KEYBOARD DATA AREAS<br />

68 ; ---------­-­ - -.----------------------------­<br />

70<br />

71 ;-----. SHIFT flAG EQUATES WITHIN KB_FlAG<br />

72<br />

0080 73 INS_STATE EQU 80K ; INSERT STATE IS ACTIVE<br />

0040 7. CAPS_STATE EQU 40H j CAPS LOCK STATE HAS BEEN TOGGLED<br />

0020 75 HUJ'CSTATE EQU 20K j HUM LOCK STATE HAS BEEN TOGGLED<br />

0010 76 SCROLL_STATE EQU 10H ; SCROll LOCK STATE HAS BEEN TOGGLED<br />

0008 77 All_SHIFT EQU 08H i ALTERNATE SHIfT KEY DEPRESSED<br />

A-2


LaC OBJ LINE SOURCE<br />

0004<br />

0002:<br />

0001<br />

0018 11<br />

0080<br />

0040<br />

OOZO<br />

0010<br />

0008<br />

0019 ?? <br />

OOlA ???? <br />

ODIC ???? <br />

ODIE (16 ???'?) <br />

003E<br />

0045<br />

0046<br />

0038<br />

0010<br />

003A<br />

002A<br />

0036<br />

0052<br />

0053<br />

003E ??<br />

0080<br />

003f ??<br />

0040 ??<br />

0025<br />

0041 ??<br />

0080<br />

0040<br />

0020<br />

0010<br />

0009<br />

0008<br />

0004<br />

0003<br />

0002<br />

0001<br />

0042 (7 ?? J<br />

78 eTL_SHIFT EOU 04H ; CONTROL SHIFT KEY DEPRESSED <br />

79 lEfT_SHIFT EOU 02H ; lEFT SHIFT KEY DEPRESSED <br />

80 RIGHT_SHIFT EOU O1H ; RIGHT SHIFT KEY DEPRESSED <br />

81 <br />

82 DB ; SECOND BYTE OF KEYBOARD STATUS <br />

83 <br />

INS_SHIFT 84 EOU 80H ; INSERT KEY IS DEPRESSED <br />

85 CAPS_SHIFT EOU 40H ; CAPS LOCK KEY IS DEPRESSED <br />

8. HUH_SHIFT EOU 20H ; NUN LOCK KEY IS DEPRESSED <br />

87 SCROLL_SHIFT EOU IOH SCROLL LOCK KEY IS DEPRESSEO <br />

88 HOLD_STATE EOU 08H SUSPEND KEY HAS BEEN TOGGLED <br />

89 <br />

90 ALT_INPUT DB STORAGE fOR ALTERNATE KEYPAD ENTRY <br />

91 BUFFER_HEAD OW POINTER TO HEAD Of KEYBOARD BUFFER <br />

.2 BUFFER_TAIL OW POINTER TO TAIL OF KEYBOARD BUFFER <br />

93 KB_BUFFER OW 16 Dupe? I j ROOM FOR 15 ENTRIES <br />

94 KB_BUFFER_EHO LABEL WORD <br />

.5<br />

96 j------ HEAD = TAIL INDICATES THAT THE BUFFER IS EMPTY<br />

.7<br />

••<br />

••<br />

98 NUMJEY EOU SCAN CODE FOR NUMBER LOCK<br />

SCROLL_KEY EOU 70 SCROLL LOCK KEY<br />

100 ALTJEY EOU 5. ALTERNATE SHIFT KEY SCAN COOE<br />

101 CTL_KEY EOU 2. SCAN CODE FOR CONTROL KEY<br />

102 CAPS_KEY EOU 58 SCAN CODE FOR SHIFT LOCK<br />

103 LEFT_KEY EOU 42 SCAN CODE FOR LEFT SHIFT<br />

104 RIGHTJEY EOU 54 SCAN COOE FOR RIGHT SHIFT<br />

105 INS_KEY EOU 82 SCAN CODE FOR UlSERT KEY<br />

10. DEL_KEY EOU 83 SCAN CODE FOR DELETE KEY<br />

107<br />

108 j -------------------------------------------­<br />

109 j DISKETTE DATA AREAS<br />

110 j -------------------------------------------­<br />

111 DB ; DRIVE RECALIBRATION STATUS<br />

112 BIT 3-0 = DRIVE 3-0 NEEDS RECAL BEFORE<br />

113 NEXT SEEK IF BIT IS = 0<br />

114 INTJLAG EOU oaOH ; INTERRUPT OCCURRt:NCE FLAG<br />

115 MOTOR_STATUS DB ; MOTOR STATUS<br />

11. BIT 3-0 = DRIVE 3-0 IS CURRENTLY R\..INI'IIHG<br />

117 I BIT 7 = CURRENT OPERATION IS A WRITE. REQUIRES DEU.Y<br />

118 ttOTOR_COUNT DB ; TIME OUT COUNTER fOR DRIVE TURN OFF<br />

MOTOR_WAIT EQU 37 ; TWO SECONDS OF COUNTS FOR I1OTOR TURN OFF <br />

"' 120 <br />

121<br />

122 DISKETTE_STATUS DB j SINGLE BYTE OF RETURN CooE INFO FOR STATUS<br />

123 TIME_OUT EQU 80H ; ATTACHMENl rAILED TO RESPOND<br />

124 BAD_SEEK EQU 40H ; SEEK OPERATION FAILED<br />

125 BAD_NEC EQU 20H ; NEe CONTROLLER HAS FAILED<br />

12' BAD_CRC EQU IOH j BAD CRC ON DISKETTE READ<br />

127 DMA_BOUNDARY EqU 09H ; ATTEMPT TO DMA ACROSS 64K BOUNDARY<br />

128 BAD_DMA EQU 08H ; DMA OVERRUN ON OPERATION<br />

12' RECORD_NOTJND EQU 04H I REQUESTED SECTOR NOT FOUND<br />

130 WRITE_PROTECT EQU OJH I WRITE ATTEMPTED ON WRITE PROT DISK<br />

131 BAO ADDR_HARK EQU 02H ADDRESS MARK HOT FOUND<br />

132 BAD_CHO EQU O1H BAD COMNAND PASSED TO DISKETTE I/O<br />

133<br />

134 DB 7 DUP(?) ; STATUS BYTES FROM NEC<br />

135<br />

0049 ??<br />

004A ????<br />

004C ????<br />

004E ????<br />

~ 0050 (8 ????I<br />

0060 ????<br />

0062 ??<br />

0063 ?1?1<br />

0065 ??<br />

0066 ??<br />

0067 '????<br />

0069 ????<br />

136 j -------------------------------------------­<br />

137 ; VIDEO DISPLAY DATA AREA<br />

138 ; -------------------------------------------­<br />

139 CRT_MODE DB ; CURRENT CRT HOOE<br />

140 CRT_COLS OW ; HUMBER OF COLUMNS ON SCREEN<br />

141 CRT_LEN ow j LENGTH OF REGEN IN BYTES<br />

142 CRT_START OW STARTING ADDRESS IN REGEN BUFFER<br />

143 CURSOR_POSN ow 8 DUP{?) ; CURSOR FOR EACH OF UP TO a PAGES<br />

144 CURSOR MODE OW CURRENT CURSOR MODE SETTING<br />

145 ACTIVE_PAGE DB CURRENT PAGE BEING DISPLAYED<br />

14. ADDR_684S OW BASE ADDRESS FOR ACTIVE DISPLAY CARD<br />

147 CRT_MODE SET DB CURRENT SETTING Of 1liE 3X8 REGISTER<br />

14B CRT_PALLETTE DB ; CURRENT PALLETTE SETTING COLOR CARD<br />

14,<br />

150 ; -------------------------------------------­<br />

151 ; CASSETTE DATA AREA<br />

152 j-------------------------------------------­<br />

153 OW ;TIME COUNT AT DATA EDGE<br />

154 ow JCRC REGISTER<br />

A-3


LOC OBJ LINE SOURCE<br />

0068 ?! 155 De ;LAST INPUT VALUE<br />

156<br />

157 1----------------------------________________<br />

158 ; TIMER DATA AR€A<br />

159 -----------------___________________________<br />

Ot6C ?1!'! 160 TlI1ER_LOW<br />

0" j lOW WORD OF TIMER COUHT<br />

006£ ???? 161 TIMER_HIGH ow ; HIGH WORD OF TIMER COUNT<br />

0070 ?! 162 TINER_OFL De ; TIMER HAS ROllED OVER SINCE LAST READ<br />

163 ;COUNTS.SEC lOU 18<br />

16' ,COUNTS.NIH EQU 1092:<br />

165 iCOUtlTS_HOUR lOU 65543<br />

166 ; COUNTS_DA.Y EOU 1513040 = 1800BOH<br />

167<br />

168 i -------------------------________________• __<br />

169 ; SYSTEM DATA AREA<br />

170 ; ---- - ----------_____________________________<br />

0071 ?? 171 BIOS_BREAK DB ; BIT 7 = 1 IF BREAK HY HAS BEEN DEPRESSED<br />

0072 ???? 172 RESET_FLAG OW ; WORD = 1234H IF KEYBOARD RESET UNDERWAY<br />

173 OATA WOS<br />

174<br />

175 ; -----~-':' _:.•.---._____________________________<br />

176 J EXTRA DATA AREA<br />

177 1-------------------------------------------­<br />

'0050 178 XXDATA SEGMENT AT 50H <br />

O~OO 11 179 STATUS_BYTE DB <br />

18. XXOATA ENDS <br />

181 <br />

18Z ; -------------------------------------------­<br />

183 J VIDEO DISPUY BUFFER<br />

184 ; ----------- --- - - - - - - - ----------------------­<br />

8800 18S VIDEO_RAM SEGMENT AT OBaOOH <br />

'0000 186 REGEN LABEL BYTt <br />

0000 187 REGENW LABEL WORD <br />

(1000 (16}84 ??) 188 DB 1638't DUPl?) <br />

189 ENIlS<br />

190 i -----------------------------------------­<br />

191 ; ROM RESIDENT CODE<br />

19' ; ---------------------- ------------------- -­<br />

fOOD 193 CODE SEGMENT AT OFOOOH<br />

0000 (51344 111 19. DB 57344 DUP(?) j FI LL LOWEST 56K<br />

, 195<br />

:EOOO 35373030303531 196 08 '5700051 CDPR. <strong>IBM</strong> <strong>1981</strong>' I COPYRIGHT NOTICE<br />

20434F50522E20<br />

49424020313938<br />

31 <br />

197 <br />

198 ; -------------------------------------------­<br />

199 j INITIAL RELIA8ILITY TESTS -- PHASE 1<br />

200 ; --- - - - - - - --- - ------- -- - - - -- - ---------------­<br />

201 ASSUME CS:COOE,SS:COOE,ES:ABSO,OS:DATA<br />

202 ; -------------------------------------------­<br />

203 DATA DEfINITIONS<br />

2.04 J - - ------------------ -------- ------------- --­<br />

E016 D8EO 205 Cl 0" Cll • RETURN ADDRESS<br />

E016 EDEI '06 C' 0" C"<br />

i PETlmtl ADDRESS FOR DUMMY STACK<br />

207 ; ----------------------- ---------------- - ---­<br />

lOS<br />

209 OF STORGAGE. <br />

THIS SUBROUTINE PERFORMS A READ/WRITE STOOAGE TEST ON A 16K 8LOCK <br />

210 ;ENTRY REQUIREMEtHS: <br />

211 ES = ADDPESS OF STORAGE SEGt!EHT eEING TESTED <br />

21Z<br />

Z13<br />

OS = ADDRESS OF STORAGE SEGMENT BEING TESTED <br />

\oIHEH EHlERltIG AT STGTST_CHT. CX MUST BE LOADED WITH THE BYTE COUNT. <br />

Z14 .EXIT PARAtlETERS: <br />

ZIS ZERO HAG =


LOC OBJ LINE SOURCE<br />

E02.4.<br />

"9<br />

C3: i STG01<br />

E02;,4, 4F 23. DEC 01 I POnH TO LAST BYTE JUST WR ITTEN<br />

E026 FO 231 STO ;SET OIR fLAG TO GO- tACKl~flROS<br />

EOZC BBF7 23' C4: MOV SI,OI<br />

E02E 88tB 233 MOV CX,BX ; SETUP BYTE CHT<br />

,,,<br />

f030 At 23. C5: LODSB ;READ CHAR FROH STORAGE<br />

E031 32C4 XO. Al,AH JDATA READ As ExPECTED?<br />

E033 75Z5 23. JNE C7 ; NO - GO TO ERROR ROUTINE<br />

E035 £462 237 IN AL,PORT_C JDIO A. PARITY ERROR OCCUR?<br />

E037 24CO<br />

AL,OCOH<br />

E039 BODO "9<br />

MOV AL,O jAL=O DHA COMPARE OK<br />

e038 751D 24. JNZ C7 <br />

f03D 80FCOO '41 eMP AH,O iREADING ZERO PATTERN? <br />

"B ..,<br />

,4'<br />

C'<br />

E040 7403 JE iCONTINUE READING TILL END <br />

E042 BACZ '43 MOV Al,Dl ,GET NEXT DATA PATTERN TO WRITE <br />

E044 AA 244 STOSB iWRITE IN BYTE LOC WE JUST READ <br />

£045 24S C6: j WRITE_HO_MORE <br />

'4'<br />

£047 80FCOO '47 CMP AH.O ,ZERO PATTERN WRITTEN TO ~T6<br />

[045 £2£9 LOOP C5 ,CONTINUE TILL 16K/4K BLOCK TESTED <br />

£04,4, 740£ 248 JE C7 ;. YES - RETURN TO CALLER<br />

E04t: BAED 24, MaY AH.AL ;SETUP TO NEW YALUE TO COMPARE<br />

E04E 86FZ 25. XCIiG OH.OL .HOYE ZERO DATA PATIERN TO OL<br />

E050 Fe 251 CLO ; SET OIR FLAG TO GO FORWARD<br />

E051 47 252 WC 01 ; SET POINTER TO BEG LOCAnON<br />

E052. 7408 253 JZ C4 jREAD/URITE FORWARD IN STG<br />

E054 4F 2S4 OEC 01<br />

E055 8AOI00 255 MOV DX,l ;SETUP 01 AND ao PATIERNS<br />

E058 EBDO 25' JMP SIiORT C3 ;READ/WRITE BACKWARD IN STG<br />

E05A 257 C7:<br />

E05.4. C3 258 RET<br />

259 STGTST ENDP<br />

260 ;----------------- --------------------------­<br />

261 ,TEST .01<br />

262 80B8 PROCESSOR TEST<br />

263 ,DESCRIPTION<br />

264 VERIFY 8088 FLAGS, REGISTERS AND CONDITIONAL JUHPS<br />

265<br />

E.58 266 RESET LABEL NEAR<br />

Eosa FA 267 START: CLI ;DISABLE INTERRUPTS<br />

Eose 84D5 268 HOV AH.OD5H ;.SET SF, CF, IF, AND AF fLAGS ON<br />

EOSE 9E 269 SAHF<br />

E05f 734£ 270 JNC ERROl ;GO TO ERR ROUTINE IF CF NOT SET<br />

f061 754C 271 JI~Z ERROl ;GO TO ERR RourmE IF ZF HOT SET<br />

f063 784.4. 272 JNP ERROl ; GO TO ERR ROUTH.jE IF PF NOT SET<br />

f065 7946 273 JNS ERROl ;GO TO ERR ROUTINE IF SF NOT SET<br />

27'<br />

f067 9F LAHF ,LOAD F LAG IMAGE TO AH<br />

f068 8105 275 NOV CL.5 ILOAD CNT REG WITH SHIFT CNT<br />

f06A DZEC 27. SHR AH,CL ;SHIFT AF INTO CARRY BIT POS<br />

E06C 7341 277 Jnc ERROl ;GO TO ERR ROUTINE IF AF NOT SET<br />

f06E B040 27. HOV AL,40H .SET THE Of nAG ON<br />

f070 ODED 279 SHL AL, I ;SETUP FOR TESTING<br />

E072 713B 2BO JIIO ERROl ;GO TO ERR ROUTINE IF OF NOT SET<br />

£074 32£4 2Bl XOR AH.AH ,SET AH :: 0<br />

f076 9E 282 SAHF JCLEAR SF. CF, ZF, AND PF<br />

E077 7236 2.3 JC ERPOI .GO TO ERR ROUTINE IF CF ON<br />

E079 7434 2B4 JZ ERIlO 1 lGO TO ERR ROUTINE IF ZF ON<br />

EOlB 7832 285 JS ERROl ;GO TO ERR ROUTINE IF SF ON<br />

E070 7A30 2•• JP ERROl ;.60 TO ERR ROUTINE IF PF ON<br />

Ea7F 9F 287 LAHF ,LOAD FLAG IHAGE TO /lH<br />

E080 BIOS 288 HOV CL.S ; LOAD CNT REG WITH SHIFT CNT<br />

e082 02EC 289 SHR AH.CL ; SHIFT t.F' INTO CARRY BIT POS<br />

£064 7229 290 JC ERRO 1 ; GO TO ERR ROUTINE IF ON<br />

£086 00£4 291 SHL AH,! ;CHECK THAT OF' IS CLEAR<br />

E066 7025 292 JO ERROl ;GO TO ERR ROUTINE IF ON<br />

293<br />

294 READ/WRITE THE 8088 GENERAL AND SEGMENTATION REGISTERS<br />

29S<br />

".<br />

W.ITH AlL ONE'S AND ZEROES'S.<br />

EDBA B8FFFF 297 HOY AX.OFFFFH ;SETUP ONE'S PATTERN IN AX<br />

E080 f9 298 STC<br />

E08E 8E08 29. CB: HOY OS,AX ;WRITE PATTERN TO ALL REGS<br />

3.,<br />

£090 8C08 30. NOV BX,DS<br />

Eon 8EC3 HOY ES.BX<br />

E094 6CCl 3.2 MOV CX,ES<br />

E096 8EOl 303 MOV SS,CX<br />

E098 6C02 304 MOY OX.SS<br />

£09,4, BSE2 3.5 NOV SP,DX<br />

E09C 86Et 3•• MOV BP,SP<br />

A-5


LOC OBJ<br />

LINE<br />

SOURCE<br />

E09E BBf5<br />

EOAO BBFE<br />

EOA2 7307<br />

EOM 33C7<br />

[DAb 7507<br />

EOA8 Fa<br />

EOA9 730<br />

EDAB<br />

EDAB DBC7<br />

EOAD 740 I<br />

EOAF F4<br />

EOBO<br />

ECBD BODO<br />

EOB2 E6AO<br />

EOB4 E683<br />

EDBb 6099<br />

E068 E663<br />

EOBA BOFe<br />

ECSt E661<br />

EDbE 2ACO<br />

EoeD BA0803<br />

Eon EE<br />

EOC4 FEeD<br />

EOC6 5/..6803<br />

Eoe9 EE<br />

EOCA BBOOFD<br />

EOCD 6EOO<br />

EOCF 8600EO<br />

ED02 8C16EO<br />

EODS E93301<br />

E008 7505<br />

EOoA 8004<br />

EOoC E608<br />

EODE 6054<br />

fOEO E643<br />

EOE2 2BC9<br />

EOE4 SAD9<br />

EOE6 8ACl<br />

EOE8 E641<br />

EDEA<br />

EOEA 8040<br />

EOEC E643<br />

EOEE<br />

E441<br />

EOFO OAD8<br />

EOF2 60fBFF<br />

EDFS 7404<br />

EOF7 ElF1<br />

EOF9 EBB4<br />

EOFB<br />

EoFB BAC3<br />

EOFO 28e9<br />

EOFF E641<br />

EI01<br />

E101 8040<br />

EI03 E643<br />

nos E441<br />

EI07 2208<br />

EI09 7404<br />

EIOB E2F4<br />

A-6<br />

"7<br />

"8<br />

30.<br />

310<br />

311<br />

3"<br />

313<br />

3" (9:<br />

315<br />

316<br />

317 ERROl:<br />

318 ; - - - - -­ - -------------------------------------<br />

319 ;TEST.02<br />

HOY <br />

MOV <br />

JNC <br />

XQR <br />

JNZ<br />

eLe<br />

J~~C<br />

OR<br />

JZ<br />

HLT<br />

SI,BP<br />

OI.SI<br />

C9<br />

AX ,01<br />

EPROI<br />

C8<br />

AX.DI<br />

CI0<br />

320 ROS CHECKSUM TEST I<br />

3~1 jOESCRIPTIOtl<br />

--------------------------------<br />

I TSTIA<br />

;PATTER~~<br />

MAKE IT THRU ALL REGS<br />

;NO - GO TO ERR ROUTINE<br />

; TSTlA<br />

;ZERO PATTERN MAKE IT THRU?<br />

;YES - GO TO tlEXT TEST<br />

;HALT SYSTEM<br />

322 A CHECKSUM IS OCNE FOR THE 8K ROS NODULE CQlHAI!HNG POD AND BIOS.<br />

323 ; -----------­<br />

324 CIO:<br />

325 HOV<br />

326 OUT<br />

327 OUT<br />

"8<br />

".<br />

HOV<br />

OUT<br />

3" tlOV<br />

331 OUT<br />

332 SUB<br />

333 HOV<br />

334 OUT<br />

335 mc<br />

336 f18V<br />

337 CUT<br />

338 flOV<br />

33. MOV<br />

340 MOV<br />

341 MOV<br />

342 JI1P<br />

343 Cll; JI ~ E<br />

Al,O<br />

OAOII,AL<br />

83H.Al<br />

Al.99H<br />

CND_PORT ,AL<br />

Al,orCH <br />

popr_B.AL <br />

AL,AL<br />

DX,3DeH <br />

OX,AL <br />

" ox, '368"<br />

OX,Al<br />

AX,COOE<br />

55,AX<br />

ElX,OEOOOH<br />

SP,OFFSET Cl<br />

ROS_CHECKSUM <br />

ERROL <br />

34"+ • - - - ----- - - ---------------------------------­<br />

3(6 iTESr.03<br />

346 8237 ONA INITIALIZATION CHM1NEL R[GISTE.R TEST<br />

347 iDESCRIPTIOH<br />

lDISABlE HMI INTERRUPTS<br />

; INITIALZE DMA PAGE REG<br />

iSET 8255 A,C-INPUT,B-OUTPUT<br />

;WRITE 8255 CMD/MOOE PEG<br />

iOISABlE PARITY CI-IECKEPS ANO<br />

; GATE S!


LaC OBJ LINE SOURCE<br />

E100 EBAO 38. JNP SHORT ERROl<br />

386<br />

387 INITIALIZE TINER 1 TO REFRESH MEMORY<br />

388<br />

EIOF 38. C15: ; WRAP_OMA_REG<br />

flOF 8054 3.0 MOV Al.54H ;SEl TIM I. LSB. MODE 2<br />

Ell1 E643 391 OUT TIMER+3.AL ;WRITE TIMER MODE REG<br />

E113 B012 392 MOV AL.IS ;SETUP DIVISOR FOR REFRESH<br />

EllS E641 393 OUT TIMER+l.Al iL-:RITE TIMER 1 CNT REG<br />

E1l7 E600 394 OUT OMA+ODH,Al iSH/O MASTER CLEAR TO DMA<br />

395<br />

396 WRAP oMA CHANNELS ADDRESS AND COUNT REGISTERS<br />

397<br />

E119 BOFF 3.8 MOV AL,OFFH ;WRITE PATTERN FFH TO ALL REGS<br />

EllB 8A08 39. C16: MOV BL,AL ;SAVE PATTERN FOR COMPARE<br />

EllD 8AF8 400 MOV BH,AL<br />

EllF 890800 401 MOV CX,B ;SETUP LOOP CNT<br />

E122 BAOOOO 402 MOV OX,DMA ; SETUP I/O PORT AD DR OF REG<br />

E125 EE 403 t17: O'JT DX,Al IWRITE PATTERN TO REG, LSB<br />

E126 EE 404 OUT OX,AL ;t1SB OF 16 BIT REG<br />

E127 B80101 405 110V AX,OIOIH ;AX TO ANOTHER PAT BEFORE RO<br />

E12A EC 406<br />

'"<br />

AL,oX<br />

;READ 16-BIT DMA eH REG, LSB<br />

E128 8AEO 407 tIDY AH,AL ;SAYE lSB OF 16~BIT REG<br />

E120 EC 408 IN AL,oX ;READ MSB OF DMA CH REG<br />

f12E 3808 40. CtlP 8X,AX ;PATTERN READ AS WRITTEN?<br />

EnD 7403 410 J' C18 ; YES - CHECK NEXT REG<br />

E 132 E97AFF 411 JMP ERROl ;NO - HALT THE SYSTEM<br />

E135 41. C18: I NXT_DI1A_CH<br />

E135 42 413 INC OX ;SET I/O PORT TO NEXT CH REG<br />

E136 ElED 414 LOOP CI7 iWRITE PATTERN TO NEXT REG<br />

E136 F6DO 41. NOT AL iSET PATTERN TO ZERO<br />

E13A 74DF 416 JZ C16 ;WRITE TO CHANNEL REGS<br />

417<br />

418 INITIALIZE AND START DMA FOR MEMORY REFRESH.<br />

419<br />

EBe BOFF 420 MOV At,OFFH ; SET CNT OF 64K FOR RAM REFRESH<br />

E13E E601 421 OUT DMA+l,Al<br />

E140 E601 422 OUT QMA+l,Al<br />

El42 B058 423 tlOV Al,058H ,SET OMA MODE.CH O,READ,AUOTIHT<br />

E144 E608 424 OUT DHA+OBH,AL ,WRITE oMA MODE REG<br />

E146 8000 425 MOV Al,O ; ENABLE OMA CONTROLLER<br />

E148 E606 426 OUT OMA+8,Al ; SETUP OMA COMMAND REG<br />

E14A E60A 427 OUT DMA+I0 ,At ;ENABLE CHANNEL 0 FOR REFRESH<br />

E14C B041 42. MOV AL,41H ,SET MODE FOR CHANNEL 1<br />

E14E E608 4•• OUT OMA+OBH,AL<br />

E150 8042 43D MOV AL,42H ;SET MODE FOR CHANNEL 2<br />

E152 E608 431 OUT DMA+OBH,AL<br />

E154 8043 432 MOV AL,43H ;SET MODE FOR CHANNEl 3<br />

E156 E608 433 OUT OMA+OBH .AL<br />

434 ;-------------------------------------------­<br />

435 ;TESr.04<br />

436 BASE 16K REAO/WRITE STORAGE TEST<br />

437<br />

438 ;DESCRIPTION<br />

439 WRITE/REAOIVERIFY DATA PATTERNS FF,55.AA.Ol, ANO 00 TO 1ST 16K OF<br />

440 STORAGE. VERIFY STORAGE AOORESSABIllTY.<br />

441 INITIALIZE THE 8259 INTERRUPT CONTROllER CHIP FOR CHECKING<br />

442 MANUFACTURING TEST 2 MODE.<br />

443 ; ----­---------------­---­-----------­- --­--­<br />

444 DETERMINE MENORY SIZE AND FILL MEMORY Wlrn DATA<br />

445<br />

E158 884000 446 MOV AX,OATA jPOINT OS TO DATA SEG<br />

E158 8E08 447 MOV OS,AX I<br />

EISC 681E7200 448 HOV BX,RESETJLAG ;SAVE RESET_FLAG' IN ax<br />

E161 28CO 449 SUB AX,AX ;SET ES MID OS TO 0<br />

E163 8EtO 450 NOV ES,AX ; SETUP ES SEGMENT REG<br />

f165 6E08 451 MOV oS,AX<br />

El67 2BFF 452 SUB 01,01<br />

E169 E460 453 IN Al.PORT_A IDETERMINE BASE RAM SIZE<br />

E168 240C 454 AHO AL,OCH jISQlATE RAM SIZE SWS<br />

E160 0404 455 ADO AL, 4 I CALCULATE MEMORY SIZE<br />

E16F BlOC 456 MOV CL, 12<br />

E171 03EO 457 SHL AX, CL<br />

EI73 88C8 458 MOV CX, AX<br />

E175 8AEO 45. MOV AH. AL<br />

fI77 Fe 460 CLD ISET DIR FLAG TO INCR<br />

E178 AA 461 C19: STOSB ;FIlL BASE RAM WITH DATA<br />

A-7


lOC OBJ LINE SOURCE<br />

£179 E2FD 462 LOOP C19 ; LOOP TIL All ZERO<br />

463<br />

464 DETERMINE 10 CHANNEl RAM SIZE<br />

465<br />

fI78 £462 466 IN Al,PORT_C<br />

E170 240F '67 AND Al,orH<br />

E17F 7418 'b. JZ CZl<br />

f161 BA0010 4., MOV DX.loaOH SEGMENT FOR 110 RAM<br />

£184 8AEO 47. MOV AH,Al<br />

El86 BODO .71 MOV AL.O<br />

ElB8 '7> C20: FIll_IO:<br />

ElM 8etZ 473 HOY ES.DX<br />

EISA 890080 .7• ttov CX.800OH ; FIll 3ZK BYTES<br />

El80 2:BFF • 75 SUB 01.01<br />

£18F f3 47b REP SIOSB<br />

£190 AA<br />

fl'9l 81C20008 477 ADD DX,800H i NEXT SEGMENT VALUE<br />

El'95 FEee '7. DEC AH<br />

£197 75EF .79 JtlZ C2 • ; FIll_IO<br />

•••<br />

; -------------------------------------------­<br />

INITIALIZE THE 8259 INTERRUPT CONTROLLER CHIP<br />

'8'<br />

.82 ; -------------------------------------------­<br />

El'99 483 C21:<br />

El'99 8013 .8. MOV Al.13H iICWl - EDGE, SHGL. ICW4<br />

El'9B £62:0 485 OUT INTAOD ,Al<br />

El'90 B008 48b MOV AL.8 iSETUP lewz - INT TYPE 8 IS-F J<br />

El9F £621 .87 OUT INTAOl,A1.<br />

ELl! 8009 MOV AL.'9 .SETUP ICW4 - 8UFFRO,8086 l100E<br />

..,"<br />

ElA3 E621 .8. OUT HITAOI,AL<br />

EIA5 2BeO '.0 SUB AX,AX ,POINT OS AND ES TO BEGIN<br />

ElA7 8ECO 49. MOV ES,AX ; OF R/w STORAGE<br />

ElA9 BE4000 .92 HOV SI,DATA ;PQIHT as TO DATA SEG<br />

ElAc SEDE '93 MOV DS,SI<br />

EIAE 891E7,ZOO<br />

.,.<br />

HDV RESET_FLAG,BX ,RESTORE RESETJUG<br />

E182 813E72003412 '.5 CMP RESET_FUG,l234H .RESETJLAG SET?<br />

El88 7438 JE C25 ins - SKIP STG TEST<br />

•••<br />

ElBA 8E08 497 MOV OS,AX i FOltIT as TO 1ST 16K OF STG<br />

..8 i-------------------------------------------­<br />

4"<br />

CHECK FOR MAHUFACTUIUNG TEST 2 TO LOAD TEST PROGRAMS FROM KEYBOARD.<br />

soo ;-------------------------------------------­<br />

EISC BCF03F 501 MOV SP, lFFOH , ESTABLISH TEMPORARY STACK<br />

EI8F 8EDO 502 MOV S5, AX<br />

EICI 8BFe 50' NOV 01, AX<br />

EIC3 882400 5•• MOV 6X, 24H<br />

EIC6 C707B6E2 5.5 MOV WORD PTR tBX),OFFSET 011 ISET UP KB INTERRUPT<br />

EICA 43 50b INC BX<br />

ElCB 43 S07 INC BX<br />

Elce 8COF SOS MOV (BXJ,CS<br />

ElCE E88704 50. CAU KBD_RESET ; READ IN KB RESET CODE TO Bt<br />

EIDI 80FB65 ..0 CftP Bl,065H ; IS THIS MANUFACTURING TEST 2?<br />

EI04 750E 511 JNZ C23 ; JUMP IF NOT MAN. TEST<br />

EI06 B2FF ..2 MOV Dl,255 ; READ IN TEST PROGRAM<br />

Et06 E86A04 513 e22 : CAll SP _TEST<br />

EIOB 8AC3 514 MOV At.BL<br />

ElDD AA 515 STose<br />

ElOE FECA 51b DEC OL<br />

ElEO 75F6 5.7 JNZ C22 i JUMP IF NOT DONE YET<br />

EIE2 CD3E 5." ItIT 3EH ;SET INTERUPT TYPE 62 ADDRESS F8H<br />

EIE4 5.' e23: jCONTItlUE IN NORMAL t100E<br />

EIE4 DE 520 PUSH CS ; PUT SS B'.CK<br />

ElE5 17 521 POP 55<br />

ElE6 FA<br />

5"<br />

CLI<br />

E1E7 BC18EO 523 ~10V SP,OFFSET C2 ;SETUP REltrRN ADDRESS<br />

ElEA EnDFE JHP STGTST IGO TO RDIWRT STG SUBROUTINE<br />

EIED 7403 '" 525 C24: JE C25 .GO TO NEXT TEST IF OK<br />

EIEF E9BDFE 52' <br />

527 <br />

JMP ERROl<br />

5Z8<br />

SHUP STACK SEt AtID S1' <br />

52~<br />

EIF2 530 C25:<br />

E1F2 B83000 531 MOV AX.STA.CK ; GET STACK VALUE<br />

E1F5 8EDO 532 MOV SS,AX ; SET THE STACk UP<br />

EIF7 BCOOOI 533 ttoV SP ,OFFSET TOS ; STACK IS READY TO GO<br />

534<br />

535 SETUP THE HHI INTERRUPT VECTOR POINTER<br />

53.<br />

A-8


LOC OBJ LINE SOURCE<br />

~<br />

EIFA 26C7060800C3EZ R 537 MOV ES:NMI_PTR,OFFSET NI1I_INT<br />

E201 ZilC706QAQOOOfO A 538 MOV ES:Ht1I_PTRtZ .COOE<br />

E208 E920400 539 JMP T5T6 1GO TO NEXT TEST<br />

54.<br />

f208 S41 ROS_CHECKSUM PROC HEAR J NEXT_ROS_MODULE<br />

f2:0B 8900:1:0 542 tl0Y CX.8192 ;NUtI8ER- Of BYTES TO ADD<br />

f20E 32C;0 5" XCR Al,Al <br />

E210 544 C26: <br />

1;210 2E0207 545 ADO Al,cs:IBXl<br />

un 43 546 INC. BX ; POINT TO NEXT BYTE<br />

1:214 ElF. 547 lOOP C26 IADO ALL BYTES IN ROS t10DULE<br />

E216 OACO 548 OR AL,AL 150M = 07<br />

£2.18 C3 549 RET<br />

55. ROS_CHECKSUM E~mp<br />

551 ; --------.--.-------------------------­<br />

552 I INITIAL RELIABILITY TEST -- PHASE 2<br />

553 1---------------------------------------­<br />

554 ASSUME CS:COOE,ES:ABSO<br />

555<br />

E219 504152,4954$920 556 01 OB 'PARITY CHECK 2' <br />

43484543482032 <br />

OOOE 55.7 OIL EQU $-01 <br />

E227 50415249545920 55. D2 08 'PARITY CHECK l' <br />

43484S43482031,/ <br />

DaDE 55. on 'QU $-02 <br />

£235 568 T5T6: <br />

StoO ;-------------------------------------------­<br />

561 ; TEST. 06<br />

562 8259 INTERRUPT CONTROLLER TEST<br />

563 IDESCRIPTION<br />

564 • READl'WRITE THE INTERRUPT MASK REGISTER (UIU WITH ALL ONES AHO ZEROES.<br />

565 ENABLE SYSTEM INTERRUPTS. MASt< DEVICE INTER.RUPTS OFF. CHECK FOR<br />

566 HOT INTERRUPTS (UNEXPECTED).<br />

567 ; - -----____________________________----.----­<br />

E235 Z8tO 569 SUB AX,AX ; SET UP ES REG <br />

E237 BEtD 57' MOV E5,AX <br />

571 <br />

572 i--~--- SET UP THE INTERRUPT 5 POINTER TO A OUNNY<br />

573<br />

E239 26C706140054FF R 574 MOV ES-:INT5_PTR,OFFSET PRINT_SCREEN ;PRINT SCREEN<br />

E240 26C70"6160000FO R 575 MOV ES: It'fT5_PTR+2,CODE<br />

576<br />

577 TEST THE IMR REGISTER<br />

578<br />

E247 fA 579 eLI IOIABLE INTERRUPTS<br />

5.,<br />

E248 BODO 58. MOV AL,O ; SET II1R TO ZERO<br />

E24A E62.l OUT INTA01.AL<br />

E24C E421 582 IN AL,IUTAOI IREAO IMR<br />

E24E OACO 5.3 OR Al.AL ;INR :::: 07<br />

E250 7528 5.' JIll 06 ;GO TO ERR ROUTINE IF HOT 0<br />

E252 BOFF 585 MOV AL,OFFH iDISABLE DEVICE INTERRUPTS<br />

E254 E621 ..6 OUT INTA01,AL iWRITE TO IMR:<br />

E256 £421 5.7 HI Al,INTAOl IREAD IMR<br />

E258 0401 5•• AOO AL,! IAlL 1t1R BIT OM?<br />

...<br />

E25A 7521 JHZ 06 iND· - GO TO 'ERR ROUTINE<br />

5'.<br />

591 CHECK FOR HOT INTERRUPTS<br />

592<br />

E'25C Fe 593 ClO ISET DIR flAG TO GO FORWARD<br />

E250 890800. 594 MOV CX.8 ; SETUP TEMP INT RTNE IN PRT TBL<br />

E260 8F2000 595 MOV DI,OFfSET INT_PTR ;GET ADDRESS OF INT PROC TABLE<br />

E263 596 03; ; VECTBLO:<br />

E261 8886£2: 597 NOV AX,OFFSET 011 ; HOVE ADDR Of INTR PROC TO TSl<br />

...<br />

£266 AS STOSW<br />

E267 8800"0 59. MOV AX,CODE IGET ADDR OF INTR PROC SEG<br />

ElU AB 6'0 STOSW<br />

H6B 83C]04 6.1 AOO BX.4 ;SET BX TO POINT TO NEXT VAL<br />

r"'\ f26E E2J1'3 6.. lOOP 03 ; VECTBLO<br />

603<br />

6.. INTERRUPTS ARe: MASKED OfF. CHECK THAT NO INTERRUPTS OCCUR.<br />

60S<br />

E270 32E4 6.6 XOR AH,AH ICLUR AH REG.<br />

E272 Fe 6.7 srr ; ENABL'E EXTERNAL INTERRUPTS<br />

E273 28C9 608 SUB eX,ex INAlT 1 SEC FOR ANY INTRS THAT<br />

E275 HFE 6.' 0'" LOOP 04 iHIGHl OCCUR<br />

£277 E2fE 61. DS: LOOP 05<br />

E279 04E4 611 OR AK.AH IDID ANY' IlfTERRUPTS OCCUR?<br />

A-9


LOC OBJ LINE SOURCE<br />

E278 7408 612 JZ 07 i NO ~ GO TO NEXT TEST<br />

E270 BACIOl '13 06: tlDV OX,lOIH ;BEEP SPEAKER IF ERROR<br />

E280 £6ADO]<br />

61' CALL ERR_BEEP .GO TO BEEP SUBROUTINE<br />

£283 FA 615 eLI<br />

E284 F4 .16 HLT ;HALT THE SYSTEM<br />

617 ; -------------------------------------------­<br />

618 ; TEST • 7<br />

61' 8253 TIMER CHECKOUT<br />

62. .DESCRIPTION<br />

621 VERIFY THAT THE SYSTEM TIMER (0 J DOESN'T CDum TOO FAST NOR TOO<br />

6Z2<br />

SLOW •<br />

." ,-------------------------------------------­<br />

E285 6•• 07:<br />

E285 8400 625 MOV AH.O ;RESET TIMER I»TR RECYO FLAG<br />

£287 32EO 6.. XDR CH,CH ,CLEAR THE CH REG<br />

£289 BOFE 627 MOV AL,OFEH lttASK ALL INTAS EXCEPT lVl 0<br />

E28B E6Z 1 628 OUT INTAOt.AL jlolRITE THE 6259 IMR<br />

£2:80 BOlO<br />

02' MOV Al,aODiacoae iSH TIM O. LSB, MODE O. BINARY<br />

E28F E643 63. OUT TIM.CTL,Al j~RITE TIMER CONTROL HODE REG<br />

E291 BU6 631 IfOV Cl.l6H j SET PGM LOOP tNT<br />

E293 8ACI 632 MOV AL.CL jSET TIMER 0 CNT REG<br />

E295 E640 633 OUT TIMERO.AL ;1o.'RITE TINER 0 CNT REG<br />

E297 F6C4FF 63. 08: TEST AH.OFFH ;010 TIMER 0 INTERRUPT OCCUR?<br />

E29A 7504 635 Jill O' ; YES - CHECK TIMER OP FOR SLOW TIME<br />

E29C E2F9 "6 LOOP 08 IWAIT FOR INTR FOR SPECIFIED TIME<br />

£29E EBOD 637 JMP 06 j TINER 0 INTR DION T OCCUR - ERR<br />

E2AO 6112 "8 09: HOV CL.18 ISET PGM LOOP CNT<br />

HA2 BOFF 63' MOV AL,OFFH jWRITE TIMER 0 CNT REG<br />

E2A4 E640 6•• OUT TIMEPO.AL<br />

E2A6 B400 641 MOV AH.O JRESET mTR RECEIVED FLAG<br />

E2A8 BOFE 64. HOV AL.OfEH jREENABLE TIMER 0 INTERRUTS<br />

E2AA E621 643 OUT IN7A01.AL<br />

E2AC F6C4FF 6•• 010: TEST AH.OfFH JDID TIMER 0 INTERRUPT OCCUR?<br />

E2AF 75CC "5 JllZ D. ;YES - TIMER CNTING TOO FAST. ERR<br />

E2Bl E2F9 646 LOOP 01. .WAIT FOP. INTR FOR SPECIFIED TIME<br />

£2B3 £93600 647 JMP TST6 ;GO TO NEXT TES r ROUTIU£<br />

6.8 ;-------------------------------------------­<br />

64. TEMPORARY INTERRUPT SERVICE ROurItfE<br />

65. J-------------------------------------------­<br />

••66 651 011 PROC NEAR<br />

E286 8401 .5' H.V "',1<br />

E288 50 653 PUSH AX ;SAVE REG AX CONTENTS<br />

E289 eOFF 654 MOV AL.OFFH jHASK ALL INTERRUPTS OFF<br />

E2BD £621 655 OUT INTA01,AL<br />

f2BD 8020 6.. MOV AL,EOI<br />

E2BF £62:0 657 OUT INTAOQ,Al<br />

E2:Cl 56 658 POP AX ;RESTORE REG AX CONTENTS<br />

£2C2 CF 65. lRET<br />

... 011 ENDP <br />

661 <br />

E2C] 662 NMI_INT PROC NEAR<br />

E2C3 50 ..3 PUSH AX ;SAVE DRIS CONTENTS Of AX<br />

Eleft Elt62: 66' IN AL.PORT_C<br />

E2C6 A640 665 TEST AL.40H ; 10 CH PARITY CHECK?<br />

E2C8 7408 66. Jl 01. I YES - FLAG IS SET TO 0<br />

E2CA BEI9E2: ..7 flOV SI,OFfSET 01 ; ADoR OF ERROR MSG<br />

E2Co B90EOO ..8 HOV CX.olL IMSG LENGTH<br />

E2:00 EBOA 66. JMP SHORT 013 jOISPLAY ERROR "SG<br />

E2:02 67. 012:<br />

E202 A880 671 TEST AL,80H jPLANAR RAM P-CHECK?<br />

EZ04 7410 672 JZ 01' INa - AUX INT<br />

£206 BE27E2 '73 HOV S1.OFFSET 02 ;ADOR OF ERROR MSG<br />

E209 B90EOO '7'<br />

MQV CX.02L iMSG LENGTH<br />

E20C 675 013:<br />

E2DC asoooo 676 MOV AX.O ; INIT Atm SET 110DE FOR VIDEO<br />

E20F COlO 677 INT 10H JCALL VIDEO_IO PROCEDURE<br />

E2El E8E603 678 CALL P_MSG ;PRINT ERROR I1SG<br />

E2E4 FA 6i9 eLI<br />

E2ES F4 6B. HLT ;HALT SYSTEM<br />

E2E6 'SI 014:<br />

E2E6 56 'S2 POP AX i RESlORE ORIG CONTENTS OF AX<br />

E2E7 CF 'S3 IRET<br />

6•• HMI_INT ENDP<br />

A-tO


LOC OBJ LINE SOURCE<br />

685 ; -----­---­--------------­--­--------­<br />

686 ; nUTIAL RELIABILITY TEST -­ PHASE 3<br />

687 ; - ---­---------­----­-----­------­----­<br />

688 ASSUHE CS:COOE,DS:DATA<br />

66.<br />

flE8 20323031 6.0 El DB 201 '<br />

0004 691 ElL EQU $-El<br />

692<br />

693 ESTABLISH BIOS SUBROUTINE CALL INTERRUPT VECTORS<br />

694<br />

f2Ee 695 TST8:<br />

E2Ee Fe 696 eLO jSET OIR FLAG TO CO FORWARD<br />

EZEO BF4000 697 NOV DI,OFFSET VIDEO_INT ; SETUP ADDR TO INTR AREA<br />

EZFO DE 693 PUSH CS<br />

E2Fl IF 699 POP os jS[TUP AD DR OF VECTOR TABLE<br />

ElF2 BE13FF 700 r-:OV SI,OFF13H ; OFFSET YECTOR_TABLE+3Z<br />

E2:F5 892000 701 MOV CX,ZOH<br />

EZF8 F3 702 REP NOVSU iMOYE VECTOR TABLE TO RAM<br />

E2F9 AS<br />

703<br />

704 SETUP TINER 0 TO NODE 3<br />

705<br />

EZFA BOFF 706 MOV AL,OFFH ;DISABLE ALL DEVICE INTERRUPTS<br />

E2Fe E621 707 OUT INTAOt ,AL<br />

E2FE B036 708 MOV AL.36H ;SEl TIM O.LSB,MSB,MODE 3<br />

f300 E643 70. OUT TINER+3,AL ;WRITE TIMER MODE REG<br />

n02 BODO 710 MOV AL,O<br />

E304 E640 711 OUT TINER,AL ;WRITE LSB TO TIMER 0 REG<br />

f306 E640 71. OllT TINER.AL IWRITE MSB TO TIMER 0 REG<br />

713<br />

714 SETUP TItIER 0 TO BLINK LEO IF MANUFACTlJRING TEST MODE<br />

71S<br />

716 ASSUME OS:OATA<br />

f308 884000 717 MOV AX,DATA i POINT OS TO DATA SEG<br />

f30B BED8 716 MOV OS,AX<br />

E30D E87803 719 CALL KBD_RESET iSEND SOFTWARE RESET TO KEYBRO<br />

E3l0 60FBAA 720 eMP BL.OAAH iSCAN CODE AA' RETURNED?<br />

Ell3 7426 721 JE E3 ; YES - CONTINUE {UON MFG MODE I<br />

E3lS BOle 722 MOV AL.3CH ; EN KBO. SET KBD CLK. LINE LOW<br />

E317 E661 723 OUT PORT_B.AL jWRITE 8255 PORT B<br />

E319 90 724 NOP<br />

ellA 90 725 NOP<br />

ElIB E460 726 IN AL,PORT_A iWAS A BIT CLOCKED IN?<br />

ElID 24Ff 727 ANO AL,OFFH<br />

nIt 7516 726 JNZ E. iYES - CONTINUE {HON MFG MODE I<br />

ElZi FE061200 729 INC NFG_ TST i ELSE SET SW FOR MFG TEST MODE<br />

El2S 26C706200082E6 R 730 MOV ES: INT_AODR .OFFSET BLINK_INT ,SETUP TIMER INTR TO BLINK LEO<br />

ElZC 26C7062Z0000FO R 731 MOV ES: INT_AODR+2.. CODE<br />

El33 BOFE 73. MOV AL.OFEH ; ENABLE TINER INTERRUPT<br />

E33S E621 733 OUT INTAOl.AL<br />

E337 73. E2: ; JUMPER_NOT_IN:<br />

E337 Boce 735 MOV AL,OCCH ;RESET THE KEYBOARD<br />

039 E66l 736 OUT PORT_B,AL<br />

737 ; -------­-------­- - - - -­--------------.------­<br />

738 ; TEST. OS<br />

739 ROS CHECKSUM II<br />

740 .DESCRIPTION<br />

741<br />

A CHECKSUM IS DONE FOR THE 4 ROS NODULES CONTAINING BASIC CODE<br />

742.<br />

j -----­_____________________________________ _<br />

El3B 743 E3:<br />

El3S 82.04 744 MOV OL.4 iNO. OF ROS NODULES TO CHECK<br />

E330 B80060 745 MOV BX.6000H j5ETUP STARTWG POS ADDR<br />

E340 746 E4: ; CHECK_ROS:<br />

E340 747 EBC8fE CALL ROS.CHECKSUM<br />

E343 7507 748 JNE E5 jBEEP SPEAKER IF ERROR<br />

E345 FECA 749 DEC OL ,ANY MORE TO DO?<br />

!~ E3477SF7 730 JNZ E4 ; YES - cmnINUE<br />

El49 E80790 7>1 Jt1P E6 ;NO - GO TO NEXT TEST<br />

E34C 752 E5: j ROS_ERROR;<br />

E34C BAOIOl 753 MOV OX.lOIH<br />

E34F f80E02 754 CALL ERR.BEEP ;BEfP SPEAKER<br />

A-ll


lOC OBJ LINE SOURCE<br />

755 ; ---------------- ----------.----------------­<br />

750 ;TEST .08 <br />

757 INITlALIZE AH1) START CRT COUTROLLER (6845) <br />

758 TEST VID EO READ/WRITE STtmAGE. <br />

759 ;OESCIHPTIOU <br />

760 R£SET THE VID.fO EtlABlE SIGNAl~ <br />

7., SELECT ALPHANUMERIC troDt. 40 * 2:5. B & W. <br />

7.' READ/URITE DATA PATT~::flS TO 51G. CHECK SIG -ADDRESSABIlITY. <br />

763 ; ---------------------------------------.---­<br />

E352 764 E6:<br />

E352 f46D 765 AL.PORT_A ;RUO SENSE SWITCHES<br />

El54 8400 '" AH,C<br />

766 HOY<br />

E3S6 A31000 767 HOY EQUIPJUG,AX ;STORE SENSE SW INFO<br />

£359 2430 76a .NO Al.'30H ; ISOLATE VIDEO SWS<br />

Elsa 7503 7•• JHZ E7 I VIDEO SWS SET TO 01<br />

E3S0 £99800 77. JMP fl'<br />

;SKIP VIDEO TESTS FOR BURN-IN<br />

E36D 771 £7: ; TEST.VIDEO:<br />

£360 86£0 772 XCHG AIi.AL<br />

E362 Bort3o 773 C"" Alt,3DH ;B/W CARD ATTACHED'!<br />

£365 7409 774 JE Ea ,YES - SET MODE fOR 8/W CARD<br />

E367 FECO 775 rHe Al lS£T COLOR I'100E FOR COLOR CD<br />

E369 80fC20 77. tHP AH,20H 180X25 MODE SElECTED?<br />

E36C 7502 777 JNE Ea iNQ - SET MODE fOR 40X25<br />

£36£ B003 77a HOY AL.3 jSET MODE FOR eOX25<br />

E370 779 E8: I SET_HODE:<br />

£370 50 7a. PUSH AX ;SAVE VID'EO "'ODE ON STACK<br />

E371 2.1.[4 7a. SUB AH,AH lINITlALIZE TO ALPHANUMERIC I1D<br />

E373 COlO 7a2 IHT '.H ;CALl VIDEO_IO<br />

E375 S8 783 pop AX JRESTORE VIDEO SENSE SWS IN AH<br />

£376 SO 7a_ PUSH AX J RESAVE VALUE<br />

E377 8800BO 7a5 HOV 8X,OSOOOH IBEG VIDEO RAM ADDR BIW CO<br />

E37A BAB803 786 I10V DX.3B8H IMOOE REG fOR B/W<br />

El7a 890010 7a7 HOY CX,4096 iRAtI BYTE CNT FOR 8/W CD<br />

BSO 8001 788 MOV AL,1 ; SET MODE FOR BW CARD<br />

£382 SOFC30 7a. CHP AH .30H lB.IW VlDEO CARD ATTACHED!<br />

£3.55 740B 7•• JE EO I YES - GO TEST VIDEO STG<br />

E3S7 BMOBa 79l HOY BX.OB800H jBEG VIDEO RAM AODR COLOR CD<br />

ElBA BADS03 792 HOY oX,30aH ;NOOE REG FOR COLOR CD<br />

E36D 890040 7.3 HOY CX,4000H ;RAM BYTE tNT FOR COLOR CO<br />

E390 fEce 7•• DEC AL I SET f100E TO 0 FOR COLOR CO<br />

£392 7'5 £9: ; TEST_VIDEO_STG!<br />

E392 EE 79. OUT OX ,At. iQISABLE VIDEO FOR COlOR CD<br />

£393 S£C3 7.7 NOV Es,ax JPOINT ES TO VIDEO RAI'1 STS<br />

£395 884000 R 7.8 MOY AX ,DATA. IPOINT OS TO DATA SEGM'ENT<br />

E39S SEDS 799 HOY DS.. AX<br />

E39A 813E72.oo3412 a •• CHP RESETJLAG,1234H ; POD INITIATED BY KBO RESET!<br />

BAD 7400 8.1 JE flO I1ES - SKIP VIDEO RAM TEST<br />

E3A2 8EDB 802 HOY DS.BX ; POINT OS TO VIO'£O RAM STG<br />

E3A4 Ee76FC a03 CALL STGTST_CN'T ;GO TEST VIDEO R/w STC;<br />

BA7 7406 a04 JE flO ISTG OK - CONTINUE TESTING<br />

flA' BA020} 8.5 HOY OX ,l02H ; SHUP I Of BEEPS<br />

BAC E6810Z 8•• CALL ERR_BEEP ;GO BEEP SPEAKER<br />

807 ;-------------------------------------------­<br />

80a ;TEST.09 <br />

a ••<br />

SETUP VIDEO DATA ON SCREEN FOR VIDEO UNE TEST. <br />

alO<br />

8ll<br />

8l'<br />

;DESCRIPTION <br />

EtlABLE VIDEO SIGNAL AtID SET MODE. <br />

DISPLAY A HORIZONTAL f\AR ON SCREEt{. <br />

al3 i ----------------------------.-------.- - - ---­<br />

E3AF 8l' ElO:<br />

E3AF 58 815 POP AX jGET VIDEO SENSE SWS (AM)<br />

nBO 50 al6 PUSH AX JSAVE IT<br />

UBI 5400 817 HOY AH ,0 ;EIIABLE VIDEO AND SET MODE<br />

E3Bl COlO ala INT lOH j VIDEO<br />

E3B5 SS2070 8"<br />

HOV AX.70Z0H ;W~T BLANKS IN PEVERSE V,IDEO<br />

E3B8 2BfF 8'. SUB DI,Dt ; SETUP STARTING LOC<br />

E38A B9'2600 8ll l10V CX,CiO ;NO. Of" BLANKS TO DISPLAY<br />

E38D Fe 0"<br />

CLO ;SET OIR flAG TO INCREMENT<br />

E3BE F3 821 REP 5T05101 iWRITf VIDEO STORAGE<br />

E3Bf AB<br />

A-12


LOC OBJ LINE SOURCE<br />

~:~~::<br />

82.4 ; -------------------------------------------­<br />

82.5 ;TE5T.10<br />

826 CRT INTERFACE lINES TEST<br />

827 ;DESCRIPTION<br />

62:8 SENSE ON/OFF TRANSITION OF THE VIDEO ENABLE AtIJ HORIZONTAL<br />

829 ; SYNC LINES.<br />

830 1-------------------------------------------­<br />

8"<br />

pop AX ; GET VIDEO SENSE SW INFO<br />

8"<br />

PUSH AX<br />

i5AVE IT<br />

E3C2 80FC30 8ll CHP AH.30H iB/w CARD ATTACHED?<br />

E3C5 BABADl 81. MaV DX.038AH iSETUP AODR OF BW STATUS PORT<br />

nee 7403 815 JE Ell ;YES - GO TEST LINES<br />

f3eA BADA03 81. I10V DX,03DAH jCOLOR CARD IS ATTACHED<br />

1!!3CD 817 Ell: i LIHf_TST:<br />

nco 8408 818 MOV AH.8<br />

EXF 8.. EI2.:<br />

BeF 28C9 8.0 SUB CX,CX<br />

BOI EC 8.1 E13: IH AL,DX ;READ CRT STATUS PORT<br />

8.,<br />

£302 22C4 AND AL,AH ;CHECK VIDEO/ttORZ LINE<br />

8.,<br />

E3D8 [ell 8'5 JMP SHORT 'El7 I GO PRINT ERROR MSG<br />

nOA 28t9 8" El4: SUB CX,CX<br />

flOC EC 8.7 ElS: IN AL,DX ;READ CRT STATUS PORT<br />

ElOO 22:C4 8.8 AND AL,AH ;CHECK VIDEO/HORZ LINE<br />

8" JZ<br />

El'<br />

-£304 7504 8., JNZ EI4 ; ITS ON - CHECK IF IT GOES OfF<br />

ElOtt E2F9 LOOP EU ; LOOP TILL ON OR TIMEOUT<br />

nOF 7404- ; ITS ON - CHECK NEXT LINE<br />

ElEl £2F9 850 LOOP ElS ; LOOP IF OFF TILl: IT GOES ON<br />

E3E] EBO-S 851 JMP SHORT E17<br />

E3£5 8S> E16: I NXT_LINE:<br />

E3ES BI03 851 MOV CL,3 ; GET NEXT BIT TO CHECK<br />

E3E7 D2EC 85. SHO AH.CL<br />

ElE9 75£4 855 JHZ ElO ;GO CHECK HORIZONTAL LINE<br />

ElEB £B06 85. JMP SHORT El8 ;DISPLAY CURSOR ON SCREEN<br />

ElEO 857 E17: ; CRT_ERR:<br />

E3ED BADlOI 85. HOV DX.I02H<br />

£3FO E83D02 85. CALL ERR_BEEP ;GO BEEP SPEAKER<br />

~:~:~ 58 8.1 POP AX IGET VIOEO SENSE SWS UH)<br />

ElF4 8400 MOV AH.O iSET HOOE AND DISPLAY CURSOR<br />

8"<br />

'E3F6 COlO 8.. mT 10H ;CALL VIDEO liD PROCEDURE<br />

8'0 E18: ; DISPLAY_CURSOR:<br />

864 J-------- - ------- ----------- -------- --------­<br />

865 ;TEST. 11<br />

866 ADDITIONAL READ/WRITE STORAGE TEST<br />

867 ;DESCRIPTION<br />

868 WRITE/READ DATA PATTERNS TO ANY READ/WRITE STORAGE AFTER ntE BASIC<br />

869 16K. STORAGE ADDRESSABILITY IS CHECKED.<br />

870 ; --- ------ - ----------------------------- ----­<br />

871 ASSUME OS:DATA <br />

ElF8 870 £19: <br />

BF8 884000 8n MOV <br />

E3FB 8E08 87. MOV <br />

875<br />

87. DETERMINE RAM SIZE ON PLA~iAR BOARD<br />

877<br />

BFD 8A261000 8i8 MOV AH.BYTE PTR EQUIP_FLAG ; GET SENSE SIoIS INFO<br />

E401 80E40C 87. AND AH.OCH ; ISOLATE RAM SIZE SWS<br />

£404 8004 8.. MOV AL~4<br />

£406 F6E4 881 MUL AH<br />

£408 0410 8S;! ADO AL,I6 ;AOD BASIC 16K<br />

£40A 8BOO 881 MOV OX.AX ;SAVE PLANAR RAM SIZE IN ox<br />

E40C 8B08 88' MOV eX.AX ; AND IN ex<br />

M'<br />

8••<br />

DETERMINE 10 CHAHNEL RAM SIZE<br />

U7<br />

E40£ £462 8U IN AL,<strong>PC</strong>RT_C ;READ 10 CH RAM SIZE SWS<br />

£410 240F 88. ANO AL.OFH I ISOLATE FROI1 OntER BITS<br />

~E412 842:0- 8.0 MOV AH,32<br />

£414 F6£4 891 M\JL AH<br />

£416 A31500 8.,<br />

MOV IO_RAM_SIZE .AX ;SAVE 10 CHANNEL RAM SIZE<br />

£419 83F840 8" CMP 8X.40H ; P LAHAR RAM SIZE ::: 64K?<br />

E41C 7402: 8" JE EaO ;YES - ADD 10 CHN RAM SIZE<br />

E41E lacO 895 SUB AX,AX ;NO - 000 T ADD ANY 10 RAM<br />

8"<br />

£420 E20: ; ADD_IO_SIZE:<br />

£42:0 OX3 897 ADD Ax.ex ;SUM TOTAL RAM SIZE<br />

£422 A31300 898 MOV MEtfORY_SIZE,AX ;SETUP MEMORY SIZE PARM<br />

E425 813E72003412 8'9 CMP RESETJLAG.l2.34N ; POD INITIATED BY KBD RESET?<br />

A-13


LOC OSJ LINE SOU RCE<br />

E42B 7440 900 JE "2 iYES - SKIP MEMORY TEST<br />

901<br />

902 TEST ANY OTHER REAOIWRITE STORAGE AVAILABLE<br />

903<br />

E42D ee0004 90. MOV eX,400H<br />

E430 B91000 905 MOV CX,16<br />

E433 906 E21 :<br />

E433 3801 907 CHP oX,ex ,ANY HORE STG TO BE TESTED?<br />

E435 7646 908 JBE E23 iNO - GO TO NEXT TEST<br />

E437 SEDS 909 HOV OS,BX iSETUP STG ADDR IN OS AND ES<br />

E439 8EC3 910 MOV ES,BX<br />

E43B 83C110 911 ADO CX,16 ;ItlCREMENT STG BYTE COUNTER<br />

E43E 81C30004 912 ADD BX, 400H i SET POINTER TO NEXT 16K BLK<br />

E442 51 913 PUSH CX iSAVE REGS<br />

E443 53 91. PUSH BX<br />

E444 52 915 PUSH OX<br />

E445 E8DlFS 916 CALL STGTST iGO TEST A 16K BLK OF STG<br />

E448 SA 917 POP OX<br />

E449 5B 918 POP BX iRESTORE REGS<br />

E44A 59 919 POP CX<br />

E44B 74E6 920 JE E21 jCHECK IF MORE STG TO TEST<br />

921<br />

922 PRINT FAILING ADDRESS AND XOP'EO PATTERN IF DATA COMPARE EPROP<br />

923<br />

E440 eCOA 92. MOV OX.DS jCONVERT FAILING HIGH-ORDER<br />

E44F SAf8 925 MOV CH.AL iSAVE FAILING BIT PATTERN<br />

E451 8AC6 926 MOV AL.DH iGET FAILING ADDR (HIGH BYTE)<br />

E453 BI04 927 MOV CL,4<br />

E455 02E8 928 SHR AL.CL jRIGHT-JUSTIFY HIGH BYTE<br />

E4S7 E83EOO 929 CALL XLAT_PPINT_CODE ;CONVERT AND PRINT CODE<br />

E4SA BAC6 930 MOV AL,OH<br />

E45C 240F 931 AND AL,OFH<br />

E4Sf E83700 932 CALL XLAT_PRINT_CODE ; CONVERT AND PRINT CODE<br />

E461 8ACS 933 HOV AL,CH ;GET FAILING BIT PATTERN<br />

E463 BI04 93. HOV CL,4 i AND ISOLATE LEFTMOST NIBBLE<br />

E465 o2E8 935 SHR AL,CL<br />

E467 E82EOO 936 CALL XLAT_PRINT_CODE iCONVERT AND PRItlT CODE<br />

E46A 8ACS 937 HOV AL,C!~ ;GET FAILING BIT PATTERn AND<br />

E46e 2.40F 93. AND AL,OFH ; ISOLATE RIGHTMOST tHBBLE<br />

E46E f82700 939 CALL XLAT_PRWT_COOE ICONVERT AND PRINT CODE<br />

E471 BEESE! 940 HOV SI.OfFSET EI ;SETUP ADDRESS OF ERROR MSG<br />

E474 B90400 9'1 tlOV CX.EIL I GET MSG BYTE coum<br />

E477 E85002 9'2 CALL P_MSG ; FRINT ERROR MSG<br />

E47A 943 E22: ; GO_TST12!<br />

E47A E94AOO 94. JMP TST12 IGO TO NEXT TEST<br />

E470 945 E23: j STG_TEST.ODtIE:<br />

E410 884000 946 MOV AX,OATA jPOINT 05 TO DATA SEGMENT<br />

E480 8ED8 9.7 MOV OS,AX ; CHG MADE 3127161<br />

E482 8B161500 9.8 MOV OX , IO_PAM_SIZE lGET 10 CHANNEL RAM SIZE<br />

E486 OB02 9'9 OR OX,DX ; SET FLAG PESUL T<br />

E488 74FO 950 Jl En ;tlO 10 RAM. GO TO NEXT TEST<br />

E48A 890000 951 MOV CX,O<br />

E480 81FBOOIO 952 eMP eX,lOOOH jHAS ID RAM BEEN TESTED<br />

E491 77E7 953 JA E22 ; YES - GO TO ~lEXT TEST<br />

E493 BBOOIO 95. MOV BX,IOOOH ; SETUP BEG lOC FOR 10 RAM<br />

E496 EB9B 955 JMP SHORT E21 ;GO TEST 10 CHANNEL RAM<br />

956 ; ---------­-------­••------­----------------­<br />

957 CONVERT AND PRINT ASCII CODE<br />

958<br />

959 AL MUST CONTAIN NUMBER TO BE CONVERTED.<br />

960 AX AND BX DESTROYEO.<br />

961 i ---------------------­---------------------­<br />

E498 962 XLAT_PRINT_CODE PROC NEAR<br />

E498 IE 963 PUSH OS ;SAVE OS VALUE<br />

E499 DE 96. PUSH CS j POINT OS TO CODE SEG<br />

E49A IF 965 POP OS<br />

E498 [lBB7E4 %6 MOV 6X.OE4B7H ; OFFSET ASCII_T6l-XLAT TABLE<br />

E49E 07 967 XLATB<br />

E49F B40E 968 MOV AH,14<br />

E4Al B700 969 MOV CH,O<br />

E4A3 COlO 970 WT IDH ;CALL VIDEO_IO<br />

E4A5 IF 971 POP 05 ;RESTORE ORIG VALUE IN OS<br />

E4A6 C3 972 RET<br />

A-14


LOC OBJ LINE SOURCE<br />

97. ;--------------------------------------­<br />

97. ; INITIAL RELIABILITY TEST -- PHASE 4<br />

97. ;--------------------------------------­<br />

977 ASSUME CS:COOE ,OS: DATA <br />

E4A7 20333031 97. '1 DB • 301'<br />

0004 97. EQU $-FI J KEYBOARD MESSAGE<br />

E4A8 313331 980 DB '131'<br />

"L EOU t-F2 i CASSETTE MESSAGE<br />

E4AE 363031 982 F3 O' '601 '<br />

".......... 0003 9Bl "<br />

•••<br />

'IL<br />

00Q3 9B3 F3L EOU $-F3 ; DISKETTE MESSAGE <br />

98. <br />

E481 985 F. LABEL WORD ; PRINTER SOURCE TABLE <br />

E4Bl BC03 986 OW 38CH <br />

E483 7603 9B7 OW 378H <br />

E485 7602 9BB OW 278H <br />

E487 989 F'E LABEL WORD <br />

£487 30313233343536 9'0 ASCII.TBl DB '0123456789ABCDEF' <br />

37383941424344<br />

.546<br />

991 .-------------------------------------------­<br />

9'2 HEST.12<br />

9.J KEYBOARD TEST<br />

99. ;DESCRIPTION<br />

E4C7 '.B TSTl2:<br />

99. PESET THE KE'tBOARD AND CHECK THAT SCAN CODE AA.' IS RETURNED<br />

99. TO THE CPU. CHECK FOR STUCK KEYS.<br />

9.7 i -----------------------------------------.-­<br />

E4C7 884000 MOV AX,DATA ;POINT OS TO DATA SEG<br />

E4CA 8E08 1000 MOV OS,AX<br />

E4CC 803E120001 1001 eMP ~:FG_TST ,I ;MANUFACTURING TEST HODE?<br />

E401 7439 1002 JE F7 ; YES - SKIP KEYBOARD TEST<br />

E4D3 E8B201 1003 CAll K8D_RESET ; ISSUE SOFTWARE RESET TO KEYBRD<br />

E4D6 E32B 1004 JCXZ '6<br />

i PRINT ERR HSG IF NO INTERRUPT<br />

E4D8 B04D 1005 NOV AL,4DH ; ENABLE KEYBOARD<br />

E40A E661 1006 OUT PORT_B,Al<br />

E40C 80FBll 1007 CMP Bl,OAAH iSCAN CODE AS EXPECTED?<br />

"..........<br />

1009 <br />

E40F 7522 1006 JHE F. iNO - DISPLAY ERROR HSG<br />

1010 CHECK FOR STUCK KEYS<br />

1011<br />

E4E1 BOCt 1012 tIOV Al,otCH ; e lR KBD. SET ClK lINE HIGH <br />

E4E3 E661 Ion OUT PORT_B,Al <br />

E4£5 B04C 1014 MOV Al.4CH IENABlE KBD,elK IN NEXT BYTE <br />

E4E7 E661 1015 OUT PORT_B,Al <br />

E4E9 2BC9 1016 SUB ex,cx <br />

E4EB 1017 F5: ; KBD_WAIT: <br />

E4EB E2FE 1018 lOOP '5<br />

;DELAY FOR A WHILE <br />

E4ED E460 1019 IN Al,KBD_IN ICHECK FOR STUCK KEYS <br />

E4EF 3COO 1020 CMP Al,o iSCAN CODE = O? <br />

E4Fl 7419 1021 JE '7<br />

J YES - CONTINUE TESTING <br />

E4F3 8AE8 1022 MOV eH,Al .SAVE SCAN CODE<br />

E4F5 BI04 1023 MOV Cl,4<br />

E4F7 02E8 1024 5H. Al,el iRIGHT-JUSTIFY HIGH BYTE<br />

E4F9 E89CFF 1025 CAll XlAT_PIHHT_CODE j CONVERT AND PRINT<br />

E4FC 8AC5 1026 MOV Al.CH JRECOVER SCAN CODE<br />

E4FE 240F 1027 AND Al.OFH iISOlATE LOW ORDER BYTE<br />

E500 E895FF 1028 CAll XlAT_PRINT_CODE I CONVERT ANO PRINT<br />

E503 BEA7E4 1029 F6: MDV 5I.OFFSET F 1 ;GET MSG AOOR<br />

E506 B90400 1030 MOV CX,F1l ;GET HSG BYTE COUNT<br />

E509 E86E01 1031 CAll P_HSG i PRINT MSG ON SCREEN<br />

1032<br />

1033 SETUP INTERRUPT VECTOR TABLE<br />

1034<br />

ESOC 1035 F7: ; SE1UP_lNT_TABlE:<br />

E50C 2BCO 1036 SUB AX,AX<br />

£50£ 8ECO 1037 MOV ES,AX<br />

".......... £510 B93000 1038 MOV CX,24*Z: ;GET VECTOR CNT<br />

E513 OE 1039 PUSH CS iSETUP OS SEG REG<br />

E514 IF 1040 POP OS<br />

£515 BEnF£ 1041 MOV SI.OFEF3H ; OFFSET VECTOR_TABLE<br />

E518 BF2000 1042 MOV OI.OFFSET INT_PTR<br />

E51B FC 1043 CLD<br />

E5lC F3 1044 .EP HOV5W<br />

E51D AS<br />

A-IS


lOC OBJ LINE SOURCE<br />

ESIE 884000<br />

E521 8E08<br />

f523 B04t1<br />

£525 E661<br />

E527 BOFF<br />

E529 £621<br />

f5za B086<br />

£520 £643<br />

ESZ' 860304<br />

£532 (642<br />

!534 8AC4<br />

£536 £642<br />

E538 £462<br />

f53A 2410<br />

f5X 1.26800<br />

E53F E83E14<br />

ESifZ £83814<br />

ES45 E30C<br />

£547 81F84005<br />

E54B 7306<br />

£540 61F81004<br />

E551 7309<br />

E553<br />

E553 BEABE4<br />

E556 B90300<br />

£559 £86EOI<br />

ESSC<br />

ESSC 80Ft<br />

ESSE £621<br />

E560 1.01000<br />

E563 1.801<br />

E565 7503<br />

E567 E98900<br />

£56A<br />

E56A Boee<br />

E56C £621<br />

E56£ 8400<br />

£570 CDn<br />

f572 F6C4FF<br />

f575 7520<br />

£577 BAF201<br />

£57. eOIC<br />

f57C EE<br />

ES7D 28C9<br />

E57F<br />

E51F E2FE<br />

E581<br />

E581 ElFE<br />

E583 3302<br />

1045 J-------------------------------------------­<br />

1046 ;TEST.Il<br />

1047 CASSETTE DATA WRAP TEST<br />

1048 .DESCRIPTION<br />

1049 , TURN CASSETTE MOTOR OFF. WRITE A BIT OUT TO THE CASSETTE DATA BUS.<br />

1050 VERIFY THAT CASSETTE DATA READ IS WITHIN A VALID RANGE.<br />

1051 ; -------------------------------------------­<br />

1052<br />

1053 TURN THE CASSETTE HOTOR OFf<br />

1054<br />

1055 NOV AX,DATA ;POINT OS REG TO DATA SEG<br />

1056 HOV OS,AX<br />

1057 HOV AL,04DH ; SET TIMER 2: SPK OUT, AND CASST<br />

1058 OUT PORT_B.U jOur BITS ON. CASSETTE MOT OFf<br />

1059<br />

lObO<br />

1061<br />

WRITE A BIT<br />

1062 I10V AL.OffH ;DISABLE TIHER INTERRUPTS<br />

1063 OUT nlTMI,AL<br />

1064 NOV AL.OB6H iSEL TIM 2, LSB, t1S8, l1D 3<br />

106S OUT TltIER+3,AL jWRlTE 8253 CMD/MODE REG<br />

1066 NOV AX, 1235 ;5ET TIMER 2 CNT fOR 1000 USEC<br />

1067 OUT TIMEFh2.Al ;WRITE TIMER 2 COUHTER REG<br />

106a HOV AL,AH ;WRITE HSB<br />

1069 OUT TIMER+2,AL<br />

1070<br />

1071 READ CASSETTE INPUT<br />

1072<br />

1073 IN AL,PORT_C ;READ VAWE OF CASS IN BIT<br />

1074 AND AL~ I OH ; ISOLATE FRctI OTHER BITS<br />

107$ NOV LAST_VAl,AL<br />

1076 CALL READ_HALF_BIT<br />

1077 CALL READ_HALF_BIT<br />

1078 JCXZ fa ; CAS_ERR<br />

1079 CN" BX.MAX_PERIOD<br />

1080 JNC fa i CAS_ERR<br />

1081 CHP BX,MIN_PERIOD<br />

1082 JNC f9 ;GO TO NEXT TEST IF OK<br />

1083 Fa: ) CAS_ERR:<br />

I ... HOV SI.OfFSET F2 iCASSETTE WRAP FAIlED<br />

lOSS NOV CX,f2L<br />

1086 CALL P_MSG ;GO PRINT ERROR MSG<br />

1087 ; -------------------------------------------­<br />

1088 iTEST.14<br />

1089 DISKEnE ATTACHMENT TEST<br />

1090 lDESCRIPTION<br />

1091 CHECK IF IPL DISKETTE DRIVE IS ATTACHED TO SYSTEM. IF ATTACHED.<br />

1092 VERIFY STATUS OF NEC FDC AFTER A RESET. ISSUE A RECAL AHD SEEK<br />

1093 CHO TO FDC AND CHECK STATUS. COI1PLETE SYSTEI1 INITIALIZATION THEN<br />

1094 PASS CONTROL TO THE BOOT LOADER PROGRAJ1.<br />

1095 l-------------------------------------------­<br />

1096 F9:<br />

1097 MOV AL.OFCH ;ENABLE TIMeR AND KeD INTS<br />

1098 OUT INTAOI,Al<br />

1099 MOV AL.BYTE PTR EQUIPJLAG ;GET SENSE SWS INFO<br />

1100 TEST AL.OIH ;IPL DISKETTE DRI .... E AHCH?<br />

1101 JNZ fl. ;YES - TEST DISKETTE CONTR<br />

1102 JNP ,..<br />

.NO - SKIP THIS TEST<br />

1103 FlO: ; DISK_TEST:<br />

1104 MeV AL,OSCH ; ENABLE DISKETTE I KEYBOARD,<br />

1105 OUT INTAOt,AL ; AND TINER INTERRUPTS<br />

1106 HOV AH ,0 ;RESET flEC FOC<br />

1107 INT BH iVERIfY STATUS AFTER RESET<br />

1108 TEST AH.OFFH ;STATUS OK?<br />

1109 JNZ fl'<br />

iNa - FDC FAILED<br />

1110<br />

1111 TURN DRIVE 0 MOTOR ON<br />

1112<br />

1113 NOV OX.OlF2H ; GET AODR OF FOC CARD<br />

1114 HOV AL.ICH ;TURN MOTOR ON, EN DHA/IHT<br />

1115 OUT DX,AL il,JRITE FOC CONTROL REG<br />

1116 sua CX,CX<br />

1117 F11: ; NOTOR_WAIT:<br />

1118 LOOP fll ;WAIT FOR 1 SECOND<br />

1119 F12: I HOTOICWAITl:<br />

1120 lOOP fl2<br />

1121 XOR DX,OX ;SELECT DRIVE 0<br />

A-16


lOC OBJ lJNE SOURCE<br />

E585 6501<br />

ES87 88163EOO<br />

ESBB EBF30S<br />

ES8E n07<br />

E590 8522<br />

E592 f8Ee08<br />

E595 7309<br />

E597<br />

E597 BEAEElt<br />

E59A 890300<br />

E590 fB2AOt<br />

E5AO<br />

[SAO BoDe<br />

E5A2 BAF20J<br />

E5A5 EE<br />

ESAO<br />

E5A6 C7061A001EOO<br />

ESAC C7061C001£00<br />

E582 8081E4<br />

E585 BEOOOO<br />

E588<br />

E588 2E885600<br />

E58C BOAA<br />

ESSE EE<br />

ESBF 2ACO<br />

E5Cl EC<br />

E5C2 leAA<br />

ESC4 7506<br />

E5e6 89940800<br />

ESCA 46<br />

EseB 46<br />

ESCC<br />

Esec 45<br />

EseD 45<br />

EseE BIFDB7E4<br />

E502 75E4<br />

E504 BBOOOO<br />

E507 BAFA03<br />

E50A EC<br />

E50B ABFa<br />

E50D 7508<br />

ESDF C7870000FS03<br />

E5E5 43<br />

E5E6 43<br />

ESE7 SAfAD2<br />

ESEA EC<br />

ESEB ABfa<br />

ESED 7506<br />

E5EF C7870000f802<br />

ESF5 43<br />

ESF6 43<br />

ESF7<br />

ESF7 8BC6<br />

ESF9 6103<br />

ESFB 02G8<br />

E5FO OAe3<br />

ESFF A21100<br />

~E602BAOI02<br />

f605 EC<br />

f606 AaOF<br />

E608 7505<br />

f60A 800E110010<br />

E60F<br />

E60F B080 <br />

E611 E6AO <br />

1122 HOV 01,1 ; Sf lEeT TRACK 1<br />

1123 HOV SEEK_STATUS,OL<br />

112:4 CALL SEEK ;R"ECAlIBRATE DISKETTE<br />

112:5 JC F13 IGO TO EPA' SUBROUTINE IF ERR<br />

1126 HOV CH.34 I SELECT TRACK 34<br />

1127 CALL SEEK ,SEEK TO TRACK 34<br />

1128 JHC F14 10K. TURH HOTOR OFF<br />

112:9 F13: ; DSK_ERR!<br />

1130 MOV SI.OFFSET F3 IGET ADOR OF HSG<br />

1131 HOV CX.F3L IGET I1SG BYTE COUNT<br />

1132: CALL P _HSG IGO PRINT ERROR HSG<br />

1133<br />

1134 TURN DRIVE 0 MOTOR OFF<br />

1135<br />

1136 F14:<br />

1137 MOV AL,OCH ; TURN DRIVE 0 MOTOR OFF<br />

1138 MOV OX,03FZH ; FOC ClL ADDRESS<br />

1139 OUT DX,AL<br />

1140<br />

1141 SETUP PRINTER ANO RSZ3Z BASE ADDRESSES IF DEVICE ATTACHED<br />

114,<br />

1143 F15:<br />

1144 MOV SUFFER_HEAD, OFFSET KB_BUFFER ISETUP KEYBOARD PARAI1ETERS<br />

1145 MOV BUFFER_TAIL.OFFSET KB_BUFFER<br />

1146 MOV BP.OFFSET F4<br />

1147 MOV SI.O<br />

1148 Fl6:<br />

1149 MOV OX,CS: [BP] i6ET PRINTER BASE ADDR<br />

1150 MOV AL,OAAH iWRITE DATA TO PORT A<br />

1151 OUT DX,AL<br />

1152: SUB AL.AL<br />

1153 IN AL,DX ;READ PORT A<br />

1154 CMP AL,OAAH iDATA PATTERN SAME<br />

1155 JNE Fl7 iNO - CHECK NEXT PRT CD<br />

1156 MOV PRINTER_BASEL SI J,OX iYES - STORE PRT BASE ADDR<br />

1157 INC SI ; INCREMENT TO NEXT WORO<br />

1158 INC 51<br />

U59 F17:<br />

1160 INC BP I POINT TO NEXT BASE ADDR<br />

1161 It~C BP<br />

116, CMP BP.OFFSET F4E IALL POSSIBLE AOORS CHECKED?<br />

1163 Jt1E FI6<br />

1264 HOV ex.o ;POINTER TO RS2:32: TABLE<br />

1265 HOV OX.3FAH ;CHECK IF RS2:32 co 1 ATTCH?<br />

1166 IN AL,OX iREAQ INTR 10 REG<br />

1167 TEST AL,OF8H<br />

1168 JNZ Fl8<br />

1169 MOV RS232_BASE[ BX 1, 3F6H iSETUP RS2:32 CD II ADOR<br />

1170 INC BX<br />

1171 WC BX<br />

1172 FIB: MOV DX,2FAH ;CHECK IF RSl32 CD 2: ATTCH<br />

1113 IN AL.OX ;READ INTERRUPT 10 REG<br />

1174 TEST AL.OF8H<br />

1175 JtlZ FI9<br />

1176 ; SETUP RS232 CD 12<br />

1177 INC BX<br />

1178 INC BX<br />

1179<br />

1180 j------ SET UP EQUIP FLJ.G TO INDICATE NUMBER OF PRINTERS AND RS2:32: CARDS<br />

1181<br />

Jl8,<br />

Fl9:<br />

1163 MOV AX,SI ; 51 HAS 2* N1.JM8E'R Of RS232<br />

1184 MOV Cl,3 ; SHIFT COlMT<br />

118S ROR Al,Cl ; ROTATE RIGHT 3 POSITIONS<br />

1186 OR AL,BL ; OR IN THE PRINTER COUNT<br />

1187 MOV BYTE PTR EQUIP_FLAG+l.Al ; STURE AS SECOND BYTE<br />

1188 HOV DX.20IH<br />

1189­ IN AL,DX<br />

1190 TEST Al,OFH<br />

1191 JNZ f20 ; HO_GAME_CARD<br />

1192 OR BYTE PTR EQUIPJLAG+l,16<br />

1193 F20:<br />

1194<br />

1195 EHABLF NMI INTERRUPTS<br />

1196<br />

1197 MOV AL,80H ;ENABlE HMI nrrERRUPTS<br />

1198 OUT OAOH,AL<br />

A-I7


LaC OBJ LINE SOURCE<br />

E613 803E120001 1199 CMP HFG_Tsr.l ;HFG MODE?<br />

E618 7406 1200 JE<br />

; LOAD_BOOT_STRAP<br />

E61A BAOI00 1201 MOV OX.!<br />

f610 f81000 1202 CAll ERR_BEEP ;BEEP 1 SHORT TONE<br />

'"<br />

E620 1203 F21 : I LOAD_BOOT_STRAP:<br />

E620 E9CfOO 1204 JMP ;60 TO THE BOOT lOAOER<br />

E623 1205 F22 : ; LOOP.POD:<br />

E623 B03El2:0001 120b CMP MfG.TST .1 ;MANUFACTURING TEST MODE?<br />

E628 7503 1207 JNE<br />

'"<br />

; NO - GO TO BOOT LOAD ER<br />

E62A enEFA 12:08 JMP START ;YES - LOOP POWER-aN-CrAGS<br />

E620 1209 F23: GO.TO.BOOT:<br />

f62:0 E976FF 1210 JMP Fl5 JMP.BOOT<br />

1211 ; - - --­-------------------------------------.­<br />

1212 j INITIAL RELIABILITY TEST -­ SUBROUTINES<br />

1213 j -­ - - - - --­ - -----------.--------------------.­<br />

1214 ASSU~'E CS:CODE,DS:DATA<br />

1215 1--­--­--­ - --­------------­-----------------­<br />

1216 SUBROUTINES fOR Po!~ER ON DIAGNOSTICS<br />

1217 ; --------------­ - -­ - --­ - ------------­-------­<br />

1218 THIS PROCEDURE WILL ISSUE otlE LONG TONE (3 SECS) AND ONE OR<br />

1219 MORE SHORT TONES (1 SECI TO INDICATE A FAILURE ON THE PLANAR<br />

1220 BOARD, A BAD RAN NODULE, OR A PROBLEM WITH THE CRT.<br />

1221 iENTRY PARAMETERS:<br />

1222 DH = NUMBER Of LONG TONES TO BEEP<br />

1223 DL = .ruMBER Of SHORT TarlES TO BEEP.<br />

1224 ; -------------­ --­------­-------------­- ----­<br />

f630 1225 ERR.BEEP PROC NEAR<br />

f630 ge 122b PUSHF ;SAVE FLAGS<br />

E631 FA 1227 CLI ;DISABLE SYSTEM INTERRUPTS<br />

E632 IE 1228 PUSH OS ,SAVE OS REG CONTENTS<br />

E633 884000 1229 HOV AX.DATA ; POINT OS TO DATA SEG<br />

E636 6ED8 1230 MOV OS,AX<br />

E636 OAF6<br />

E63A 7418<br />

1231<br />

1232<br />

OR<br />

JZ<br />

DH,DH<br />

G,<br />

;, ANY LONG ONES TO BEEP<br />

, ti~. 00 THE SHORT ONES<br />

E63e 1233 Gl: ; LONG.BEEP:<br />

E63e B30b 1234 MOV BL.b ; COUUTER FOR BEEPS<br />

E63E E82500 1235 CALL BEEP ; DO THE BEEP<br />

E641 ElFE 1236 G2: LOOP G2 ; DELAY BET~EEN BEEPS<br />

E643 FEee 1237 D!OC DH ; ANY MORE TO DO<br />

E645 7SFS 1238 JtlZ G1 ; DO IT<br />

E647 603E120001 1239 CMP MfG.TST.l ; MfG TEST tl0DE?<br />

E64C 7506 1240 JtlE<br />

G'<br />

; YES - CONTINUE BEEPING SPEAKER<br />

E64E BOCD 1241 MOV AL.. OCDH ; STOP BLINKING LED<br />

E650 E661 1242 OUT PORT_B.AL<br />

E652 fBE6 1243 JMP SHORT Gl<br />

E654 1244 ; SHORT_BEEP:<br />

E654 6301 1245 MOV BL.t ; COUNTER fOR .. SHORT BEEP<br />

E656 f60000 1246 CALL BEEP ; DO THE SOUND<br />

E659 ElFE 1247 G4: LOOP G4 ; DELAY BETl-:EEN BEEPS<br />

f656 FEeA 1248 DEC Dl i DONE iolITH SHORTS<br />

E650 75FS 1249 JNZ G3 ; DO SOME MORE<br />

E65F ElFE 1250 G5: LOOP G5 ; LONG DELAY BEFORE RETURN<br />

E661 ElFE 1251 G6: LOOP G6<br />

E663 IF 1252 POP os ;RESTORE ORIG CONTENTS OF OS<br />

E664 90 1253 POPF ;RESTORE fLAGS TO ORIG SETTINGS<br />

E665 C3 1254 RET ; RETURN TO CALLER<br />

1255 ERR_BEEP ENDP<br />

1256<br />

1257 ROUTINE TO SOUND BEEPER<br />

1258<br />

E666 1259 BEEP PROC NEAR<br />

f666 B066 1260 MOV AL.I0110110B ,SEL TIM ~.LSB.MSB.BINARY<br />

E668 E643 1261 OUT TIMER+3.AL ;WRITE THE TIMER MODE REG<br />

E66A 883305 1262 MOV AX.533H ;DIVISOR FOR 1000 HZ<br />

f66D E642 1263 OUT TIMER+2.AL ,WRITE TIMER Z CNT - LSB<br />

E66f 6AC4 1264 nov AL.AH<br />

E671 E642 1265 OUT TIMER+Z,AL ;WRITE TIMER 2 CNT - MSB<br />

E673 E461 1266 IN AL,FORT.B ;GET CURRENT SETTING OF PORT<br />

E675 6AEO 1267 HOV AH,AL ; SAVE THAT SETTINGH<br />

E677 oe03 1268 OR AL.03 ;TURN SPEAKER ON<br />

E679 E661 1269 OUT PORT.B.AL<br />

E67B 26C9 1270 SUB CX.CX ;SET CNT TO WAIT 500 HS<br />

f67D ElFE 1271 67: LOOP G7 ;DELAY BEFORE TURNING OfF<br />

E67F FEee 1272 DEC BL ;DELAY WT EXPIRED?<br />

E661 75FA 1273 JtlZ G7 ,NO - CONTINUE BEEPING SPK<br />

E683 6AC4 1274 MOV AL,AH ; RECOVER VALUE OF PORT<br />

A-I8


LOC OBJ LINE SOURCE<br />

E6BS E661 1275 OUT<br />

E687 C3 1276 RET ;RETURN TO CALLER<br />

1277 BEEP EtlDP<br />

1278 1-------------------------------------------­<br />

1279 THIS PROCEDURE WILL SEND A SOFTWARE RESET TO THE KEYBOARD.<br />

1280 SCAN CODE AA' SHOULD BE RETURNED TO THE CPU.<br />

1281 ; -------------------------------------------­<br />

E688 1282 PROC NEAR<br />

E688 BOOC 1283 AL,OCH ;SET KBD CLK LINE LOW<br />

£6810. E661 1284 PORT.B,AL ;WRITE 8255 PORT B<br />

f68t 695629 1285 MOY CX, 10582 ;HOLO KBD CLK LOW FOR 20 MS<br />

E6aF E2FE 1286 G8: LOOP G8 ,LOOP FOR 20 MS<br />

£691 Boce 1287 MOV AL.OCCH ,SET CLK, ENABLE LINES HIGH<br />

E693 E661 1288 OUT PORT.B.AL<br />

£695 1289 SP_TEST: I ENTRY FOR I1AHUFACTURING TEST 2<br />

£695 B04C 1290 HOV AL.4CH ,SET KBD CLK HIBH. ENABLE LOW<br />

£697 E661 1291 OUT PORT.B.AL<br />

E699 SOFO 1292 HOV AL,OFOH i ENABLE KEYBOARD INTERRUPTS<br />

E695 £62.1 1293 OUT INTAOl.AL ,WRITE 8259 IMR<br />

E690 FB 1294 STI iENABLE SYSTEM INTERRUPTS<br />

£69£ 6400 1295 HOV AH.O ,RESET INTERRUPT IUDICATOR<br />

£6AO 28C9 1296 sua CX.CX ,SETUP INTERRUPT TIMEOUT CNT<br />

f6A2 F6C4FF 1297 G9: TEST AH, OFFH iDID A KEYBOARD INTR OCCUR~<br />

£610.5 750Z 1298 Jtll GI0 ;YES - READ SCAN COOE RETtmNED<br />

£6A7 E2F9 1299 LOOP G9 INa - LOOP TILL TIMEOUT<br />

£6A9 £460 1300 GI0: IN AL,PORT.A !READ KEYBOARD SCAN CODE<br />

E6AB 810.08 1301 HOV BL,AL ,SAVE SCAN CODE JUST READ<br />

E6AD Boce 1302 HOV AL,OCCH ,CLEAR KEYBOARD<br />

E6AF E661 1303 OUT PORT.B,AL<br />

E6Bl C3 1304 RET IRETURN TO CALLER<br />

1305 KBD.RESET ENDP<br />

1306<br />

1307 BLINK LED PROCEDURE FOR t1FG BURN-IN AND RUN-IN TESTS<br />

1308 (LED WILL BLINK APPROXIMATELY. 25 SECOND)<br />

1309 i - ­ - - --­- ­ - - - - -­--­-------------------­ - - - - -­<br />

f662 1310 BLIN'CINT PROC NEAR<br />

f682 FB 1311 STI<br />

E683 51 1312 PUSH ex I SAVE CX REG CONTENTS<br />

£684 50 1313 PUSH AX ;SAVE AX REG CONTENTS<br />

E685 £461 1314 IN AL,PORT_B ;READ CIJR'RENT VAL OF PORT 8<br />

E6B7 24BF 1315 AND AL.OBFH<br />

£689 E661 1316 OUT PORT_B,AL !BLINK LED<br />

EbBS 28C9 1317 SUB CX,CX<br />

E6BD E2FE 1318 Gl}: LOOP G11<br />

E68F OC40 1319 OR AL,40H ISTOP BLINKING LEO<br />

fbCl E661 1320 OUT PORT_B,AL<br />

£6C3 B020 1321 HOV AL,EOI<br />

f6C5 £62:0 1322 OUT INTAOO.AL<br />

f6C7 58 1323 POP AX ,RESTORE AX REG<br />

f6e8 59 1324 POP CX !RESTORE CX REG<br />

E6C9 CF 1325 IRET<br />

1326<br />

1327 ; ----------­----------------------------­---­<br />

1328 THIS SUBROUTINE WILL PRINT A MESSAGE ON THE DISPLAY<br />

1329<br />

1330 !ENTRY REQUIREMENTS:<br />

1331 51 ::: OFFSETCADORESS) OF MESSAGE BUFFER<br />

1332 CX = MESSAGE BYTE COUNT<br />

1333 MAXIMUM MESSAGE LENGTH IS 36 CHARACTERS<br />

1334 ; -------------------------------------------­<br />

E6CA 1335<br />

E6CA 884000 1336 HOV AX,DATA I POINT OS TO DATA SEG<br />

E6eD 8E08 1337 HOV OS,AX<br />

E6CF 803£120001 1338 CHP MFG.TST .1 IMFG TEST MODE?<br />

£604 7505 1339 JNE G12 ;NO - DISPLAY ERROR M5G<br />

E6D6 B601 1340 HOV OH,1 ; YES - SETUP TO BEEP SPEAKER<br />

~ Eb08 E95SFF 1341 JMP ERR.BEEP ; YES - BEEP SPEAKER<br />

EbDB 1342 G12: ; WRITCMSG:<br />

E6DB 2E8A04 13l.3 NOV AL,CS:(SIl ; PUT CHAR IN AL<br />

E60E 46 1344 INC SI ; POINT TO NEXT CHAR<br />

E60F B700 1345 MOV FJ;H,O ;SET PAGE # TO ZERO<br />

f6E1 840£ 1346 MOV AH.14 ;~RITE CHAR {TTY-INTERFACE)<br />

E6El COlO 1347 HIT 10H iCALL VIDEO.IO<br />

f6E5 E2F4 1348 lOOP G12 ; CONTINUE TI lL "SG WRITTEN<br />

f6E7 B80DOE 1349 MOV AX, OEODH ; POSITION CURSOR TO NEXT LINE<br />

f6EA COlO 1350 INT 10H ;SeNO CARRIAGE RETURN AND<br />

A-19


LaC OSJ LINE SOURCE<br />

E6EC eSOAOE<br />

E6EF COlO<br />

£6fl Cl<br />

E6F2<br />

E6F2: FB<br />

E6F3 884000<br />

E6F6 8£08<br />

E6Fe All000<br />

E6F8 A801<br />

E6FD 7423<br />

E6FF 890400<br />

E702<br />

noz 51<br />

£703 8400<br />

E705 CDll<br />

n07 7214<br />

£109 8402<br />

£10& B80000<br />

E70E 8fC3<br />

E7l0 BB007C<br />

E713 BAOOOO<br />

E7l6 8901QO<br />

E7l9 B001<br />

E7lB CDl3<br />

E7lD 59<br />

E7lE 7304<br />

E720 £2£0<br />

£722:<br />

E72:O! C018<br />

E7Z4<br />

e724 EAOO7COOOO<br />

1351 MOV AX,OEOAH ; LINE FEED CHARS<br />

1352: ItH 10H<br />

1353 RET<br />

1354 P _HSG EHOP<br />

1355 ;--- INT 19 ----------------------------­<br />

1356 I BOOT STRAP LOADER<br />

1357 IF A 5 1/4" DISKETTE DRIVE IS AVAIlABLE<br />

1358 ON THE SYSTEM. TRACK 0, SECTOR 1 IS READ INTO THE<br />

1359 BOOT LOCATION (SEG~IENT O. OFFSET 7COO}<br />

1360 Aim CONTROL IS TRANSFERRED THERE.<br />

1361<br />

1362 IF TIiERE IS NO DISKETTE DRIVE. OR IF THERE IS<br />

1363 IS A HAROWARE ERROR CONTROL IS TRANSFERREO<br />

1364 TO THE CASSETTE BASIC E~Y POINT.<br />

1365<br />

1366 I IPl ASSUMPTIONS<br />

1367 8255 PORT bOH El:lT 0<br />

1368 = 1 IF IPL FROH DISKETTE<br />

1369 ; ------------------------------.--------­<br />

1370 ASSUME CS:CDDE.DS:DATA<br />

1371 BOOT.STRAP PROC NEAR<br />

1372<br />

1373 STI 1 ENABLE INTERRUPTS<br />

1374 HOV AX,DATA ; ESTABLISH ADDRESSING<br />

1375 HOV OS,AX<br />

1376 HOV AX. EQUIPJUG ; GET THE EQUIPMENT SWITCKE'<br />

1377 TEST ALd J ISOLATE IPL SENSE SWITCH<br />

1378 JZ H3 ;, GO TO CASSETTE BASIC ENTRY POINT<br />

1379<br />

1380 ;------ MUST LOAD SYSTEM FROM DISKETTE -­ ex HAS RETRY COUHT<br />

1381<br />

1382 NOV CX.4 ; SET RETRY COUNT<br />

1383 HI: J IPL.SYSTEH<br />

1384 PUSH ex ; SAVE RETRY COl.mT<br />

1385 HOV AH,O ; RESET THE DISKETTE SYSTEM<br />

1386 INT 13ft j DISKETTE.IO<br />

1387 JC HZ I IF ERROR. TRY AGAIN<br />

1388 HOV AH,2 ; READ IN THE SINGLE SECTOR<br />

1389 MOV BX.O ; TO THE BOOT LOCATION<br />

1390 MOV ES,BX<br />

1391 HOV eX,oFFSET BOOT.LOCN<br />

139Z HOV OX,O I DRIVE 0, HEAD 0<br />

1393 MOV CX.! ; SECTOR I, TRACK 0<br />

1394 NOV AL,I ; READ ONE SECTOR<br />

n95 INT IlH i DISKETTE.IO<br />

1396 POP ex j RECOVER RETRY COUNT<br />

1397 JNe H4 ; CF SET BY UNSUCCESSFUL READ<br />

1398 LOOP HI j DO IT FOR RETRY TIMES<br />

1399<br />

1400 j------ UNABLE TO IPL FROM THE DISKETTE<br />

1401<br />

1402 H3: I CASSETTE_JUMP:<br />

1403 INT 18H ; USE INTERRUPT VECTOR TO GET TO BASIC<br />

1404<br />

1405 1------ IPL WAS SUCCESSFUL<br />

1406<br />

1407 H4:<br />

1406<br />

1409<br />

1410 ; -----INT 14----­---------------------------­<br />

1411 ;RS232_IO<br />

1412 THIS ROUTINE PROVIDES BYTE STREAM I/O TO THE: COf1MUNICATIOHS<br />

1413 PORT ACCORDING TO THE: PARAMETERS:<br />

1414 (AH )=0 INITIALIZE TItE COMMUNICATIONS PORT<br />

1415 j AL) HAS PARMS fOR INITIALIZATION<br />

1416<br />

1417 7 • 4 I<br />

1416 ----­ BAUD RATE -­ -PARITY-­ STOPBIT --WORD lENGTH-­<br />

1419<br />

1420 000 - 110 xo - NONE o ­ 1 10 - 7 BITS<br />

1421 001 - 150 01 - COD 1 - Z 11 - 8 BITS<br />

1422 010 - 300 11 - EVEN<br />

1423 011 - 600<br />

1424 100 - 1200<br />

1425 101 - 24QO<br />

1426 110 - 4600<br />

1427 III - 9600<br />

A-20


lOC OBJ LINE SOURCE<br />

~<br />

E729<br />

E72' 1704<br />

E7lS 0003<br />

E72D eOOl<br />

E72:F CODO<br />

E731 6000<br />

£733 3000<br />

E735 1800<br />

E737 DeaD<br />

en9<br />

E739 Fa<br />

£73A IE<br />

E73S 52<br />

E73e 56<br />

E730 57<br />

E73£ 51<br />

E7l' 88f2<br />

n41 DlE6<br />

E743 8ol4000<br />

E746 eEDA<br />

E748 88940000<br />

E74e 0802:<br />

E74E 7416<br />

E7S0 OA£4<br />

E752 7418<br />

E7S4 FEee<br />

£756 744£<br />

E758 FEte<br />

E7SA 7503<br />

E7St £96900<br />

1428 ON RETURN, CONDITIONS SET AS IN CALL TO como STATUS UH=3J<br />

1429 (AH'=1 SEND THE CHARACTER IN (AL) aVER THE cotI1O UHE<br />

1430 (AU REGISTER IS PRESERVED<br />

1431 ON EXIT. BIT 7 OF AH IS SET IF THE ROUTINE: WAS UNA6lE TO<br />

1432 TO TRANSMIT THE BYTE OF DATA OYER THE LINE. THE<br />

1431 REMAINDER Of AH IS SET AS IN A STATUS REquEST.<br />

1434 REFElECTING THE CURRENT STATUS Of THE LINE.<br />

1435 (AM)=! RECEIVE A CHARACTfR IN fAll FRon caMMO LINE BEFORE<br />

1436 RETURNING TO CA LLER<br />

1437 ON EXIT, AM HAS THE CURRENT LINE STATUS. AS SET BY THE<br />

1438 THE STATUS ROUTINE. EXCEPT THAT THE ONLY BITS<br />

1439 LEfT ON ARE THE ERROR BITS f7.4.3.2.1)<br />

1440 IN THIS CASE. THE TIME OUT BIT INDICATES DATA SET<br />

1441 READY WAS NOT RECEIVED.<br />

1442: THUS. AH IS HON ZERO ONLY WHEN AN ERROR OCctmRED.<br />

1443 UHl:3 RETURN THE COMMa PORT STATUS IN (AX)<br />

1444 AH CONTAINS THE LINE CONTROL STATUS<br />

1445 BIT 7 = TIME OUT<br />

1446 BIT 6 = TRANS SHIfT REGISTER EMPTY<br />

1447 BIT 5 = TRAN HOLOIHS REGISTER EMPTY<br />

14"'8<br />

BIT 4 = BREAK DETECT<br />

1449 BIT 3 = FRAMING ERROR<br />

1450 BIT 2: = PARITY ERROR<br />

1451 BIT 1 : OVERRUN ERROR<br />

1452: BIT 0 = DATA READY<br />

1453 AL CONTAIUS THE HOOE" STATUS<br />

1454 BIT 7 = RECEVEO LINE SIGNAL DETECT<br />

1455 BIT 6 = RING INDICATOR<br />

1456 Bn 5 = DATA SET READY<br />

1457 BIT 4 = CLEAR TO SEND<br />

14sa<br />

BIT 3 = DELTA RECEIVE LINE SIGNAL DETECT<br />

1459 BIT 2 = TRAILING EDGE RING DETECTOP<br />

1460 BIT 1 = DELTA DATA SET READY<br />

1461 BIT 0 = DELTA CLEAR TO SENO<br />

1462<br />

1463 COX) = PARAMETER INDICATING WHICH RSZ32 CARD fO,l ALLOWED)<br />

1464 ; DATA AREA RS232_BASE CONTAINS THE BASE ADDRESS OF THE 8"50 ON THE CARD<br />

1465 LOCATION 400H CONTAINS UP TO 4 RS232 ADDRESSES POSSIBLE<br />

1466 ~OVTPUT<br />

1467 AX MODIfIED ACCORDING TO PARNS OF CALL<br />

1468 ALL OTHERS UNCHANGED<br />

1469 1-------------------------------------------­<br />

1470 ASSUHE CS:CODE.DS:DATA<br />

1471 Al LABEL WORD<br />

1472 DW 1047 110 BAUD ; TABLE Of INIT VALUE<br />

1471 OW 768 150<br />

1474 ow 384 300<br />

1475 OW 192 i 600<br />

1476 ow ,. i I~OO<br />

1477 ow 43 i 2400<br />

1476 ow Z4 i 4800<br />

1479 ow 12 i 9600<br />

1480<br />

llt81 RS232_IO PRDC FA.<br />

1482<br />

1483 1------ VECTOR TO API'


LaC OBJ LINE SOURCE<br />

E7SF 1505 .402:<br />

E7SF FEee 1506 DEC AH ; TEST FOR (AH )=3<br />

£761 7503 1507 JHZ A3<br />

£763 £98900 1508 JMP A18 ; COMMUNICATION STATUS<br />

£766 1509 .403: , RETURN FROM RS232<br />

E766 59 1510 POP ex<br />

£767 SF 1511 POP 01<br />

E768 5E 1512 POP 51<br />

£769 SA 1513 POP DX<br />

E76A IF 1514 POP as<br />

E768 CF 1515 lRET I RETURN TO CAllER. NO ACTION<br />

1516<br />

1517 ;------ INITIALIZE THE COMM\.JHICATlONS PORT<br />

1518<br />

£76C 1519 A4:<br />

f76C 8AEO 1520 NOV AH.Al ; SAVE INIT PARMS IN AH<br />

£76E 83C203 1521 ADD OX,3 • POINT TO 8250 CONTROL REGISTER<br />

E771 B080 1522 ti0V .4.L,6QH<br />

E773 EE 1523 OUT OX.Al ; SET DLAS;1<br />

1524<br />

1525 ; -----­ DETERMINE BAUD RATE DIVISOR<br />

1526<br />

£774 8A04 152:7 MaV OL.AH ; GET PARMS TO DL<br />

£776 00C2 1528 ROL OLd<br />

E778 00C2 1529 ROL OLd I GET BAUD RATE TERM TO LOW BITS<br />

E77A DOC2 1530 ROL OLd<br />

Ene ooe2 1531 ROL OL,} ; *2 FOR WORD TASlE ACCESS<br />

EnE 81E20EOO 1532 A,m OX.DEH ; ISOLATE THEM<br />

£782 SF29E7 1533 MOV 01.0FFSET Al I BASE OF TADlE<br />

E78S 03FA 1534 ADO OI.DX ; PUT INTO INDEX REGISTER<br />

E787 88940000 1535 MOV OX.RS232_BASE(SIl ; POINT TO HIGH ORDER OF DIVISOR<br />

E7BB 42 1536 INC OX<br />

E7SC 2E8A4501 1537 NOV Al,CS:[DI1+l ; GET HIGH ORDER OF DIVISOR<br />

£790 EE 1538 OUT OX.AL ; SET MS OF DIV TO 0<br />

E791 4" 1539 DEC OX<br />

E792 2£8A05 1540 HOV Al.CS:[OIl ; GET LOW ORDER OF DIVISOR<br />

E795 EE 1541 OUT OX.Al ; SET LOW OF DIVISOR<br />

£796 83C203 1542 ADO DX.3<br />

£799 8'&'C4 1543 MOV AL.AH ; GET PARMS BACK<br />

£798 241F 1544 'NO AL.OIFH ; STRIP OFF THE BAUD BITS<br />

£790 EE 1545 OUT DX,At ; LINE CONTROL TO 8 BITS<br />

£79£ 83£A02 1546 SUB DX,2<br />

f7Al BODO 1547 MOV Al,O<br />

£7A3 EE 1546 OUT DX,Al J INTERRUPT ENABLES ALL OFF<br />

£7A4 E879 1549 JMP SHORT .1.18 ; Cot'CSTATUS<br />

1550<br />

1551 ,------ SEND CHARACTER IN (ALI OVER COMMa LINE<br />

1552<br />

£7A6 1553 AS:<br />

E7A6 50 1554 PUSH AX I SAVE CHAR TO SEND<br />

£7A7 83C204 1555 ADD OX.4 ; MODEM CONTROL REGISTER<br />

E7AA 8003 1556 MOV AL.3 ; OTR AND RTS<br />

E7AC EE 1557 OUT OX.AL ; DATA TERMIN'AL READY, REQUEST TO SEND<br />

£7AO 33C9 1558 XOR cx.cx ; INITIALIZE TIME OUT COUNT<br />

E7AF 83C202 1559 ADD DX.2 ; MODEM STATUS REGISTER<br />

E7BZ 1560 .4.6: I WAIT_OATA_SET_READY<br />

£782 EC 1561 IN At.OX ; GET HOOEN STATUS<br />

E7B3 .l820 1562 TEST Al.20H ; DATA SET READY<br />

E7BS 7508 1563 Jt~Z A7 I TEST_CLEAR_TO_SEND<br />

£7B7 E2F9 1564 LOOP A6 ; WAIT_OATA_SET_READY<br />

E7B9 58 1565 POP AX<br />

E7BA 80CC50 1566 OR AH.80 ; INDICATE TINE OUT<br />

E7BD fBA7 1567 JMP A3 I RETURN<br />

E7SF 1568 A7:<br />

E7SF 28C9 1569 SUB cx.CX<br />

E7et 1570 A8: ; WAIT_CLEAR_TO_SEHO<br />

E7et EC 1571 IN Al.DX ; GET MODEM STATUS<br />

E7t2 A810 1572 TEST Al.IOH I TEST CLEAR TO SEND<br />

E7C4 7508 1573 JHZ A9<br />

£7&6 E2F9­ 1574 LOOP A6 ; W.6.IT_tlE.6.R_TO_SEND<br />

£7C8 58 1575 pop AX , TIME OUT HA.S OCCURRED<br />

£7C9 80ce80 1576 OR AH.80H<br />

E7ee £B98 1577 JMP A3 ; RETLlR~1<br />

f7eE 1578 .4.9:<br />

f7eE 4A 1579 DEC ox ; LINE STATUS REGISTER<br />

E7CF 2BC9 1580 SUB CX.CX ; ItUTIALIZE WAIT COUNT<br />

E701 1581 AlD:<br />

A-22


LOC OBJ LINE SOURCE<br />

,,-..., <br />

,,-..., <br />

EiO! EC<br />

E7DZ A82:0<br />

E704 7508<br />

E706 E2F9<br />

E7D8 sa<br />

E7D9 80ce80<br />

E7ae Ee88<br />

E7DE<br />

E7Df 83EA05<br />

E7El 59<br />

E7EZ: 8ACl<br />

E7£4 EE<br />

E7E5 E97EFF<br />

E7E8<br />

E7E8 80Z671007F<br />

E7ED 83C204<br />

E7FO BOOI<br />

E7n EE<br />

E7F3 83C202<br />

E1F6 2BC9<br />

E7Fa<br />

E7F8 EC<br />

E7F9 AB20<br />

E7FB 7507<br />

E7FD E2F9<br />

E7fF<br />

E7FF 8480<br />

EaCI E962FF<br />

EB04<br />

Ea04 4A<br />

Eaos<br />

ESOS EC<br />

E806 A801<br />

Eece 7509<br />

EeCA F6067100eO<br />

E80F 74F4<br />

E811 EBEC<br />

E813<br />

EB13 241E<br />

EB15 8AED<br />

EBl7 88940000<br />

E81B EC<br />

E81C E947ff<br />

E8lF<br />

E81F 88940000<br />

E823 83C205<br />

E826 EC<br />

E827 8AEO<br />

E82:9 42<br />

E82:A EC<br />

E82B E938FF<br />

1582 IN AL,DX ; GET STATUS<br />

158l TEST AL,ZOH ; IS TRANSMITTER READY<br />

1584 JNZ All ; OUT_CHAR<br />

1585 LOOP AID ; GO BACK FOR MORE. AND TEST FOR TIME OUT<br />

1586 POP AX ; RECOVER ORIGINAL INPUT<br />

1587 OR AH.SOH ; SET THE TIME OUT BIT<br />

1"8 JMP Al ; RETUWN<br />

1589 All: ; OUT_CHAR<br />

1590 SUB OX,S " DATA PORT<br />

1591 POP ex ; RECOVER IN ex TEMPORARILY<br />

1592 MOV AL,Cl ; GET OUT CHAR TO Al FOR OUT. STATUS IN AH<br />

1593 OUT DX,Al ; OUTPUT CHARACTER<br />

1594 JMP Al ; RETURN<br />

1595<br />

1596 J------ RECEIVE CHARACTER FROM COMMO LINE<br />

1597<br />

1598 .1.12 :<br />

1599 ANO BIOS_BREAK. 07FH ; TURN OFF BREAK BIT IN BYTE<br />

1600 ADO DX,4 j MODEM CON1ROl REGISTER<br />

1601 MOV Al,! ; DATA TERMINAL READY<br />

1602 OUT OX,At<br />

1603 ADO DX,2 ; MODEM STATUS REGISTER<br />

1604 SUB CX,CX ; ESTABLISH TIME OUT COUNT<br />

1605 A13: ; WAIT_DSR<br />

1606 IN Al,OX ; MODEM STATUS<br />

1607 TEST Al,2OM ; DATA SET READY<br />

1608 JNZ A1S ; IS IT READY YET<br />

1609 LOOP All ; WAIT UNTIL IT IS<br />

1610 A14: ; TIME_OUT_ERR<br />

1611 MOV AH.80H ; SET TIME OUT ERROR<br />

1612 JMP Al J RETUPN WITH ERROR<br />

1611 AIS: ; WAIT_OSR_ENO<br />

1614 DEC OX ; LINE STATUS REGISTER<br />

1615 A16: ; WAIT_RECV<br />

1616 IN Al,OX ; GET STATUS<br />

1617 TEST Alol J RECEIVE BUFFER FUll<br />

)618 JNZ A17 ; GET CHAR<br />

1619 TEST BIOS_BREAK,BOH J TEST FOR BREAK KEY<br />

1620 JZ Alb I LOOP IF ~mT<br />

)621 JMP A14 i SET TIME OUT ERROR<br />

1622 A17: ; GET_CHAR<br />

)623 AND Al,OOOl1110B ; TEST FOR ERROR CONDITIONS ON RECV CHAR<br />

1624 MOV AH,Al ; SAVE THIS PART OF STATUS FOR LATER OPERATION<br />

1625 MOV DX,RS232_BASE[ SI J ; DATA PORT<br />

1626 Al,DX ; GET CHARACTER FROH LINE<br />

1627 '" JMP Al ; RETURN<br />

1628<br />

1629 ;------ COMMO PORT STATUS ROUTINE<br />

1630<br />

1631 A18:<br />

1632 MOV OX ,RS232_BASE[SI J<br />

1633 ADO OX.S J CONTROL PORT<br />

1634 IN AL,OX ; GET LINE COHTROL STATUS<br />

1635 MOV AH,Al I PUT IN AH FOR RETURN<br />

1636 INC OX ; POINT TO MODEM STATUS REGISTER<br />

1637 IN Al,OX ; GET MODEM CONTROL STATUS<br />

1638 JMP Al ; RETURN<br />

1639 RS232_IO ENOP<br />

1640 ; ---- INT 16 -------------------------------­<br />

1641 i KEYBOARD I/O<br />

1642: THESE ROUTINES PROVIDE KEYBOARD SUPPORT<br />

)643 ; INPUT<br />

1644 I AHJ=O READ THE NEXT ASCII CHARACTER STRUCK FROM THE KEYBOARD<br />

1645 RETURN THE RESULT IN I AU, SCAN CODE IN (AH I<br />

164& (AHJ=l SET THE Z FlAG TO INDICATE IF AN ASCII CHARACTER IS AVAIlABLE<br />

1641 TO BE READ.<br />

1648 (ZF )=1 -- NO COOE AVAILABLE<br />

1649 (IF )=0 -- CODE IS AVAILABLE<br />

1650 IF Zf = 0, THE NEXT CHARACTE~ IN THE BUFftR TO BE READ IS<br />

1651 IN AX, AtID THE ENTRY REMAINS IN THE BUFFER<br />

1652 (AHI=2 RETURN THE CURRENT SHIFT STATUS IN AL PEGISTER<br />

1653 THE BIT SETTINGS FOR THIS CODE ARE INDICATED IN THE<br />

1654 THE EQUATES FOR KBJLAG<br />

1655 ; OUTPUT<br />

1656 AS NOTED ABOVE, OIRY AX Atm FLAGS CHANGED<br />

1651 All REGISTERS RETAWED<br />

1658 1--------- ------- -----------------------­<br />

A-23


LaC OBJ LINE SOURCE<br />

1659 ASSUME CS:CODE,DS!DAiA<br />

E8tE 1660 KEYBOARD_IO PROC "R<br />

E82E FB 1661 SH j INTERRUPTS BACK ON<br />

ESZ:F IE 1662 PUSH OS J SAVE CURRENT DS<br />

. E8lt 53 16.63 IJUSH 6X I SAVE BX TEMPORARILY<br />

E831 B84000 1664 I10V ex,OATA<br />

E8M SEDB 1665 MOV OS,BX I ESTABLISH POINTER TO DATA REGION<br />

£836 OAF. 1666 OR ....... ; AH=O<br />

E83& 740B 1667 JZ .1 ; ASCII_READ<br />

E63A fEee<br />

1666<br />

O'C A.<br />

I AH-=1<br />

E83C 7420<br />

1669<br />

JZ<br />

J ASCII_STATUS<br />

••<br />

E83E FEet<br />

1670<br />

DEC AH<br />

; AH:::2<br />

E840 71\2D 1671 JZ Kl ; SHIFT_STATUS<br />

E842 5B 1672 POP BX J RECOVER REGISTER<br />

E843 IF 1673 POP OS<br />

E84lt CF 1674 IRET J INVALID COHt1AND<br />

1675<br />

1676 ;------ READ THE KEY TO FIGURE OUT WHAT TO DO<br />

1677<br />

1678 Kl: ; ASCII READ<br />

'84'<br />

E845 FB 1679 STt ; INTERRUPTS BACK ON DURING LOOP<br />

E846 90 1680 NOP J AlLOW AN INTERRUPT TO OCCUR<br />

EM7 FA 1681 eLI I INTERRUPTS BACK OFf<br />

E848 881ElAOO 1682 MaV ex.BUfFER_HEAD­ I GET POINTER TO HEAD OF BUFFER<br />

EMC 381EICOO 1683 eMP BX,BUFFER_TAIl I TEST END Of BUFfER<br />

E850 74F3 1684 JZ Kl I LOOP UNTIL SOMETHING IN BUFFER<br />

f652 8B07 1685 I10V AX,lBXl j GET SCAM CODE AND ASCII CODE<br />

E654 E81EOO 16.. CALL K' I MOVE POINTER TO NEXT POSITION<br />

E857 891E lAOO 1687 I10V eUfFER_HEAD,BX I STORE VALUE IN VARIABLE<br />

E858 58 1688 pop ex ; RECOVER REGISTER<br />

f85t IF 1689 POP os • RECOVER SEGMENT<br />

E8SD Cf 1690 IRET ~ RETURN TO C.A LLER<br />

1691<br />

1692 1------ .ASCII STATUS<br />

1693<br />

E85E 1694<br />

E85E FA 169S eLI ; INTERRUPTS Off<br />

E85F 881£1AOO 1696 I10V ax .SUFFER_HEAD ; GET HUD POINTER<br />

E86.3 381ElCOO 1697 CMP ex.BUFFER_TAIl ; IF EQUAL (Z=l) THEN NOTHIHG THERE<br />

E867 8807 1696 HOV AX.fex]<br />

[869 Fe 1699 SH ; INTERRUIJTS BACK ON<br />

E8~A 58 1700 POP BX J RECOVER REGISTER<br />

E86B IF 1701 POP OS o RECOVER SEGMENT<br />

E86C CA02O'O 1702 RET ; THROW AWAY fLAGS<br />

1703<br />

1704 1------ SHIfT SfArus<br />

1705<br />

E8bF 1706 K3:<br />

E86F A01700 1707 I10V Al ,KBJLAG 1 GET THE SHIFT STATUS FLAGS<br />

E872 58 1708 pop ex ; RECOVER REGISTER<br />

£873 IF 1709 POP DS ; RECOVER REGISTERS<br />

E874 CF 1710 IRET ; RETURN TO CALLER<br />

1711<br />

1712<br />

17U<br />

1714<br />

j------ INCREMENT A BUFfER POINTER<br />

E875 1715 K4 PROC NEAR<br />

E875 83C302 1716 ADD B)(,2 ; MOVE TO NEXT WORD IN LIST<br />

E878 81 F83EOO 1717 CHP BX,OfFSET KB_BUFFER_ENO ; AT END OF eUFFER?<br />

Ea7C 7503 1718 JNE .s j NO. CONTINUE<br />

E87E 881EOO J719 MOV ax ,OFfSET Ke_BUFFER t YES, RESET TO eUFFER BEGINNING<br />

'681 1720 KS:<br />

E881 C3 1721 RET<br />

1722 K4 ENDP<br />

1723<br />

1724 ~------ TABLE OF SHIfT KEYS AtI) tuSK VALUES<br />

Ins<br />

Eee! 1726 K6 LABEL eYTE<br />

E882 ;2 1727 DB INS_KEY ; INSERT KEY<br />

E8&3 3A45463&10 1728 06 CAPS_KEY ,NUN_KEY ,SCROL~KEY •AlT_KEY.eTl_KEY<br />

E888 2A36 1729 DB LEF-r_KEy,RIGHT_KEY<br />

0008 1130 .bL 'OU $-K6<br />

1731<br />

1732 ;------ SHIFT_H'\sK_TABLE<br />

1733<br />

..... 1734 K7 LABEL BYTE<br />

E88A 80 1735 DB ; INSERT MODE SHIFT<br />

A-24


LOC OBJ I.INf SOURCE<br />

,..-..."<br />

~<br />

Eass 4020101:1804- 1736<br />

E890 020. 1737<br />

1738<br />

1739<br />

1740<br />

£892 IBFFOOFFFFFFI EFF 1741<br />

E89A fFFfFFIFfF7FFFll 1742<br />

f8A2 170512:141915090F 1743<br />

feAA lO181DOAFF01l3 1744<br />

E8B1 040b-C17080AOBOCFFff 1745<br />

EeBA FFFFICIA18031602 1746<br />

fBe2: OEODfFFfFfFFFfff 1747<br />

E8CA 20F-F 1748<br />

1749<br />

f8ce 1750<br />

fBce 'SESF606162636465 1751<br />

£8D4 6667FHF77Ff84fF 1752:<br />

ESDC 73F"F74FF75Ff76FF 1753<br />

£8£4 FF 17·54<br />

1755<br />

E8ES 1756<br />

£8£5 IB 1757<br />

feE6 31323334353637<br />

383930203DO&09<br />

£8F4 7177657274797S \758<br />

696F70SBSDODFF<br />

£902 61736466676864<br />

6B6C3B'27<br />

£900 bOFF5C 1759<br />

EnD 7A7863766Z6E6D<br />

2CZEZFFf2AFFZO<br />

-E.9lE FF 1760<br />

1761<br />

1762:<br />

£91F 1763<br />

E91F 18 ]764<br />

£920 214023242'55£<br />

£92:6 262A28295F280800<br />

EnE 5157455254-5955 1765<br />

494F507B7DODFF<br />

E93C 4153444647484A<br />

4B4C3A22<br />

£947 7£FF 1766<br />

£949 7CSA584356424E<br />

4D3C3E3FFfO OF F2:0F F<br />

1767<br />

£959 1768<br />

£q59 S4555657S8S9SA 1769<br />

£960 515CSD 1710<br />

1771<br />

£963 177Z<br />

£963 68696A686C 1773<br />

£968 -606-(6F7071 1774<br />

1775<br />

1776<br />

E'96b 1777<br />

E96b 3738392£)343536 171a<br />

28311233302£<br />

08 CAPS_SHIfT .NJI'LSHIFT.SCROLL_SHIFT ,AL T_SHIFT .CTl_SHIFT<br />

DB LEFT_SHIFT ,RIGHT_SHIFT<br />

;------ SCAN COOE TABLES<br />

K8 DB 27.-1.0,-1,-1,-1.10,-1<br />

DB -1.-1.-1,31.-1 ,]2:7.-1, 17<br />

DB 23.5.1-6.2:0.2:5.21,9.15<br />

DB 16.27,2:9,10. -1,1,19<br />

08 4,6,7.8.10.11,12:,-1,-1<br />

08 -1. -1.2:8.2:6 .24.3.22:.Z<br />

08 14.13.-1,-1,-1,-1,-1,-1<br />

DB',-1<br />

J-------- eTL TABLE SCAN<br />

K9 LABEL BYTE<br />

DB 94.95,96 ,97.98,99,100,101<br />

08 102:,103.-1, -1.119,-10132:.-1<br />

DB 115.-1.116,-1, ll7.-1.118.-.1<br />

DB -1<br />

i----..-­ LC TABLE<br />

KID LABEL BYTE<br />

DB<br />

o18H. '12:]4567890-=' ,08H,09H<br />

08 'lIw~rtyuiopt J' ,DOH, -1. I asdtfh;klJ' ,Q21H<br />

D8<br />

1------ UC TABLE<br />

KII LABEl BYTE<br />

DB -\<br />

DB<br />

60H.-l ,5CH. 'z·xcvbIlJ!\ •. /' .-1, '.' .-1,' •<br />

DB 'QWERTYUIOP •• OOH ,-1.'ASDFGHJKL:'"<br />

DB<br />

;------ tIC TABLE SCAN<br />

K12 LABEL SYTE<br />

07EH,-I,' zxcWNr1?',-l.O.-I,' '.-1<br />

DB 84 ,85.a6 .87.88,e'9. 99<br />

DB 91,92.93<br />

;------ ALT TA8LE SCAN<br />

K13 LABEL BHE<br />

;------ HUM STATE TABLE<br />

K14 LABEl BYTE<br />

DB<br />

DB 1040105,106.107,108<br />

DB 1-09,110,111.112:,113<br />

'769-456.1230.'<br />

£97,\<br />

£97A 474849F'F48f140<br />

E981 FF4FSOSISZSl<br />

~<br />

E987<br />

£987 F8<br />

E988 50<br />

E989 53<br />

E98A 51<br />

E988 52:<br />

E9ee 56<br />

E980 ,57<br />

E98E IE<br />

£98F 06<br />

£990 Fe<br />

E991 884000<br />

KB_INT PROC fAR<br />

STI<br />

PUSH AX <br />

PUSH BX <br />

PUSH ex <br />

PUSH OX <br />

PUSH SI <br />

PUSH OI <br />

PUSH OS <br />

PUSH<br />

eLO<br />

HOV<br />

,5 <br />

AX,O-ATA <br />

J FORWARD DIRECTION <br />

A-25


LOC OBJ LINE SOURCE<br />

E994 8E08 1798 HOV DS,AX ; SET UP ADDRESSING<br />

E996 E460 1799 IN AL,KB_DATA j READ IN THE CHARACTER<br />

E998 50 1800 PUSH AX ; SAVE IT<br />

E999 E461 11301 m AL,KB_CTL j GET THE CONTROL PORT<br />

E998 8AEO 1802 MOV AH ,AL ; SAVE VALUE<br />

E990 DC8D 1803 OR AL,80H ; RESET BIT fOR KEYBOARD<br />

E99F E661 1804 OUT<br />

E9Al 66ED 1605 XCHG AH,AL j GET BACK ORIGINAL CONTROL<br />

E9A3 E661 1806 OUT KB_CTl,AL ; KB HAS BEEN RESET<br />

E9A5 58 1807 POP AX ; RECOVER SCAN CODE<br />

E9A6 8AEO 1808 HOV AH,Al ; SAVE SCAN CODE IN AH ALSO<br />

1809<br />

1810 ;------ TEST FOR OVERRUN SCAN CODE FROM KEYBOARD<br />

1811<br />

E9A8 3eFF 1812 CMP AL,OFFH ; IS THIS AN OVERRUN CHAR<br />

E9AA 7503 len JI~Z K16 ; NO, TEST fOR SHIfT 'KEY<br />

E9AC E97502: 1814 J~IP K62 I BUFFER_FULL_BEEP<br />

1815<br />

1816 ;------ TEST FOR SHIFT KEYS<br />

1817<br />

E9AF 1818 K16: I TEST_SHIFT<br />

E9AF 247F 1819 AHa AL,07FH ; TURN OFF THE BREAK BIT<br />

E9Bl DE 1820 PUSH OS<br />

E982 07 1821 POP ES I ESTABLISH ADDRESS OF SHIFT TABLE<br />

E9B3 BF8ZE8 1822 MOV DI,OFFSET K6 ; SHIFT KEY TABLE<br />

E9B6 890800 1823 MOV CX,K6L LENGTH<br />

E~9 F2 1824 PEPNE SCASB ; LOOK THROUGH THE TABLE FOR A MATCH<br />

E9SA AE<br />

E9B8 8A.C4 1825 HOY AL,AH j RECOVER SCAN COOE<br />

E9SD 7403 1826 JE K17 j JUMP IF MATCH FOUND<br />

E98F E9880D 1827 JtlP K2S ; IF NO MATCH, THEN SHIrT NOT FOUND<br />

1828<br />

1829 j------ SHIFT KEY FOUHD<br />

1830<br />

E9C2 81EF83E8 1831 K17: SUB DI,OFFSET K6.1 J ADJUST PTP TO SCAN CODE MTCH<br />

E9C6 2E8AA5BAfa 1832 MOV AH,CS:K7[DII I GET MASK INTO AH<br />

E9CD .1.680 1833 TEST AL,eOH ; TEST FOR BREAK KEY<br />

EQCD 7554 1834 JNZ K21 ; BREAK_SHIFT_FOUND<br />

1835<br />

1836 j------ SHIFT HAKE FOlR'ID, DETERMINE SET OR TOGGLE<br />

1837<br />

E9CF 80FCI0 1838 OHP AH ,SCROLL_SHIFT<br />

E902 7307 1839 JAE K18 IF SCROll SHIFT OR ABOVE, TOGGLE KEY<br />

1840<br />

1841 1------ PLAIN SHIFT KEY, SET SHIFT ON<br />

1842<br />

E9D4 08261700 1843 OR TURN ON SHIFT BIT<br />

E9D8 E98300 1844 JHP ; INTERRUPT_RETURN<br />

1845<br />

1646 1------ TOGGLED SHIFT KEY. TEST FOR 1ST MAKE OR NOT<br />

1847<br />

E9DB 1848 K18: ; SHIFT-TOGGLE<br />

E9DB F606170004 1849 TEST KBJLAG. CT,"-SHIFT ; CHECK CTL SHIFT STATE<br />

E9EO 7568 1850 JNZ K25 JUMP IF CTL STATE<br />

E9E2 3e52 1851 CMP Al, INS_KEY I CHECK FOR INSERT KEY<br />

E9E4 7525 1852 JHZ K22 1 JUMP IF NOT INSERT KEY<br />

E9E6 F60617DQ08 1653 TEST KBJLAG. ALT_SHIFT CHECK FOR ALTERNATE SHIFT<br />

E9E8 7403 1654 JZ K19 JUMP IF NOT ALTERNATE SHIFT<br />

E9ED E85890 1855 JHP K25 JUt1P IF ALTERNATE SHIFT<br />

E9FO F606170020 1856 K19: TEST KBJLAG, NUH_STATE ; CHECK FOR BASE STATE<br />

E9F5 750D 1857 JNZ KZl ; JUMP IF NUM LOCK IS ON<br />

E9F7 F606170003 1858 TEST<br />

E9Fe 7400 1859 JZ K22 ; JUMP IF BASE STATE<br />

1660<br />

E9FE 1861 K20: ; truMERIC ZERO. NOT INSERT KEY<br />

E9FE 883052 1862 "OV AX, 5230H ; PUT OUT AN ASCII ZERO<br />

EADI E90801 1863 JHP K57 ; BUFFER]ILL<br />

EA04 le64 ; MIGHT BE NUMERIC<br />

EA04 F606170003 1865 TEST KBJLAG, LEFT_SHIFT+ RIGHT_SHIFT<br />

EA09 74F3 1866 JZ K20 i JUMP NUHERIC, NOT INSERT<br />

1867<br />

EADs 1868 K22: ; SHIFT TOGGLE KEY HIT; PROCESS IT<br />

EADB 84261800 1869 ; IS KEY ALREADY DEPRESSED<br />

EAOF 7540 1870 JNZ K26 ; JUMP IF KEY ALREADY DEPRESSED<br />

EAll 08261800 1871 OR KBJLAG_l.AH INDICATE THAT THE KEY IS DEPRESSED<br />

EAtS 30261700 1872 XOR K8JLAG.AH TOGGLE THE SHIFT STATE<br />

EAi9 3C52 1873 Cf1P Al.INS_KEY TEST FOR 1ST MAKE OF INSERT KEY<br />

EAIB 7541 1874 JNE K26 JUMP IF NOT INSERT KEY<br />

A-26


LOC OBJ LINE SOURCE<br />

EAID 680052<br />

EA20 E98901<br />

£.1.23<br />

EAll 80FCI0<br />

~EA26731A<br />

fAze F6D4<br />

EAZA 20261700<br />

EAZE XBa<br />

£.1.30 752C<br />

£A3l .1.01900<br />

EA35 8400<br />

EA37 88261900<br />

£AlB XOD<br />

£.1.30 741F<br />

EA3F £9.1.301<br />

EA42<br />

EA42 F604<br />

EA44 20261800<br />

EA46 E814<br />

EA4A<br />

EA4A 3eao<br />

EA4C 7310<br />

fA4E F606180008<br />

£.1.53 7417<br />

EA55 3C45<br />

EAS7 7405<br />

EA59 80261800F7<br />

EASE<br />

EASE FA<br />

EA5F 6020<br />

£.1.61 £620<br />

£.1.63<br />

EA63 01<br />

£.1.64 IF<br />

EA6S SF<br />

EA66 5£<br />

EA67 5.1.<br />

EA66 59<br />

EA69 58<br />

EA6A 58<br />

EA66 CF<br />

EA6C<br />

EA6C F606170008<br />

fA71 7503<br />

EA73 £98FOO<br />

£.1.76<br />

£A76 F606170004<br />

EA78 7431<br />

EA70 3C53<br />

~ EA7F 7520<br />

EASt C70672003412<br />

£A87 £901F5<br />

fAaA<br />

EAaA 524F5051484C4O<br />

1875 MOV AX,INS_KEY*Z56 , SET SCAN CODE INTO AH. 0 INTO Al<br />

1876 JMP '57 ; PUT INTO OUTPUT BUFFER<br />

1877<br />

1878 1------ BREAK SHIFT fOUND<br />

1879<br />

le80 K23: f BREAK-SHIFT-FOUND<br />

1881 eMP AH,SCROLL_SHIFT ; IS THIS A TOGGLE KEY<br />

1682 JAE '24 ; YEs. HAtJOlE BREAK TOGGLE<br />

1883 UOT AH i INVERT MASK<br />

1684 AND KBJLAG,AH TlJ!


LOC 08J LINE SOURCE<br />

£"91 474849<br />

EA9tt 1011121314151&17<br />

EA9C 18191EIF20212223<br />

E:A.A4 24252b2C2D2:E2f30<br />

EAAC 3132<br />

1951 DB 71.72,73- ; 10 HUMBERS ON KEYPAD<br />

1952 ;------ SUPER-SHIFT-TABlE<br />

1953 DB 16,17,18,19,20,2:1,22,23 i A-Z TYPEWRITER CHARS<br />

l'954 DB 24.2S.30.31.32.33,~.35<br />

1955 DB 36.37,38,44,45,46,47.48<br />

1956 DB 49,,50<br />

1957<br />

1958 ;_.-••- IN ALTERNATE SHIFT, RESET NOT FOUtIJ<br />

fAAE<br />

EAAE X3V<br />

EA&'O ?SOS<br />

£A82 -B020<br />

EAM E92501<br />

fAS7<br />

EAB1 BF8AEA<br />

UBA 890100<br />

EABD F2<br />

EABE AE<br />

EASF 7SU<br />

'£Ac1 81EF8BEA<br />

fAtS .1.01900<br />

EAtS 840A<br />

EAtA F6£4<br />

flee Ole7<br />

EACE "21900<br />

EADl EB&8<br />

1959<br />

1960 K31: I NO-RESET<br />

1961 CNP AL,57 ; TEST FOR 'SPACE KEY<br />

I ... JNE K3< ; NOT THERE<br />

1963 HOV Al •• ; SET SPACE CHAR<br />

1964 JHP K57 ;: BUFF(R_FIll<br />

1965<br />

J------ LOOK<br />

1966 FOR KEY PAD ENTRY<br />

1967<br />

1966 K32 : J -All-KEY-PAD<br />

1969 I10V OI.OFFSET K30 I ALT-INPUT-TASlE<br />

1970 HOY CX.lO ; lOOK FOR ENTRY USING KEYPAD<br />

1971 REPNE seASB I tOOK FOR MATCH<br />

JNE 'l3<br />

I NO.AlT_KEYPA.D<br />

SUB DI,OFFSET K3D+l ; 01 NOW HAS ENTRY VALUE<br />

HOV AL.ALT_n~puT ; GET THE CURRENT BYTE<br />

HOV AH.ID ; MULTIPLY BY 10<br />

HUL<br />

ADO<br />

HOV<br />

IN"<br />

AH<br />

AX.OI<br />

•••<br />

ALT.INPUT ,Al<br />

<strong>1981</strong> 1------ L.()()I( fOR 'SUPERStlIFT ENTRY<br />

fAD3­<br />

EA03 'C6G6'1 toOItO<br />

fAne 891AOO<br />

fA08 F2<br />

fADe AE<br />

EADD 7505<br />

U.OF 8000<br />

un £9F800<br />

1982<br />

1983 ; NO-AlT-KEYPAO<br />

1964 ; ZERO ANY PREVIOUS ENTRY INTO INPUT<br />

1985 NOV CX,26 ; DI,ES ALREADY POINTING<br />

1986 REPME SCASS ; LOOK FOR MATCH IN ALPHABET<br />

1987 JNE K34 i NOT FOUNO. FUNCTIOO KEY OR OTHER<br />

1988 MOV Al.a ; ASCII CODE OF ZERO<br />

1989 JM-P K57 ; PUT IT IN THE BUf.FER<br />

199'0<br />

1991 ;------ LOOK FOR TOP ROW OF ALTERNATE SHIFT<br />

UE4<br />

EAE4 3C02:<br />

EAE6 noe<br />

EAE8 3COE<br />

EAEA 7308<br />

EAft 80C476<br />

U,Ef BODO<br />

EAFI £9£800<br />

1992<br />

1993 K14: ; ALT-TOP-ROW<br />

1994 eM!' AL.2 ~ KEy.wITH 'I' OH IT<br />

1995 JB K35 ; NOT O"'E OF INTERESTING Kt'rs<br />

1996 eMP Al.14 i IS IT IN THE REGION<br />

1997 JAE K35 ; ALT-FUNCTION<br />

J11.198 ADO AH.118 ; COINERT PSUEDO SUN CODt: TO RANGE<br />

1999 MOV Al.O ; INDICATE AS SUCH<br />

2'00'0 JMP K57 ; BUFFER_FILL<br />

2~01<br />

2'002 ;------ TRANSlATt: ALTERNATE SHIFT PSEUDO stAN COMS<br />

2003<br />

EAF4<br />

EAt4 3ClB<br />

EAF6 7303<br />

EAFe<br />

EAF8 ·n63FF<br />

EAFB<br />

UFB lC47<br />

fAFO 73F9<br />

UFF 8863E9<br />

E80-2 E92501<br />

2'0'04<br />

I ALT-FUNCTION<br />

2005 ; TEST FOR IN TAGLE<br />

2006 1 All-CONTINUE<br />

2'0'07<br />

; CtOSE-RET\JIl'N<br />

2008 ; IGNORE THE KEY<br />

2009 I AlT-CONTINUE<br />

2'010 ; IN KEYPAD REGION<br />

2011 ; IF SO. IGNOR'E<br />

2'012 ; AL T SHIFT PSEUDO SCAN TABLE<br />

20ll<br />

; TRANSLATE THAT<br />

2'014<br />

2'015 1--"--- NOT IN ALTERNATE SHIFT<br />

fBOS <br />

£805 F6'06170004 ~ <br />

EBOA 7458<br />

£80C 3C46<br />

[BOE 7513<br />

2'016<br />

2'017 1


LOC OBJ LINE SOURCE<br />

~EB.a<br />

£BI0 881EOO a2b MOV aX.OFFSET KB_BUFFER ; RESET BUFFER TO EMPTY<br />

EBll 891ElADO 2027 MOV BUFFER_HEAD .aX<br />

EB17 891E1COQ 2028 MOV BUFfER_TAIL,ex<br />

EBIS C6067l0060 202~ MOV BIOS_BREAK.SOH ; TURN ON BIOS_BREAK BIT<br />

EBZO CDIS 2030 INT lB. ; BREAK IUTERRUPT VECTm<br />

E822 B80000 2031 NOV AX. 0 ; PUT OUT Dut1HY CHARACTER<br />

E825 £98400 2032 JMP K57 ; BUFFERJIll<br />

201l<br />

2034 K39: I NO-BREAK<br />

EB28 3e45 203-5 CHP AL. HUH_KEY ; LOOK FOR PAUSE KEY<br />

E82A 7521 2036 .... K41<br />

; NO-PAUSE<br />

E5ze 800E180006 2037 O' KBJLAG_l,HOLD_STATE I TURN ON THE HOLD FLAG<br />

Ea31 B020 203a MOV AL.EO! ; ENO Of INTERRUPT TO CONTROL PORT<br />

E833 £620 2039- OUT 020H •.u ....<br />

; ALLOW FURTHER KEYSTROKE IHTS<br />

Z041 ; ------ DURING PAUSE INTERY.AL. TtmN CRT BACK ON<br />

2042:<br />

E835 803£49Q007 2043- CMP CRT_I100E.7 J IS THIS BLACK AND WHITE CARD<br />

EalA 7407 2044 JE K4. J YES, NOTHING TO DO<br />

EBle BAOSQl 2045 MOV DX,03DSH I PORT FOR COLOR CARD<br />

EB1F A06500 204ft AL.CRT_HOOE_SET , GET THE VALUE OF THE CLRRENT tlDDE<br />

""V<br />

EB4Z EE 2047 OUT DX.AL ; SET THE CRT MODE, SO TRAT CRT IS ON<br />

EB43 2048 K40: i PAUSE-lOOP<br />

•••<br />

EM3 F606180008 2049 TEST KBJLAG_l.H.OlO_STATE<br />

EM8 75f9 2050 JHZ ; lOOP UNTIL FLAG TURNED OfF<br />

eB4A E'H6FF 2Ul JMP .27 l INTERRUPT_RETURN_HD_EOI<br />

E840 2052 K41: j NO-PAUSE"<br />

2053 <br />

2054 j ------ TEST SPECIAL CASE KEY 55 <br />

2055 <br />

EB40 3C37 2056 CHP AL.S5 <br />

EB4f 7506 2057 JNE '4Z<br />

J HOT-KEY-55<br />

EBS1 8&4072 2058 MOV AX, 114*256 I START/STOP PRINTING SWITCH<br />

EB54 £98500 2059 JMP '57 ~ BUFFER_FILL <br />

z060 <br />

2061 ; ------ SET UP TO TRANSLATE CONTROL SHIFT <br />

Z062 <br />

~EB57 2063 K42: ; NOT-KEY-55<br />

f857 BB92ES 2064 NOV BX, OFFSET K8 ; SET UP TO TRANSLATE CTL<br />

EeSA 3C3B 2065 tMP Al.59 ; IS IT IN TABLE<br />

ES5C 7303 ....<br />

JAE K43 ; CTl-TABLE-TRANSLATE<br />

E8SE E87890 2067 JMP K56 ; YES. GO TRANSLATE CHAR<br />

....<br />

'861 K43: J tTL-TABLE-TRANSLATE<br />

EB61 B8CCe8 2069 ""V BX,OFfSET 1


LaC OBJ LINE SOURCE<br />

E890 E99700<br />

E893<br />

E693 BBlFE9<br />

E896 E840<br />

E898<br />

EMS F606170020<br />

EB9D 7520<br />

EB9F F606170003<br />

EBA4 7520<br />

EBA6<br />

EBA6 3C4A<br />

EBA8 7408<br />

EBAA 3C4E<br />

EBAC 740C<br />

EBAE 2C47<br />

Eeao BB7AE9<br />

EBBl EBn<br />

EBBS 882D4"<br />

EBB8 E822<br />

EBBA B82B4E<br />

EBBD E~lD<br />

EBBF<br />

EBBF F606170003<br />

EBC4 75EO<br />

EBC6<br />

EBC6 2C46<br />

EBce BB6DE9<br />

EBce EBOB<br />

EBCD<br />

EBCD 3e38<br />

EeCF 7204<br />

EBDI BODO<br />

EBD3 EB07<br />

E8DS<br />

EBDS BBE5E8<br />

EBD8<br />

EBDB FEee<br />

EBDA 2ED7<br />

EBDC<br />

EBDC 3eFF<br />

EBDE 741F<br />

EBED 80FCFF<br />

EeE3<br />

EBES<br />

741A<br />

EBES F606170040<br />

EBEA 7420<br />

EBEC F606170003<br />

2103 JMP K63 I TRANSLATE_SCAN<br />

2104<br />

2105 K47: ; NOT-UPPER-FUNCTION<br />

2106 MOV BX,OFFSET K11 ; POINT TO UPPER CASE TABLE<br />

2107 JMP SHORT K56 ; OK. TRANSLATE TlIE CHAR<br />

2108<br />

2109 ;------ KEYPAD KEYS, HUST TEST HUM LOCK FOR DETERMINATION<br />

2110<br />

2111 K48: ; KEYPAD-REGION<br />

2112 ; ARE WE IN ,,"'UH_LOCK<br />

2113 JNZ KS2 ; TEST FOR SURE<br />

2114 TEST KB_FLAG.LEFT_SHIFT+RIGHT_SHIFT; ARE WE IN SHIFT STATE<br />

2115 JHZ K53 j IF SHIFTED, REALLY HUM STATE<br />

2116<br />

2117 j ------ BASE CASE FOR KEYPAD<br />

2118<br />

2119 K49: j BASE-CASE<br />

2120<br />

2121 eHP AL,74 j SPECIAL CASE FOR A COUPLE OF KEYS<br />

l122 JE K50 ; MINUS<br />

2123 eMP AL,78<br />

2124 JE K51<br />

2125 SUB AL,71 j CONVERT ORIGIN<br />

2126 HOV BX.OFFSET K15 J BASE CASE TABLE<br />

2127 JMP SHORT K64 , CONVERT TO PSEUDO SCAN<br />

2128<br />

2129 K50: HOV AX. 74*256+ '-' j MINUS<br />

2130 JMP SHORT K57 J BUFFERJILl<br />

2131<br />

2132 K51: MOV AX. 781f256+' +' I PLUS<br />

2133 JMP SHORT K57 1 BUFFER_FILL<br />

2134<br />

tllS 1------ MIGHT BE N\.I1 LOCK, TEST SHIFT STATUS<br />

t136<br />

2137 K5t: ; ALMOST-NUt1-STATE<br />

2138 TEST KBJLAG.LEFT_SHIFT+RIGHT_SHIfT<br />

2119 JHZ K4. ; SHIFTED TEMP OUT OF NUt1 STATE<br />

2140<br />

2141 K53: j REALLY_NUr"LSTATE<br />

2142 SUB AL,70 I CONVERT ORIGIN<br />

2143 MOV BX,OFFSET K14 ; NUM STATE TABLE<br />

2144 JMP SHORT K56 , TRANSLATE_CHAR<br />

2145<br />

2146 j------ PLAIN OLD LOWER CASE<br />

2147<br />

2148 K54: ; NOT-SHIFT<br />

2149 eMP AL.59 j TEST FOR FUNCTION KEYS<br />

2150 JB K55 ; NOT-LOWER-FUNCTION<br />

2151 MOV AL.O ; SCAN CODE IN AH ALREADY<br />

2152 JHP SHORT K57 I BUFFER_FILL<br />

2153<br />

2154 K55: j NOT-LOWER-FUNCTION<br />

2155 MOV BX.OFFSET KID j LC TABLE<br />

2156<br />

2157 j------ TRANSLATE THE CHARAC-rER<br />

2158<br />

2159 K56: ; TRANSLATE-CHAR<br />

2160 DEC AL ; CONVERT ORIGIN<br />

2161 XLAT CS:K11 ; CONVERT THE SCAN CODE TO ASCII<br />

2162<br />

2163 ;------ PUT CHARACTER INTO BUFFER<br />

Z164<br />

2165 K57: ; BUFFER-FILL<br />

2166 eMP AL.-l IS THIS AN IGNORE CHAR<br />

2167 JE K5. j YES. DO NOTHING WITH IT<br />

2168 eMP ; LOOK FOR -1 PSEUDO SCAN<br />

2169 JE ; NEAR_INTERRUPT_RETURN<br />

2170<br />

2171 ;------ HANDLE THE CAPS LOCK PROBLEM<br />

2172<br />

2173 K58: I BUFFER-FILL-NOTEST<br />

2174 TEST KBJLAG.CAPS_STATE ; ARE WE IN CAPS LOCK STATE<br />

2175 JZ K61 ; SKIP IF NOT<br />

2176<br />

2177 ; ------ IN CAPS LOCK STATE<br />

2178<br />

2179 TEST KBJLAG. LEFT_SHIFT+RIGHT_SHIFT TEST FOR SHIFT STATE<br />

A-30


LOC OBJ LINE sou RCE<br />

ESFI 740F 2180 JZ K60 ; IF NOT SHIFT. CONVERT LOWER TO LIPPER<br />

2181<br />

2182 ;------ CONVERT ANY UPPER CASE TO LOWER CASE<br />

2183<br />

EBF3 3C41 2184 CMP AL, 'A' ; FIND OUT IF ALPHABETIC<br />

EBFS 7215 2185 JB K61 ; NOT_CAPS_STATE<br />

EBF7 3CSA 2:186 CMP AL. 'Z'<br />

EBF9 7711 2187 JA K61 ; NOT_CAPS_STATE<br />

EBFB 0420 2188 ADD Al, 'a '-'A' ; CONVERT TO LO~ER CASE<br />

fBFO EBOD 2189 JMP SHORT K61 ; NOT_CAPS_STATE<br />

2190<br />

EBFF 2191 K59: ; NEAR-INTERRUPT-RETURN<br />

EBFF E95CFE 2192 JMP KZ6 ; INTERRUPT_RETURN<br />

2193<br />

2194 i -----­ CONVERT ANY LOWER CASE TO UPPER CASE<br />

2195<br />

EC02 2196 K60: ; LOWER-TO-UPPER<br />

EC02 3C61 2197 CMP AL. 'a' ; fINO OUT IF ALPHABETIC<br />

EC04 7206 2198 JB K61 ; NOT_CAPS_STATE<br />

fC06 3C7A 2199 CMP AL, 'z'<br />

EC08 7702 2200 JA 1-',61 ; NOT_CAPS_STATE<br />

EeOA 2e2:0 2201 SUB AL. 'n'-'A' ; CONVERT TO UPPER CASE<br />

2202<br />

Eeoc 2203 K61: ; NOT-CAPS-STATE<br />

Eeoc 2:::04 ; GET THE END POINTER 8BlEICOO MOV BX,BUFFER_TAIl TO THE BUfFER<br />

ECIO BaF3 2205 tiDV SI.eX SAVE THE VALUE<br />

fe12 E860FC 2206 CALL K4 ADVANCE THE TAll<br />

EClS 3BIEIAOO 2207 CIlP BX.BUFFER_HEAD HAS THE BUFFER WRAPPED AROUND<br />

ECl9 7409 2208 JE K62 BUFFER_FUll_BEEP<br />

ECIB 8904 2209 MOV [SI1,AX STORE THE VALUE<br />

ECID 891EICOO 2210 MOV BUFFER_TAIL,eX 1 MOVE THE POltHER UP<br />

Ee21 E93AFE 2211 JMP K26 INTERRUPT_RETURN<br />

2212<br />

2213 BUFFER IS FUll, somm THE ;------ BEEPER<br />

2214<br />

[C24 2215 K62: BUFFER-FUll-BEEP<br />

~ EC24 f80DOO 2216 CALL ERROR_BEEP<br />

Ee27 E934FE 2217 K'6<br />

2218<br />

2219 TRANSLATE SCAN FOR ;------ PSEUDO SCAN CODES<br />

2220<br />

Ee2A 2221 K63: j TRANSLATE-SCAN<br />

EC2A 2222 ; CONVERT ORIGIN 2C38 SUB AL,59 TO FUNCTION KEYS<br />

felt 2223 K64: I TRANSlATE-SCAtl-ORGD<br />

fe2t 2ED7 2224 XlAT CS:K9 ; CTL TABLE SCAN<br />

Eelf BAED 2225 MOV AH,AL ; PUT VALUE INTO AH<br />

EC30 BODO 2226 MOV AL.e ; ZERO ASCII CODE<br />

EC32 EBA8 2227 JHP KS7 ; PUT IT INTO THE BUFfER<br />

2228<br />

2229 EflOP<br />

I


LOC 08J LINE SOURCE<br />

2255 ;-- INT 13 ---------------------'------------­<br />

2256 ;DISKETTE 1/0<br />

2257 THIS INTERFACE PROVIDES ACCESS TO THE 5 1/4" DISKETTE DRIVES<br />

2.258 ; INPUT<br />

2259 (AH };;Q RESET DISKETTE SYSTEM<br />

2260 HARD RESET TO NEC, FREPARE COMMAND. RECAL REQD ON ALL DRIVES<br />

2261 (AHI=l READ THE STATUS OF THE SYSTEM INTO (All<br />

2262 DISKETTE_STATUS FROM LAST OP'" IS USIO<br />

2263 REGISTERS FOR P.EAO/WRITE/vERIFY/FORMAT<br />

2264 (OLI - DRIVE NUtlBER (0-3 ALLOWED, VALUE CHECKED)<br />

22:65 {DHI ~ HEAD ~ruMBER (0-1 ALLOWEn, I\'OT VALUE CHECKED)<br />

2266 (CH) - TRACK NUtlBER (0-39, t.'OT VALUE CHECKEO)<br />

22:67 (eL) - SECTOR truMBER f 1-8, NOT VALUE CHECKEO)<br />

2268 fAll - NUMBER OF SECTORS ( MAX ;; 8, NOT VALUE CHECK EO)<br />

2269<br />

2270 (ES:BX) - ADDRESS OF BUffER ( NOT REQUIRED FOR VERIFY)<br />

2:271<br />

2272 (AH )=2: READ THE DESIRED SECTOOS INTO MEMORY<br />

2273 «AH )=3 WRITE HlE DESIRED SECTORS FROM HEMORY<br />

2274 (AH 1=4 VERIFY THE DESIRED SECTORS<br />

22:75 (AH);:5 FORMAT THE DESIRED TRACK<br />

2276 FOR THE fORMAT OPERATlm" THE BUFFER POINTER (ES,BXI MUST<br />

2277 POINT TO THE COLLECTIOH OF DfSIRED ADDRESS FIElDS FOR THF.:<br />

22:78 TRACK. EACH FIELD IS CQtlPOSED OF 4 BYTES. (C,H,R,NI, WHERE<br />

2279 C ;; TRACK HUMBER, H=HEAD NUMBER, R ;; SECTOR NUMBER, N= NUMBER<br />

2280 OF BYTES PER SECTOR ("00=128, 01=256, 02=512. 03=1024,)<br />

2281 THERE MUST BE ONE ENTRY FOR EVERY SECTOR ON THE TRACK.<br />

USZ<br />

2:283 READ/WRITE ACCESS.<br />

2284 ; DATA VARIABLE -­ DISK_POINTER<br />

THIS INFORMATION IS USED TO Fum THE REQUESTED SECTOR DURING<br />

~28S DOUBLE WORD POINTER TO THE CURRENT SET OF DISKETTE PARAMETERS<br />

2286 ; OUTPUT<br />

2287 AH = STATUS OF OPERATION<br />

2288 STATUS BITS ARE DEfINED IN THE EQUATES fOR DISKETTE_STA,TUS<br />

2289 VARIABLE IN THE DATA SEGMENT OF THIS NODULE<br />

EC59<br />

EC59 fB<br />

ECSA 53<br />

Ee58 51<br />

ECSC IE<br />

Ee50 56<br />

ECSE 57<br />

ECSF 55<br />

EC60 52<br />

EC61 8BEt<br />

EC63 8E4000<br />

EC66 BEDf<br />

EC68 f81COO<br />

EC6B 6B0400<br />

EC6E ESFFO}<br />

Ee7l e8264000<br />

Ee75 8A264100<br />

EC79 80FCO)<br />

Ee7t FS<br />

EC7D SA<br />

Ee7E 50<br />

[e7F SF<br />

EC8Q Sf<br />

EC8l IF<br />

Ee62 59<br />

Ecel 58<br />

E(84 CA0200<br />

Ee87<br />

2290<br />

2291<br />

2292<br />

2293<br />

2294<br />

2295<br />

2296<br />

2297<br />

2296<br />

2299<br />

2300<br />

2301<br />

2302<br />

2303 PROC FAR<br />

2304<br />

2]05 ex<br />

2306 ex<br />

2307 os<br />

2308 51<br />

Z309 01<br />

2310 BP<br />

2311 ox<br />

2312 BP.SP<br />

e313<br />

SI,DATA<br />

2314 OS,SI<br />

2315 Jl<br />

2316 BX,4<br />

2317<br />

2318<br />

2319<br />

2320 eMP AH,J ; SET THE CARRY fLAG TO INDICATE<br />

2321 eMe I SUCCESS OR FAILURE<br />

2322 POP ox i RESTORE ALL REGISTERS<br />

232:3 POP BP<br />

2324 POP 01<br />

2325 POP 51<br />

2326 POP OS<br />

2327 POP CX<br />

2328 POP BX ; RECOVER ADDRESS<br />

2329 RET ; THROW AWA'( SAVED FLAGS<br />

2330 DISKETTE_IO E~mp<br />

2:331 Jl PROC ~lEAR<br />

A-32


LOC OBJ LINE SOURCE<br />

EC87 BA.fO<br />

EC89 60l63F007F­<br />

EceE 0"E4<br />

£C90 7427<br />

£C92 FEte<br />

EC94 7474<br />

EC96 C606410000<br />

~ EC9B eOFA04<br />

EC9E 7313<br />

ECAO FEte<br />

feA,l 746A.<br />

ECA4 FEte<br />

ECA6 7503<br />

2:5'32 HOV OH,Al '; SAVE. SECTot;!S IN DH<br />

2333 AND ;. INDICATE A READ OPERATION<br />

2334 OR AH,AH • AH=O<br />

,335 JZ DISK_RESET<br />

U16 DEC AH ; AH=l<br />

2337 JZ DISK_STATUS<br />

2:336 HOV ; RESET THE STATUS INDICATOR<br />

2339 CMP Dl.4 I TEST FOR DRIVE IN 0-3 RANGE<br />

2340 JAE J3 ; ERROR IF ABOVE<br />

2341 DEC AH i AH=2:<br />

2342 JZ nISK_READ<br />

2343 DEC AH ; AH=3<br />

2344 JHZ<br />

J'<br />

; TEST_DISK_VERF<br />

ECAB £99600<br />

ECAB<br />

2:345 JMP<br />

2346 J2 :<br />

eCAB FEte<br />

feAD 7468<br />

fCAF FEte<br />

feel 7468<br />

Eee3<br />

ECB3 C6064100111<br />

ECBS C3<br />

EC59<br />

ECB9 BAFZ03<br />

fCBC FA<br />

EeeD A03FOO<br />

feeD BI04<br />

eeel OZEO<br />

Ece4 A82:0<br />

£CC6 750C<br />

fees A,840<br />

ECCA 7506<br />

Ecce A860<br />

ECCE 7406<br />

EeDO FEtO<br />

ECD2 FEtD<br />

ECD4 FE.tD<br />

fCD6 oe08<br />

ECOB EE<br />

ECD9 C6063£0000<br />

ECDE C606410000<br />

feEl OC04<br />

fees EE<br />

fCEb FB<br />

ftE7 £8280Z<br />

EeEA A04200<br />

fCED 3etO<br />

EceF 7407<br />

fCFI 600£410020<br />

ECF6 EBII<br />

ECFa<br />

ECFe 8403<br />

fCFA £84701<br />

fCFO 880100<br />

EDOO E86DOl<br />

E003 880300<br />

fD06 £86701<br />

£009<br />

£P09 C1<br />

fDOA<br />

EDOA A04100 ,<br />

EDOO C3<br />

2347 DEC<br />

2348 JZ<br />

2349 DEC AH ; AH=S<br />

2350 JZ DISKJORf1AT<br />

2:351 J3:<br />

2352 NOV DISKETTE_STATUS.BAD_CND i ERROR CODE. NO SECTORS TRANSFERRED<br />

2353 RET ; UNDEFINED OPERATION<br />

2354 Jl ENDP<br />

2355<br />

2356 ;------ RESET THE DISKETTE SYSTEM<br />

2357<br />

2358 PROC HEAR<br />

2359 MOV DX.03FZH ; ADAPTER CONTROL PORT<br />

2360 CLl '; NO INTERRUPTS<br />

2361 MOV AL,MOTOR_STATUS I WHICH MOTOR IS ON<br />

236Z HOV CL.4 ; SHIFT CCU~T<br />

2363 SAL AL.CL ; MOVE MOTOR VALUE TO HIGH HYBBLE<br />

2364 TEST Al, tOH I SElECT CORRESPOHOIHG DRIVE<br />

2365 JNZ J5 I JUMP IF MOTOR ONE IS Ot~<br />

2366 TEST AL. 40H<br />

2367 JHZ J4 1 JUMP IF HOTOR TWO IS ON<br />

2:368 TEST AL. SOH<br />

2:369 JZ J6 ; JUMP IF MOTOR ZERO IS ON<br />

2370 IHC Al<br />

2371 J4: ItIC Al<br />

2372 J5: IIle Al<br />

2373 J6: OR AL,S j TURN ON INTERRUPT EHABlE<br />

2374 OUT OX,AL ; RESET TH~ AnAPTER<br />

2375 MOV SEEK_STATUS, 0 ; SET RECAl REQUIRED ON ALL DRIVES<br />

2376 MOV DISKETTE_STATU5.0 j SET OK STATUS FOR DISKETTE<br />

2.377 OR Al.4 ; TURN OFF RESET<br />

2378 OUT DX.Al , TURN OFF THE RESET<br />

2379 STI ; RHNABlE THE INTERRUPTS<br />

2380 CALL CHK_STAT3 ; DO SENSE INTERRUPT STATUS FOLLOWING RESET<br />

USI MOV AL.NEC_STATUS IGNORE ERROR RETURN AND 00 OWN TEST<br />

uat CNP AL,OCOH I TEST FOR DRIVE READY TRANSITION<br />

U83 JZ J7 ; EVERYTHING OK<br />

2384 OR OISKETTE_STATUS.BAO_NEC ; SET ERROf;! CODE<br />

2385<br />

JMP<br />

"..<br />

SHORT J8 ; RESET_RET<br />

2387 ;------ SEND SPECIFY CotR1ANO TO HEC<br />

2388<br />

2389 J7: ; DRIVE_READY<br />

2390 MOY AH,03H ; SPECIFY COMMAND<br />

2391 CALL NEC_OUTPUT ; OUTPUT TH E COMMAND<br />

2:392 MaV ex.l ; FIRST BYTE PARM IN BLOCK<br />

2393 CALL GET_PARM ; TO THE NEe COtHROLLER<br />

2394 MOV I SECOND BYTE PARtl IN BLOCK<br />

2395 CALL ; TO THE NEC COIHROLLER<br />

2396­ 1 RESET_RET<br />

J8:<br />

2397 RET ; RETURN TO CALLER<br />

2398 ENDP<br />

2399<br />

2400 ;------ DISKETTE STATUS ROUTINE<br />

2401<br />

2402 PROC NEAR<br />

2403 NOV AL. DISKETTE_STATUS<br />

2404<br />

2405­ ENDP<br />

2406<br />

A-33


LOC OS! LINE SOURCE<br />

2407 ;------ DISKETTE READ<br />

2408<br />

EOOE 2409 PROC NEAR<br />

EDOE 8046 2410 Al,046H ; READ COMNAHO fOR DNA<br />

E010 2411 J9: t DISK_READ_CONT<br />

EOIO ESMOl 2412 CALL DHA.SETUP • SET UP THE DNA<br />

EOll 8466 ~413 HOV AH,066H SET UP READ COMMAND FOR NEe CONTROLLER<br />

E015 EB16 2414 JMP SHORT RW.OPN ; GO 00 THE OPERATION<br />

:415 ENDP<br />

2416<br />

2411 ; -----­ DISKETTE VERIFY<br />

2418<br />

E017 2419 DISK_VEPF PROC NEAR<br />

E017 8042 2420 ~10V Al.0421" ; VER I F Y COMMAND FOR OMA<br />

E019 ESF5 2421 JMP J9 ; DO AS IF DISK READ<br />

2422 DISK_VERF EtfDP<br />

2423<br />

;------ DISKETTE FORNAT<br />

2425<br />

EDIB 2426 DISK]ORHAT PROC NEAR<br />

EOIB 800E3FOOSO 2421 OR HOTOR_STATUS.80H ; IHDICATE WRITE OPERATION<br />

EOZD B04A 2428 NOV AL,04AH 1 WILL WRITE TO THE DISKETTE<br />

£022 £8A701 2429 CALL OHA_SETUP j SET UP THE DNA<br />

E025 8440 2430 May AH,04DH ; ESTABLISH THE FORMAT COMMAHD<br />

EDZl EB24 2431 JMP SHORT RW_OPN ; DO THE OPERATION<br />

E029 2432 JIO: ; CONTINUATION OF RW_OPN FOR FMT<br />

E029 880700 2433 HOV BX,7 ; GET THE<br />

Eoze E84101 2434 CALL GET.PARM ; BYTES/SECTOR VALUE TO NEe<br />

EDlF 680900 2435 MOV BX,9 ; GET HIE<br />

EDll E83BOI 2436 CALL GET.PARM j SECTORS/TRACK VALUE TO NEC<br />

E035 BBOFOO 2437 HOV BX,15 ; GET THE<br />

E038 E83501 2438 CAll GET_PARM j GAP LENGTH VALUE TO NEC<br />

E03B B81100 2439 MOV BX,17 j GET THE FILLER BYTE<br />

EDlE E9ABOD 2440 JMP JI6 ; TO THE CONTROLLER<br />

2441 DISK]ORMAT ENDP<br />

2442<br />

2443 ;------ DISKETTE WRITE ROUTINE<br />

2444<br />

E041 2445 PROC NEAR<br />

E041 800E3FOD80 2446 OR MO rOR_STATUS ,80H ; IHDICATE WRITE OPERATION<br />

E046 8044 2447 MOV AL.04AH j DNA lomITE COMMAND<br />

f048 E88101 2448 CAL l DHA_SETUP<br />

E04S 8445 2449 MOV AH ,045H ; NEC COHHAt.lD TO WRITE TO DISKETTE<br />

2450 ENOP<br />

2451 ;----- ALLOW WRITE ROUTINE TO FALL INTO RW_OPN<br />

2452 i --------------------­------------­----­<br />

2453 ; RW.OPN<br />

2454 THIS ROUTINE PERFORMS THE READ/WRITE/VERIFY OPERATION<br />

2455 ; .-------­- --­---­ - - -------------------­<br />

E040 2456<br />

£040 7308 2457 JNe JII TEST FOR DMA ERROR<br />

E04f C606410009 2458 May DISKETTE_STATUS,DMA_BOUNDARY i SET ERROR<br />

ED 54 BODO 2459 MOV Al.O ; NO SECTORS TRANSFERRED<br />

EDS6 C] 2460 RET ; RETURN TO HAIN ROUTINE<br />

E057 2461 Jll: I DO_RW_OPN<br />

ED57 50 2462 PUSH AX ; SAVE THE COMMAND<br />

2463<br />

2464 ; -----­ TURN ON THE MOTOR AND SelECT THE DRIVE<br />

2465<br />

EO 58 51 2466 PUSH ex I SAVE THE T/S PARNS<br />

EDS9 SACA 2467 May Cl.Ol j GET DRIVE NUMBER AS SHIfT COUNT<br />

ED58 B001 2468 May Al,} I MASK FOR DETERMINING MOTOR BIT<br />

Ease 02EO 2469 SAL Al.Cl ; SHIFT THE MASK BIT<br />

EOSF FA 2470 eLI ; NO ItHERRUPTS WHILE DETERMINING MOTOR STATUS<br />

E060 C6064000FF 2471 May MOTOR_COUNT,OFFH ; SET LARGE COUNT DURUIG OPERATION<br />

E065 84063FOQ 2472 TEST AL,110TOR_STATUS ; TEST THAT MOTOR FOR OPERATING<br />

E069 7531 2473 J~IZ J14 ; IF RUNHING, SKIP THE WAIT<br />

EDbB e0263FOOfO 2474 AND I1OTOR_STATUS.OFOH ; TURN DFF ALL MOTOR BITS<br />

£070 08063FOO 2475 OR MOTOR_STATUS,AL j TURN ON THE CURRENT MOTOR<br />

£074 FB 2476 STI ; INTf.RRUPTS BACK ON<br />

E075 BOlO 2:477 MOV AL,IOH ; ~1ASK BIT<br />

Eon 02EO 2478 SAL Al,CL ; DEVelOP BIT MASK FOR MOTOR EHABLE<br />

£079 04C2 2479 OR AL.Ol ; GET (JRIVE SELECT BITS IN<br />

E078 oeoe 2480 OR AL,OCH ; NO RESET, EIIABLE DNA/INT<br />

f07D 52 2481 PU5H ox ; SAVE REG<br />

E07E SAFl03 248~ MOV DX.03F2H ; CO~HROL PORT ADDRESS<br />

E081 EE 2483 OUT DX,Al<br />

A-34


LOC OBJ LINE SOU-RCE<br />

~<br />

f082: 5A 2464<br />

2485<br />

E08l F60b3F0080<br />

EO&6 7412<br />

EDBA B81400<br />

EDeD E8EOOO<br />

£090 0.4.£4<br />

E092<br />

Eon 7408<br />

E094 2BC9<br />

E096 E2FE<br />

ED98 FEce<br />

ED9A fBF6<br />

EDge<br />

EDge FB<br />

ED90 59<br />

ED9E £8EOOO<br />

EoAl 58<br />

fOAl 8AFe<br />

EDA4 6600<br />

EDAb 7246<br />

EDA8 BEF1ED90<br />

EOAe 56<br />

EDAD E89400<br />

EDBD 8A6601<br />

EoB3 DOE4<br />

EoBS 00E4<br />

EOB7 80£404<br />

EDBA OAE2<br />

EDBC E86500<br />

EDBF 60FF4D<br />

£oe.2 7503<br />

EDC4 E96ZFF<br />

EOC7 BAES<br />

Eoe9 £87800<br />

Eoce 8MbOl<br />

EOCF f87200<br />

E002 8AEl<br />

EDD4 E86000<br />

E007 B60700<br />

EDDA E89300<br />

EOoD B60900<br />

£OEO £88000<br />

EDEl 860600<br />

EDE6 f88700<br />

EOE9 eeoooo<br />

fDEC<br />

EDEC E88100<br />

EDEF 5f<br />

fDFO £84001<br />

EOFl<br />

EOF3 7245<br />

EDFS £67301<br />

fDFS 7.23F<br />

EOFA Fe<br />

EDFB 6£4200<br />

EOFE AC<br />

EOFF 24eo<br />

2486<br />

2487<br />

2488<br />

2489<br />

2490<br />

2491<br />

2492<br />

2493<br />

2494<br />

2495<br />

2496<br />

2497<br />

2:498<br />

2499<br />

2500<br />

2501<br />

2502<br />

2503<br />

2504<br />

2505<br />

2506<br />

Z507<br />

2508<br />

Z50~<br />

Z510<br />

Z511<br />

2512<br />

2513<br />

2514<br />

2515<br />

2516<br />

2517<br />

2518<br />

2519<br />

2520<br />

2521<br />

2522<br />

2523<br />

2524<br />

2525<br />

2526<br />

2527<br />

2528<br />

2529<br />

2530<br />

2531<br />

2532<br />

2533<br />

2534<br />

2535<br />

2536<br />

2537<br />

2538<br />

2539<br />

2540<br />

2541<br />

~542<br />

2543<br />

2544<br />

2545<br />

2546<br />

2547<br />

2548<br />

254';1<br />

2550<br />

2551<br />

2.552<br />

2553<br />

2.554<br />

2555<br />

2556<br />

2557<br />

2558<br />

2559<br />

2560<br />

POP ox ; RECOVER REGISTER'S<br />

;------ WAIT FOR MOTOR' IF WRITE OPERATION<br />

J12:<br />

J13:<br />

J14:<br />

TEST<br />

JZ<br />

MaV<br />

CALL<br />

DR<br />

JZ<br />

SUB<br />

lOOP<br />

DEC<br />

JMP<br />

STI<br />

POP<br />

MOTOR.:,.STATUS.80H<br />

J14<br />

BX.20<br />

GET_PARH<br />

AH.AH<br />

Jl4<br />

cx.ex<br />

J13<br />

AH<br />

Jlt<br />

ex<br />

~------ 00 THE SEEK OPERATION<br />

; IS THIS A WRITE<br />

; NO. CONTINUE WITHOUT WAIT<br />

; GET THE MOTOR WAIT<br />

; PARAMETER<br />

; TEST FOR NO WAIT<br />

; TEST_WAIT_TIME<br />

; EXIT WITH TItlE EXPIRED<br />

; SET UP 1/8 SECOND LOOP TIME<br />

; WAIT FOR THE REQUIRED TIME<br />

; DECREMENT TIME YALUE<br />

; ARE WE DONE YET<br />

; MOTOR_RUNNING<br />

INTERRUPTS BACK ON FOR BYPASS WAIT<br />

CAll SEEK ; MOVE TO CORRECT TRACK<br />

POP AX ; RECOVER COMMAUO<br />

NOV BH, Aft l SAVE COH11AND IN BH<br />

HOV DH.O ; SET NO SECTORS READ IN CASE OF ERROR<br />

JC J 17 ; IF ERROR. THEt! EXIT AFTER MOTOR Off<br />

MOV 51 ,OffSET J17 ; DUMMY RETURN ON STACK FOR ~IEC_OUTF'UT<br />

PUSH 51 ; SO THAT IT WILL RETURN TO MOTOR Off LOCATION<br />

}------ SEND OUT THE PARAMETERS TO THE CONTROllER<br />

CALL<br />

MOY<br />

SAL<br />

SAL<br />

AIm<br />

OR<br />

NEC_OUTPUT<br />

AH,[ BP+ II<br />

AH,l<br />

AH.l<br />

AH.4<br />

AH.DL<br />

j------ TEST FOR FORMAT COMMAND<br />

JlS~<br />

J16:<br />

eMP<br />

Jt~E<br />

JMP<br />

MOV<br />

CALL<br />

MOV<br />

CALL<br />

MOV<br />

CALL<br />

MOV<br />

CAll<br />

MOV'<br />

CALL<br />

MOY<br />

CALL<br />

nov<br />

6H .04DH<br />

JIS<br />

JIO<br />

AH,CH<br />

AH, [BPtl J<br />

NEe_OUTPUT<br />

AH,CL<br />

NEC_OUTPUT<br />

BX.7<br />

GET _PARM<br />

BX.9<br />

GET_PARM<br />

BX,Il<br />

GET_PARM<br />

BX.13<br />

CALL GET_PARM<br />

POP 51<br />

;------ LET THE OPERATION HAPPEN<br />

J17:<br />

CALL<br />

Je<br />

CALL<br />

Je<br />

J21<br />

RESULTS<br />

J20<br />

; OUTPUT THE OPERATION COMMANO<br />

I GET THE CURRENT HEAD NUMBER<br />

j MOVE IT TO BIT 2<br />

; ISOLATE THAT BIT<br />

; OR IN. THE OP.IVE NUMBER<br />

I IS THIS A fORMAT OPERATION<br />

; NO. CONTINUE WITH R/W/V<br />

; IF SO. HAt.fDlE SPECIAL<br />

; CYlINDER NUMBER<br />

HEAD NUt1BER FROM STACK<br />

SECTOR NUMBER<br />

; BHES/SECTOR PAPM FROM BLOCK<br />

TO THE NEe<br />

i EOT PARM FRaN BLOCK<br />

I TO THE NEe<br />

; GAP LEHGTH PARI1 FROM BLOCK<br />

i TO THE NEe<br />

j OTl PARM fRCi~ BLOCK<br />

; Rll_OFt~_FItHSH<br />

; TO THE NEC<br />

CAN NOW DISCARD THAT DUHtI'f RETlIRN ADDRESS<br />

I WAIT FOR THE INTERRUPT<br />

; MOTOR_OFF<br />

; LOOK FOR ERROR<br />

; GET THE NEC STATUS<br />

; LdaK fOR ERROR<br />

;------ CHECK THE RESULTS RETURNED BY THE CONTROllER<br />

; set THE CORRECT DIRECTION<br />

CLD<br />

MOV 51 ,OFFSET NEC_STATUS ; porNT TO STATUS FIElD<br />

LODS NEC_STATUS<br />

; GET STO<br />

AND Al.OCOH ; TEST fOR NORMAL TERMINATION<br />

A-35


lOC OBJ LINE SOURCE<br />

(Eol 7438<br />

fE03 3C40<br />

EEOS 1529<br />

EE07 AC<br />

EE08 ODED<br />

EEOA 8404<br />

EEOC 7224<br />

EEOE OOEO<br />

EEIO ODED<br />

Efl2 8410<br />

EE14 721C<br />

EE16 DOEO<br />

EElS 8408<br />

EEU 7216<br />

EEle OOEO<br />

EElf OOEO<br />

Ef20 8404<br />

EE22 nOE<br />

E:E24 ODED<br />

EE26 6403<br />

EEM nOB<br />

EEZA OOEO<br />

EEzt 8402<br />

EEZE 72:02:<br />

EnD<br />

EE30 8.20<br />

EE32<br />

ED2 06264100<br />

EE36 E67701<br />

EEl9<br />

EE39 C3<br />

EE3A<br />

EE3A E82E01<br />

EE3D C3<br />

EnE<br />

EDE E86FOl<br />

EE"1 32E4<br />

£E43 C3<br />

EE44<br />

EE44 52<br />

EE45 51<br />

EE46 BAF401<br />

EE49 33C9<br />

EE48<br />

EE48 EC<br />

EE4C A840<br />

E£4E 740C<br />

EESO E2:f9<br />

fE5,<br />

2561 JZ<br />

2562 CtlP Al,040H j TEST FOR ABNORMAL TERMINATION<br />

2563 JHZ JI8 j NOT ASNORHAl, BAD NEe<br />

2564<br />

2565 1------ AE'.NORMAl TERMINATION, FIND OUT WHY<br />

2566<br />

2:567 lOoS NEC_STATUS ; GET STl<br />

2568 SAL AL,I , TEST FOR EaT FOUND<br />

2569 HOV AH .RECORD_NOT_FND<br />

2570 JC JI. ; RWJAIL<br />

2571 SAL AL.I<br />

ZS7Z SAL AL,l ; TEST FOR CRC ERROR<br />

2573 HOV AH.BAD_CRC<br />

2574 JC JI. • RWJAIL<br />

2575 SAL ALol i TEST FOR DttA OVERRUN<br />

2576 HOV AH.BAD_DMA<br />

2.577 JC JI.<br />

2:578 SAL AL,I<br />

2579 SAL At,l TEST FOR RECORD HOT FOUND<br />

2560 MOV AH,RECORD_NOTJHD<br />

2561 JC JI. ; RWJAIL<br />

2!i9.2 SAL AL,t<br />

2583 HOV AH ,WRITE]ROTECT<br />

2564 JC Jl9 ; RWJAIL<br />

2585 SAL AL.l ; TEST HISSING ADDRESS HARK<br />

25&6 HOV AH ,BAD_ADDR_ttA~K<br />

2587 Je JI' ; RWJAIL<br />

2568<br />

2569 j------ NEC MUST HAVE FAILED<br />

2S'i'D<br />

2591 JI8: ; RW-NEe-FAIL<br />

2592 HOV<br />

ZS93 J19: : RW-FAIL<br />

2594 OR DISKETTE_STATUS ,AH<br />

2595 CALL NUM_TRANS I HOW HAtty WERE REALLY TRANSFERRED<br />

2596 J20: ; FlN_H!R<br />

2597 RET ; RETURN TO CALLER<br />

ZS98<br />

2599 J21: ; RN_ERR_RES<br />

2&00 CALL RESULTS ; FLUSH THE RESULTS BUFFER<br />

2601 RET<br />

2602<br />

2603 ~------ OPERATION WAS SUCCESSFUL<br />

260'4<br />

260'5 J22: ; OPH_OK<br />

260'6 CALL NUM_TRANS ; HOW HANY GOT HOVED<br />

2607 XOR AH,AH ; NO ERRORS<br />

26()8 RET<br />

260'9 RW_OPN ENDP<br />

261 () ; -------------------------------------------­<br />

2611 ; NEC_OUTPUT<br />

2612 THIS ROUTINE SEttOS A BYTE TO THE HEC CONTROLLER<br />

2613 AFTER TESTING FOR CORRECT DIRECTION AND COHTROLlER READY<br />

2:614 THIS ROUTINE WIll TIHE OUT IF THE BYTE IS NOT ACCEPTED<br />

2:615 WITHIN A REASONABLE AHOUNT OF TIttE. SETTING THE DISKETTE STATUS<br />

2:616 ON COMPLETION<br />

2:617 INPUT<br />

2618 (AH) BYTE TO BE OUTPUT<br />

2:619 OUTPUT<br />

2:620 CY = 0 SUCCESS<br />

2621 CY = 1 FAILURE -- DISKETTE STATUS UPDATED<br />

262:2 IF A FAILVRE HAS OCCURRED. THE RETURN IS MADE ONE LEVEL<br />

2623 HIGHER THAN THE CALLER OF NEC_OUTPUT<br />

2624 THIS REMOVES THE REQUIREMENT OF TESTING AFTER EVERY CALL<br />

2:62:5 OF NEC_OUTPUT<br />

2:626 (At) DESTROYED<br />

262:7 ; ---------------------- - --------------------­<br />

2:62:8 NEC_OUTPUT !"ROC NEAR<br />

2:629 PUSH ox ; SAVE REGISTERS<br />

2630 PUSH ex<br />

2:631 HOV DX,O'3F4H ; STATUS PORT<br />

XOR CX,CX ; COUNT FOR TIME OUT<br />

"'2<br />

2633 J23:<br />

2:634 It. Al,ox ; GET STATUS<br />

2635 TEST AL,040H ; TEST DIRECTION BIT<br />

2:636 JZ J25 ; DIRECTION OK<br />

2637 LOOP J2J<br />

2638 J2:4: TIME_ERROR<br />

A-36


LOC OBJ LINE SOURCE<br />

r""\<br />

EE52: 800£410080 2639 OR oISKETTE_STATUS. TIME_OUT<br />

££57 59 2640 POP CX<br />

EE58 SA 2641 POP OX ; SET ERROR CODE AND RESTORE REGS<br />

EES9 56 2.642 POP AX ; DISCARD THE RETUF!N ADDRESS<br />

EESA F9 2643 STC ; INDICATE ERROR TO CALLER<br />

EES9 C3 2644 Rn <br />

2645 <br />

EESC 2646 J25: <br />

EESC 33C9 2647 XOR cx.cx ; RESET THE COUUT <br />

EESE 2648 J26: <br />

EESE EC ~649 IN .u,ox ; GET THE STATUS<br />

EESF AB80 2650 TEST AL.OBOH J IS IT READY<br />

fE61 7504 2651 J"" J27 I YES. GO OUTPUT<br />

fE63 E2F9 2652 LOOP J2. J COUNT omm AHD TRY AGAIN<br />

fE65 EBEB 2653 J"P J2' J ERROR CONDITION<br />

fE67 2654 J2:7: ; OUTPUT<br />

fE67 84C4 2655 t10V AL,AH • GET BYTE TO OUTPUT<br />

E£69 BAF501 2656 ""V DX,03F5H ; DATA PORT<br />

Efbe EE 2657 OUT OX.AL ; OUTPUT THE BYTE<br />

EE60 59 2:658 POP CX ; RECOVER REGISTERS<br />

fE6E 5A 2659 POP OX<br />

EE6F C3 2.660 Rn ; CY = 0 FROM TEST INSTRUCTION<br />

2661 NEt_OUTPUT ENOP<br />

2662 ; -----------------------------------------­<br />

2663 ; GET_PARM<br />

2664 I THIS ROUTINE fETCHES THE IHOEXED POINTER FROM<br />

2665 I THE DISK_BASE BLOCK POINTED AT BY THE DATA<br />

2666 I VAF!IABLE DISK_POINTER<br />

2667 ; A eYTE FROM THAT TABLE IS THEN HOVED INTO AH,<br />

2668 ; THE INDEX OF THAT BYTE BEING THE PARrt IN ex<br />

2669 ; ENTRY -­<br />

2670 BX = INDEX OF BYTE TO BE FETCHED * 2<br />

2671 IF THE lOW BIT OF ex IS ON. THE BYTE IS IMMEDIATELY<br />

2672 OUTPUT TO THE NEC CONTROLLER<br />

2673 EXIT -­<br />

2674 AH = THAT BYTE fROM BLOCK<br />

2675 ; -------------------------------------------­<br />

r""\<br />

EE70 2676 GET_PARl1 PROC t~EAR <br />

E£70 IE 2677 PUSH as SAVE SEGMENT <br />

EE71 2BCO 2678 SUB AX.AX J ZERO TO AX <br />

EE73 8E08 2679 "OV OS,AX<br />

2680 ASSUME OS:ABSO<br />

E£75 C5367800 2681 LOS 51 ,DISK_POINTER ; POINT TO BLOCK<br />

EE79 DIES 2682 SHR ax,l ; DIVIDE BX BY 2. AND SET flAG FOR EXIT<br />

EE7B 8A20 2683 "OV AH,lSI+BXl ; GET THE WORD<br />

EE7D IF 2684 POP OS j RESTORE SEGMENT<br />

r""\<br />

268S ASSUME OS:OATA<br />

EE7E 72C4 2686 JC NEC_OUTPUT ; IF FLAG SET, OUTPUT TO CONTROLLER<br />

EE80 C3 2687 RET ; RETURN TO CALLER<br />

2688 GET_PARI1 ENOP<br />

2689 ;-------------------------------------------­<br />

2690 ; SEEK<br />

2691 THIS ROUTINE WILL MOVE THE HEAD ON THE NAMED DRIVE<br />

2692 TO THE NAMED TRACK. IF THE DRIVE HAS NOT BEEN ACCESSED<br />

2693 SINCE THE DRIVE RESET COMMAND WAS ISSUED, THE DRIVE WILL BE<br />

2694 RECALIBRATED.<br />

2695 ; INPUT<br />

.2:696 (DU = DRrVE TO SEEK ON<br />

2697 (CH) = TRACK TO SEEK TO<br />

2698 ; OUTPUT<br />

2699 CY = 0 SUCCESS<br />

2700 CY = 1 FAILURE -- DISKETTE_STAn../S SET ACCORDINGLY<br />

2701 (AX I DESTROYED<br />

2702 ; ---------------------------------- ---------­<br />

EE81 2703 SEEK PROC HEAR<br />

EE8l· 8001 2704 MV AL,1 ; ESTABLISH MASK fOR RECAL TEST<br />

EE63 51 2705 PUSH CX ; SAVE INPUT VALUES<br />

EE84 8ACA 2706 ""V CL,OL ; GET DRIVE VALUE INTO CL<br />

EE86 D2CO 2707 ROL AL,CL ; SHIFT IT BY THE DRIVE VALUE<br />

EE88 59 2708 POP CX ; RECOVER TRACK VALUE<br />

EE89 84063EOO 2709 TEST AL,SEEK_STATUS ; TEST FOR REeAL REQUIRED<br />

EE8D 7513 2710 JIlZ J2. -; NO_RECAl<br />

EE8F 06063EOO 2711 OR SEEK_STATUS,AL ; TURn ON THE HO RECAL BIT IN FLAG<br />

EE93 6407 2712 "OV AH ,07H i RECALIBRATE COMMAND<br />

EE95 E6ACFF 2713 CALL NEC_OUTPUT<br />

EE98 6AE2 2714- "OV AH,DL<br />

EE9A E6A7FF 2715 CALL tlEC_OUTPUT ; OUTPUT THE DRIVE HUMBER<br />

A-37


LOC OBJ LINE SOURCE<br />

Ef'tD £67200 2716 CAll CHK_STAT_2 ; GET THE INTERUPT AND SENSE INT STATUS<br />

fEAG 7229 2717 JC J32 ; SEEK_ERROR<br />

2718<br />

fEA2 2721 J28:<br />

2719 ;----­ DRIVE IS IN SYHCH WITH CONTROLLER. SEEK TO TRACK<br />

2nD<br />

fEAt 840F 2722 HOY AH,OfH ; SEEK COt1t1AND TO NEe<br />

EEA4 E89DFF 2723 C.6.LL tlfC_OUTPUT<br />

EfA7 6A£2 2724 HOY AH,Dl ; DR lYE NUMBER<br />

EfA9 E896FF 2725 CALL NEC_OUTPUT<br />

£EAC 8AE5 2726 MOV AH,CH ; TRACK tu1BER<br />

EEAE £893FF 2727 CALL NEC_OUTPUT<br />

fEB 1 £85£00 2728 CAll CHK_STAT_2 J GET ENDING INTERRUPT AND SENSE STATUS<br />

2729<br />

2730 ;----- WAIT FOR HEAD SUTlE<br />

2731<br />

EE84 9t 2732 PUSHF ; SAYE STATUS FLAGS<br />

fEes B81200 2733 HOY BX,l8 ; GET HEAD SETTLE PARAMETER<br />

fEB8 f8BSFF 2734 CALL GET_PARM<br />

fEBB 51 2.735 PUSH CX ; SAVE REGISTER<br />

fE8C 2736 J29: ; HEAD_SETTlE<br />

EEBC 892602 2737 MOV CX,550 ; 1 HS lOOP<br />

fEBf OAE4­ 2736 OR AH,AH ; TEST FOR TIME EXPIRED<br />

EECI 740b 2739 JZ J31<br />

EEe] E2FE 2740 J30: LOOP J30 ; DELAY FOR 1 NS<br />

EEtS FEce 2741 DEC AH ; DECREMENT THE COUNT<br />

EEe7 ESFl 2742 JMP J'9 ; DO IT SONE NOR E<br />

EEC9 2743 J31:<br />

EfC9 59 2744 POP ex ; RECOVER STATE<br />

EEeA 90 2745 POPF<br />

fEeB 2746 J32: ; SEEK_ERROR<br />

EEeB C3 2747 RET ; RETURN TO CALLER<br />

2748 SEEK ENOP<br />

2749 ; --------------------------­----------------­<br />

2750 ; DNA_SETUP<br />

2751 THIS ROUTINE SETS UP THE DNA FOR READ/WRITE/VERIFY<br />

2752 OPERATIONS.<br />

2753 I INPUT<br />

2754 (AL) = NOOE BYTE FOR THE DNA<br />

2755 (ES:BX) - ADDRESS TO READI'WRlTE THE DATA<br />

2756 ; OUTPUT<br />

2757 {AXI DESTROYED<br />

2756<br />

eEee 2759 DNA_SETUP PROC NEAR<br />

EEce 51 2760 PUSH CX ; SAVE THE REGISTER<br />

EECD Eboe 2761 OUT DMA+12.AL ; SET THE FIRST/LAST F/F<br />

eEeF E60a 2762 OUT ONA+Il.AL ; OUTPUT THE MOOE BYTE<br />

fEDl aceD 2763 HOV AX,ES ; GET THE ES VALUE<br />

fED3 8104 2764 MDV CL,4 ; SHIFT COUNT<br />

fEOS 03eo 2765 ROL AX.CL ; ROTATE LEFT<br />

fED7 8A£8 2766 HOV CH .AL ; GET HIGHEST NYBLE OF ES TO CH<br />

EED9 24FO 2767 AND AL.OFOH ; ZERO THE LOW NYBBLE FROM SEGMENT<br />

fEoe 03e] 2766 ADD Ax.ex ; TEST FOR CARRY FROM ADDITION<br />

EEOD 7302 2769 JNC J33<br />

HOF FEes 2770 INC CH I CARRY MEANS HIGH 4 BITS MUST BE INC<br />

fEEL 2771 J33:<br />

fEEl 50 2772 PUSH AX ; SAVE START ADDRESS<br />

fEEZ £604­ 2773 OUT DMA+4.AL ; OUTPUT LOW ADDRESS<br />

EEE4 8AC4­ 2774 NOV AL,AH<br />

EEE6 £604 2775 OUT DHA+4,AL I OUTPUT HIGH ADDRESS<br />

fEES 8ACS 2776 HOV AL.CH ; GET HIGH 4 BITS<br />

fEEA 240F 2777 MiD AL.OFH<br />

EEEC E681 2778 OUT oalH,At ; OUTPUT THE HIGH 4 BITS TO PAGE REGISTER<br />

2779<br />

2780 ;------ DETERMINE COUNT<br />

2761<br />

EEEE 8Af6 2782 MOY AH,DH ; NUNBER OF SECTORS<br />

EEFO 2ACO 2783 sua AL,Al ; TINES 256 INTO AX<br />

EEFt 01E8 2784 SHR AX,I • SECTORS * 128 INTO AX<br />

EEF4 50 2765 PUSH AX<br />

EEF5 880600 2766 MOV BX,6 ; GET THE BYTES/SECTOR F'ARH<br />

fEFS Ea7sFF 2787 CALL GET_PARM<br />

EHB BAce 2788 HOV Cl,AH ; USE AS SHIFT Coutrr {(I=128. 1=256 ETC)<br />

fEFO 58 2789 POP AX<br />

fEFE 03EO 2790 SHL AX.CL ; MULTIPLY BY CORRECT AMOUNT<br />

EFOO 48 2791 DEC AX ; -1 FOR DMA VALUE<br />

EF01 50 2792 PUSH AX ; SAVE COUNT VALUE<br />

A-38


LOt OBJ LINE SOURCE<br />

fFOZ E605<br />

fF04 8;'C4<br />

EFOb E60S<br />

EFDa 59<br />

EF09 58<br />

EFOA 03Cl<br />

fFoe S9<br />

EFOD B002<br />

EFOF E60A<br />

EFll C3<br />

EFI2<br />

Eft2: E81EOO<br />

EFlS 7214 <br />

EFI? 8408 <br />

Ef19 E828FF<br />

EFtC EMCOD<br />

EFIF 720A<br />

EF21 A04200<br />

EF24 2460<br />

EF26 3e60<br />

EF2:6 7


LOC OBJ LINE SOURCE<br />

2870 I ~- -----------------------------------------­<br />

ze71 ; DISK_IHT<br />

zan<br />

2873 ;INPUT<br />

2674 ; NONE<br />

2875 ; OUTPUT<br />

THIS ROUTINE HANOlES THE DISKETTE INTERRUPT<br />

287-6 THE INTERRUPT FUG IS seT IS SEEK...STATUS<br />

za77 ;-------------------------------------------­<br />

EF57 2878 DISK.INT ""DC FAR<br />

EFS7 FB 2879 STI ; RE ENABLE INTERRUPTS<br />

EFsa IE 2:880 PUSH DS<br />

EF59 50 Z8a1 PUSH AX<br />

EFSA 884000 Z68


lDC OBJ LINE SOURCE<br />

EF9E E2FE 2946 )43: lOOP J43<br />

HAD 4A 2947 DfC OX ; pOlin AT STATUS PORT<br />

EFAl EC 2948 IN AL.DX ; GET STATUS<br />

EFA2 A810 2949 TEST AL,OlOH ; TEST FOR NEe STILL BUSY<br />

EFA4 7406 2950 JZ J44 ; RESULTS omlE<br />

EFA6 FEes 2951 DEC BL I DECREMENT THE STATUS COUNTER<br />

EFAS i5CA 2952 JHZ JJ8 ; GO BACK FOR MORE<br />

~ EFAA fBEJ 2953 JMP J41 ; CHIP HAS FAILED<br />

2954<br />

2955 ;------ RESULT OPERATION IS DONE<br />

2956<br />

EFAC 2957 J44:<br />

fFAt 58 2958 POP BX<br />

fFAD SA 2959 POP OX<br />

EFAE 59 2960 POP ex ; RECOVER REGISTERS<br />

EFAF C3 2961 PET ; GOOD RETURN CODE FROM TEST INST<br />

2962 ; - -­- - - -­----­-­-­-­------­-­--­-­-­-­- --­--­<br />

2963 ; HUH_TRANS<br />

2964 nus ROUTINE CALCULATES THE HUMBER OF SECTORS THAT<br />

2965 WERE ACTUALLY TRANSFERREO TO/FROM THE DISKETTE<br />

2966 INPUT<br />

2967 (CH) = CYLINDER OF OPERArION<br />

2968 I CLl = START SECTOR OF OPERATION<br />

2969 ; OUTPUT<br />

2970 (AU = NUMBER ACTUALLY TRANSFERRED<br />

2971 HO OTHER REGISTERS MODIFIED<br />

2972 ; -­---­ - - ----­-­-­-­-­-­-­--­-­--­---­---­--­<br />

fFBO 2973 Nut1_TRANS PROC NEAR<br />

EFBO "04500 2974 MOV A.L,NEC_STATUS+3 ; GET CYlINDER E~mEO UP ON<br />

EFS3 3AC5 2975 eMP AL.CH ; SANE AS WE STARTED<br />

EFes A04700 2976 MOV AL ,HEC_STATUS+5 GET ENDING SECTOR<br />

EFBS 740.6. 2977 Jl J


LOC (lBJ LINE SOURCE<br />

3007 j --- INT 17 --------------------------------­<br />

3006 ; PRIfHER_IO<br />

3009 TliIS ROUTINE PROVIDES COMMUNICATION WITH THE PRINTER<br />

3010 (AH)=O F'RIHT THE CHARACTER IN (All<br />

3011 ON RETUIHI, AH=1 IF CHARACTER COULD NOT BE PRINTED (TIME OUT)<br />

3012 OTHER BITS SET AS ON NORMAL STATUS CALL<br />

3013 (AH)=1 INITIALIZE THE PRunER PORT<br />

3014 RETURNS WITH (AH) SET WITH PRINTER STATUS<br />

3015 (AH)=2 READ THE PRINTER STATUS INTO UH)<br />

3016<br />

3017 TIME OUT<br />

3018<br />

3019<br />

51 i<br />

t1. ,::1 ~~~~:D<br />

3020 _ 1 ::. SElECTED<br />

3021 1 '" OUT OF PAPER<br />

3022 1 = ACKNOWLEDGE<br />

'3023 1 = BUSY<br />

3024<br />

3025 (OX) = PRINTER TO BE USED (0.1.2) CORRESPONDING TO ACTUAL VALUES<br />

3026 I IN PRINTER_BASE AREA<br />

3027 ; DATA AREA PRINTER_BASE CONTAItIS THE BASE ADDRESS OF THE PRINTER CAROlS)<br />

3028 AVAILABLE (LOCATED AT BEGINNWG OF DATA SEGMENT, 408H ABSOLUTE, 3 WORDS)<br />

3029 ;REGISTER5 AH IS MODIfIED<br />

3030 • ALL OTHERS UNCHANGED<br />

3031 ; ---- ---------------------------------------­<br />

3032 ASSUME CS: CODE ,DS:DATA<br />

EF02 3033 PRINTER _10 PROC fAR<br />

EFOZ Fe 3034 STI INTERRUPTS BACK ON<br />

EF03 IE 3035 PUSH os j SAVE SEGMENT<br />

EFD4 52 3036 PUSH OX<br />

EFOS 56 3037 PUSH<br />

5'<br />

EF06 51 3038 PUSH CX<br />

HD7 53 3039 PUSH ex<br />

EFDB 8E4000 3040 NOV 51 ,DATA<br />

EFDB BEDE 3041 NOV DS,SI ; ESTABLISH PRINTER SEGMENT<br />

£FDD BaFl 3042- HOV SI,DX ; GET PRINTER PARM<br />

EFOF 01E6 3043 5HL 51,1 ; WORD OFFSET INTO TABLE<br />

EFEl 88940800 3044 HOV OX,PRINTER_BASE[SI) ; GET BASE ADDRESS FOR PRINTER CARD<br />

EFES 0802 3045 OR OX,OX j TEST OX FOR ZERO, INDICATING NO PRINTER<br />

EFE7 740C 3046 JZ Bl j RETURN<br />

EFE9 0.6.£4 3047 OR AH,AH TEST FOR {AH )=0<br />

EFEB 740£ 3048 JZ e. PRINT_AL<br />

£FED FEee 3049 DEC AH TEST FOR CAH)=1<br />

EFEF 7442 3050 JZ .B<br />

INIT_PRT<br />

EFFl FEee 3051 DEC AH TEST FOR (AH )::.2<br />

EFF3 742.6. 3052- JZ 6S PR INTER STATUS<br />

£FFS 3053 Bl : RETURN<br />

EFF5 58 3054 POP ex<br />

EFF6 S9 3055 POP ex<br />

EfF7 5£ 3056 POP<br />

5'<br />

j RECOVER REGISTERS<br />

EFFS 5A 3057 POP ox j RECOVER REGISTERS<br />

EFF9 IF 3058 POP Os<br />

EFFA CF 3059 IRET<br />

3060<br />

3061 j------ PRINT THE CHARACTER IN (ALI<br />

3062­<br />

EFF6 3063 82:<br />

EFFB 50 3064 PUSH AX SAVE VALUe TO PRINT<br />

EFfC 830A 3065 HOV st.IO TIME OUT VALUE<br />

EFFE 33C9 3066 XOR ex,Cx ESTABLISH SHIFT COUNT<br />

FOOD EE 3067 OUT DX,AL ; OUTPUT CHAR TO PORT<br />

FOOl 42 3068 we ox ; PorNT TO STATUS PORT<br />

FOOl 3069 83: ; WAIT_BUSY<br />

FOOZ EC 3070 AL,DX ; GET STATUS<br />

F003 8AEO 3071 r.OV<br />

'"<br />

AH,AL j STATUS TO AH ALSO<br />

Foes A880 3072 TEST At,SOH ; IS TtfE PRINTER CURRENTLY BUSY<br />

F007 750E 3073 Jt~Z 6. j OUT_STrlOBE<br />

F009 EZF] 3074 LOOP 63 ; DECREMENT COUNT ON TIME OUT<br />

FODe FEee 3075 DEC 6L<br />

FOOD 75F3 3076 JHZ 63 ; WAIT FOR NOT BUSY<br />

FOOF BOCCOI 3077 OR AH,l ; SET EPROR FLAG<br />

FOl2 80E4F9 3078 Arm AH,OF9H ; TURN OFF THE OTHER BITS<br />

Fots EBI4 3079 JHP 5HORT 87 ; RETUPtl WITli ERROR flAG SET<br />

FOl7 30BO 84: ; OUT_STReBE<br />

FOl7 BOOO 3081 HOV AL,OOH j SET THE STROBE HIGH<br />

F019 42 3082 we DX ; STROBE IS BIT 0 OF PORT C OF 8255<br />

A-42


LOC OBJ LINE SOURCE<br />

~<br />

~<br />

FOIA EE<br />

FOIB BoDe<br />

FOlD EE<br />

FOIE 58<br />

FOlf<br />

FOIF 50<br />

FOlD<br />

FOZD 88940800<br />

f024 42<br />

fOZ5 EC<br />

f026 BAED<br />

fOZ6 BOE4F8<br />

F02B<br />

FOZB SA<br />

F02e BAC2<br />

FaZE 80F448<br />

FOll EBC2<br />

FOll<br />

FOl3 SO<br />

F034 83C202<br />

f037 8008<br />

F039 EE<br />

F03A B8E603<br />

FOlD<br />

F03D 46<br />

F03E 75FO<br />

F040 BOOC<br />

F042 EE<br />

F043 EBOB<br />

3083 OUT DX,AL<br />

3084 MOV Al,OCH SET THE STROBE lOW<br />

3065 OUT OX.Al<br />

3066 POP AX RECOVER THE OUTPUT CHAR<br />

3087<br />

3068 J------ PRINTER STATUS<br />

3089 <br />

3090 85: <br />

3091 PUSH AX ; SAVE AL REG <br />

3092 86: <br />

3093 MOV OX, PRINTER_BASE lSI ]<br />

3094 ItlC OX<br />

3095 IN AL,OX ; GET PRINTER STATUS<br />

3096 MOV AH,Al<br />

3097 AND AH,OF8H I TURN OFF UNUSED BITS<br />

3098 87: j STATUS_SET<br />

3099 POP OX j RECOVER AL REG<br />

3100 NOV AL,UL ; GET CHARACTER INTO AL<br />

3101 XOR AH ,48H FLIP A COUPLE OF BITS<br />

3102 JMP .1 ; RETURN FROM ROUTINE<br />

3103<br />

3104 ;------ INITIALIZE THE PRINTER PORT<br />

3105<br />

3106 B8:<br />

3107 PUSH AX SAVE At<br />

3106 AOD OX,2 POINT TO OUTPUT PORT<br />

3109 MOV AL,8 SET INIT LINE LOW<br />

3110 OUT OX,Al<br />

3111 NOV AX,lOOO<br />

3112 89: INIT_lOOP<br />

3113 DEC AX lOOP FOR RESET TO TAKE<br />

3114 J~lZ .9 I !NIT_LOOP<br />

3115 NOV AL,OCH NO INTERRUPTS, NON AUTO LF, INIT HIGH<br />

••<br />

3116 OUT OX,Al<br />

3117 JNP PIH_STATUS_1<br />

3116 PRINTER_IO ENOP<br />

3119 ; --- INT 10 --------------------------------­<br />

3120 VIDEO_IO<br />

3121 THESE ROUTINES PROVIDE THE CRT INTERFACE<br />

3122 THE FOllOWItlG FUNCTIONS ARE PROVIDED:<br />

3123 (AH)=O SET HaDE (All CONTAINS HODE VALUE<br />

3124 (AlI=O 40X25 Bioi (POWER ON DEFAULT)<br />

3125 (AlI=1 40X25 COLOR<br />

3126 {AlI=2 80X25 Bioi<br />

3127 ( AL J=3 80X25 COLOR<br />

3128 GRAPHICS HODES<br />

3129 (ALI=4 320X200 COLOR<br />

3130 {All:5 320X200 Bioi<br />

3131 (All=6 640X200 BW<br />

3132 CRT HOOE = 7 80X25 B&W CARD (USED INTERNAL TO VIDEO ONLYJ<br />

3133 *** NOTE BW MODES OPERATE SAME AS COLOR HODES, BUT COLOR<br />

3134 BURST IS NOT ENABLED<br />

3135 (AHI=l SET CURSOR TYPE<br />

313~ (CH) = BITS 4-0 = START LINE FOR CURSOR<br />

3137 H HARDWARE WILL ALWAYS CAUSE BLINK<br />

3138 ** SETTING BIT 5 OR 6 WILL CAUSE ERRATIC BLIHKING<br />

3139 OR NO CURSOR AT All<br />

3140 (ClI::;- BITS 4-0 = END LINE FOR CURSOR<br />

3141 (AHJ=2 SET CURSOR POSITION<br />

3142 (OH,Ol) = ROW,COLUMN (O,O) IS UPPER LEFT<br />

}14 "' !BH I = PAGE NU;13ER (HUST BE 0 FOR CRAPHICS ~IODES)<br />

3144 (AHI=3 READ CURSOR POSITION<br />

3145 (BH) = PAGE NUMBER (MUST BE 0 FOR GRAPHICS MODES)<br />

3146 ON EXIT (oH,Ul) = ROW,COLUMN OF CURRENT CURSOR<br />

3147 (CH,Cll = CURSOR MODE CURRENTLY SET<br />

3148 (AH )=4 READ LIGHT PEN POSITION<br />

3149 ON EXIT:<br />

3150 (AH) = 0 -- LIGHT PEN SWITCH NOT DOWN/NOT TRIGGERED<br />

3151 (AH) = 1 -- VALID LIGHT PEN VALUE IN REGISTERS<br />

3152 {OH,DU ;: ROW,COLUMN OF CHARACTER LP POSN<br />

3153 (CHI = RASTER LINE (0-199'<br />

3154 (BX) = PIXEL COLUMN (0-319,639)<br />

3155 (AHI=5 SELECT ACTIVE DISPLAY PAGE (VALID ONLY FOR ALPHA MODES)<br />

3156 (AU=NEW PAGE VALUE (0-7 FOR HODES 0&1, 0-3 FOR MODES 2&3)<br />

A-43


laC OBJ LINE SOURCE<br />

3157 (AH}=6 SCROLL ACTIVE PAGE UP<br />

3158 {AU ;; NUMBER OF LINES. INPUT LINES BLANKED AT BOTTon OF WINDOW<br />

3159 At :: 0 MEANS BLANK ENTIRE WINlOW<br />

3160 (CH,ell :; IWW.COLUMN OF UPPER lEFT CORNER OF SCROLL<br />

3161 IDH.OLl :; ROW,COLUMN OF LOWER RIGHT CORNER Of $CROLl<br />

3162 f BH) :: ATTRIBUTE TO BE USED ON BLANK LINE<br />

3163 (AH)=7 SCROLL ACTIVE PAGE DOWN<br />

3164 (AU:; HUMBER OF LINES. INPUT LINES BLANKED AT TOP OF wINOOW<br />

3165 AL = 0 HEANS BLANK ENTIRE WINDOW<br />

3166- (CH.CLI :; ROW,COLUMN OF UPPER LEFT CORNER OF SCROLL<br />

3167 IDH,DU = ROW,COllJHN OF LOWER RIGHT CORNER OF SCROLL<br />

3168 (BH) = ATTRIBUTE TO BE USED ON BLANK LINE<br />

3169<br />

3170 CHARACTER HANDLING ROUTINES<br />

3171<br />

3172 I AH I = 8 READ ATTRIBUTE/CHARACTER AT CURRENT CURSOR POSITION<br />

3173 ISHI = DISPLAY PAGE IVALID FOR ALPHA NODES ONLYI<br />

3174 ON EXIT:<br />

3175 I ALI = CHAR READ<br />

3176 IAH I ::I ATTRIBUTE Of CHARACTER READ (ALPHA MODES ONLY)<br />

3177 UH) = 9 WRITE ATTRIBUTE/CHARACTER AT CURRENT CURSOR POSITION<br />

3178 {BHI = DISPLAY PAGE IVALID FOR ALPHA MODES ONLY)<br />

3179 I CX I = coutrr OF CHARACTERS TO WRITE<br />

3180 tAL) = CHAR TO WRITE<br />

3181 IBU = ATTRIBUTE OF CHARACTER ULPHA)/COLOR OF CHAR (GRAPHICSI<br />

3182 SEE NOTE ON WRITE DOT FOR BIT 7 OF BL = 1.<br />

3183 (AH) = 10 WRITE CHARACTER ONLY AT CURRENT CURSOR POSITION<br />

3184 (BHI = DISPLAY PAGE IVALID FOR ALPHA I10DES ONLY)<br />

3185 I CX I = COUNT Of CHARACTERS TO WRITE<br />

3186 I AL) = CHAR TO WRITE<br />

3187 FOR READ/WRITE CHARACTER INTERfACE WHILE IN GRAPHICS I1DDE, THE<br />

3188 CHARACTERS ARE FORNED FROM A CHARACTER GEHERATOR IMAGE<br />

3189 MAINTAINED IN THE SYSTEM RON. ONLY THE 1ST 12:8 CHARS<br />

3190 ARE CONTAINED THERE. TO READ/WRITE THE SECOND 128 CHARS,<br />

3191 THE USER MUST INITIALIZE THE POINTER AT ItlTERRUPT IFH<br />

)192 (LOCATION 0007CH I TO POINT TO THE lK BYTE TABLE CONTAINING<br />

3193 THE CODE POINTS FOR THE SECOND 128 CHARS (128-2551.<br />

3194 fOR WRITE CHARACTER INTERFACE IN GRAPI-lICS NODE, THE REPLICATION FACTOR<br />

3195 CONTAINED IN (CX) ON ENTRY IoIIlL PRODUCE VALID RESULTS ONLY<br />

3196 FOR CHAP-ACTERS CONTAINED ON THE SANE ROW. COmHlUATION TO<br />

3197 SUCCEEOHIG LINES WILL NOT PRODUCE CORREtHY.<br />

3198<br />

3199 GRAPHICS INTERFACE<br />

3£:00 (AH I = 11 SET COLOR PALETTE<br />

3:::01<br />

3202<br />

(eH I = PALLETTE COLOR 10 BEING SET (0..1271<br />

(eu = COLOR VALUE TO BE USEO WIT$i THAT COLOR 10<br />

3203 NOTE: fOR THE CUPRENT COLO~ CARD. THIS ENTRY POINT ftAS<br />

320


LOC OBJ LINE SOURCE<br />

F04S<br />

F045 FeFO<br />

F047 CFFI<br />

F049 Fon<br />

F04B JAF2<br />

F040 A9F7<br />

F04F 30F,<br />

FOS1 9CF2<br />

F05] 41F3<br />

FOSS 70n<br />

Fost C3f3<br />

F059 F6F3<br />

FOSS 54F2:<br />

rOSO 38F4<br />

FOSF 27F4<br />

F06! 22F7<br />

F063 7AF2<br />

0020<br />

FObS<br />

FObS FB<br />

F066 Fe<br />

F061 06<br />

F06,8 IE<br />

F069 52<br />

FObA 51<br />

F068 53<br />

F06C 56<br />

F060 57<br />

F06E 50<br />

F06F 8AC4<br />

F071 32E4<br />

F073 DIED<br />

F075 68FO<br />

F071 302000<br />

F07A n04<br />

F07e 58<br />

F07D E94701<br />

f080 884000<br />

F083 8E08<br />

F085 B80066<br />

f088 863ElOOO<br />

F08e 81E73000<br />

F090 83FF30<br />

F093 7503<br />

F095 880080<br />

F098 8Eeo<br />

F09A 58<br />

F098 8A2:6490D<br />

F09F 2EfFA445FO<br />

FOA4<br />

3232 (AH) 15 CURREI'ff VIDEO STATE<br />

32:33 RETURNS THE CURRENT VIDEO STATE<br />

3234 (All ::: HOOE CURRWTLY SET I SEe AH=O FOR EXPLANATION)<br />

3235 (AH) :: NU11BER Of CHARACTER COLUMNS ON SCREEN<br />

3236 (BH) :: CURRENT ACTIVE DISPLAY PAGE<br />

3237<br />

3238 CS,SS,DS,ES,8X,CX,DX PRESERVED DURING CALL<br />

3239 ALL OTHERS DESTROYED<br />

~2:40 ; ------------------------­- -------------­---­<br />

32:41 ASSUME CS :CODE IDS:DATA ,ES :VIOEO_RAM<br />

32:42:<br />

3243 HI LABEL WORD I TABLE OF ROUTINES WITHIN VIDEO I/O<br />

32:44 OW OFFSET SET_MOOE<br />

32:45 ow OFFSET SET_CTYPE<br />

3246 ow OFf'SET SET_CPOS<br />

32:47 ow OfFSET READJUPSOR<br />

32:48 ow OFFSET READ_LPEH<br />

32:49 ow OffSET ACT_crsp_PAGE<br />

3250 0"<br />

OFFSET SCROLL_UP<br />

3251 ow OFFSET SCROLL_DOWN<br />

32:52: ow OFFSET READ_AC_CURREtIT<br />

3253 0" OFFSET WRITCAC_CURRENT<br />

3254 0"<br />

OFFSt:T WRlTE_C_CURRENT<br />

3255 0" OFFSET SET_COLOR<br />

3256<br />

0"<br />

OFFSET I-'RITE_OOT<br />

3257<br />

0" OFFSET READ_DOT<br />

3258<br />

OFFSET WRITE_TTY<br />

0"<br />

3259 0" OFFSET VIDEO_STATE<br />

3260 HIL EOU $-Ml<br />

3261<br />

3262 rROC tl::AR<br />

3263 STI ; INTERP-UPTS BACK ON<br />

3264 CLO SET DIRECTION FORWARD<br />

3265 PUSH ES<br />

3266 PUSH DS ; SAVE SEGMENT REGISTERS<br />

3267 PUSH ox<br />

3268 PUSH CX<br />

3269 PUSH ex<br />

3270 PUSH 51<br />

3271 PUSH 01<br />

3272 PUSH AX ; SAVE AX VALUE<br />

3273 MOV AL,AH ; GET INTO LOW BYTE<br />

3274 XOR AH IAH I ZERO TO HIGH BYTE<br />

3215 SAL AX,1 *2 FOR TABLE LOOKUP<br />

3276 MOV SI,AX PUT INTO SI FOR BRANCH<br />

3277 CMP AX , 111L TEST FOR WITHIN RANGE<br />

3278 JB 11£ 1 BRANCH AROUND BRANCH<br />

3279 POP AX THROW AWAY THE PARAMETER<br />

3280 JMP VIDEO_RETURN ; DO NOTHING IF NOT IN RANGE<br />

3281 MOV AX,OATA<br />

3282 HOV OS,AX<br />

3283 MOV AX , OB800H SEGMENT FOR COLOR CARD<br />

3284 MOV 01 I EqUIP_FLAG GET EQUIPMENT SETTING<br />

3285 AHD DI , 30H ISOLATE CRT SWITCHES<br />

3286 CMP OI,30H IS SETTING FOR Bioi CARD?<br />

3287 JNE M3<br />

3288 MOV AX,OBOOOH ; SEGMnlT FOR Bioi CARD<br />

3289 MOV ES,AX I SET UP TO POINT AT VIDEO RAI1 AREAS<br />

3290 POP AX ) RECOVER VALUE<br />

3291 MOV AH,CRT_HOOE I GET CURRENt MODE INTO AH<br />

3292 JMP WORD PTR CS:[SI.. OFFSET MIl<br />

3293 VIDEO_IO ENDP<br />

3294 ; -­------------­--------------------------­<br />

3295 ; SET_MODE<br />

3296 THIS ROUTINE INITIALIZES THE ATtACHMENT TO<br />

3297 THE SELECTED MODE. THE SCREEN IS BLANKEO.<br />

3296 ; INPUT<br />

3299 {ALI ::: MODE SELECTED (RANGE 0-9)<br />

3300 i OUTPUT<br />

3301 NONE<br />

3302 ; -------­ -----­ ----------------------------­<br />

3303<br />

3304 i------ TABLES FOR USE IN SEn!NG OF MODE<br />

3305<br />

3306 LABEL 'BYTE<br />

3307 1------ !NIT_TABLE<br />

A-45


lOC OBJ LINE SOURt.:E<br />

FOA43828ZDOAIF0619 3306 DB 38H. 28H,2DH ,OAH .IFH,6 .19H SET UP FOR 40X25<br />

FOAB lC02070607 3309 DB<br />

FOBO 00000000 3310 DB 0,0.0.0<br />

0010 3311 M4 EoU<br />

3312<br />

FOB4 7l505AOAIF0619 3313 DB 7lH,50H .5AH, OAH ,1FH,6 ,19H ; SET UP FOR 80X2S<br />

FOBe lC02:070607 3314 DB<br />

FOCO 00000000 3315 DB 0.0.0.0<br />

3316<br />

FOC4 38Z82DOA7F0664 3317 08 38H, 28H, 2DH, OAH, 7FH ,6 ,64H J SET UP FOR GRAPHICS<br />

Foce 7002010607 3318 08 70H,2.1.6,7<br />

FOO~ 00000000 3319 DB 0,0,0,0<br />

3320<br />

FOD4 61S0520F 190619 3321 DB 61H ,SOH .52H, OFH, 19H.6 .19H SET UP FOR 80X25 B&W CARD<br />

FODe 19020DOBOC 3322 DB 19H. 2, OOH, oaH. OCH<br />

FOED 00000000 3323 DB 0,0 ,0,0<br />

3324<br />

FOE4 3325 M5 LABEl WORD J TABLE OF REGEN LENGTHS<br />

FOE4 0006 3326 OW 2048 ; 40X25<br />

FOE6 0010 3327 OW 4096 ; 80X:!5<br />

FOEB 0040 3328 OW 16384 ; GRAPHICS<br />

fOEA 0040 3329 OW 16384<br />

3330<br />

3331 ; -----­ COLUMNS<br />

FOEe 3332 M6 LABEL BYTE<br />

FOEC 282850502:8285050 3333 DB 40,40.80.80,40,40.80.80<br />

3334<br />

3335 ;------ C_REG_TAB<br />

FOF4 3336 M7 LABEl BHE ; TABLE OF MODE SETS<br />

FOF4 2C282D29ZA2E!E29 3337 DB 2CH ,28H, 2DH, 29H, 2AH, 2EH .1EH. 29H ;<br />

3338<br />

FOFC 3339 PROC NEAR<br />

FOFe 8A0403 3340 MOV DX.03D4H ; ADDRESS OF COLOR CARD<br />

FOFF B300 3341 MOV BL.O ; MODE SET FOR COLOR CARD<br />

FIOl 83FF10 3342 CMP or, JOH ; IS B~ CARD INSTALLED<br />

Fl04 7507 3343 JNE M8 ; OK WITH COLOR<br />

FI06 B007 3344 MOV AL.7 ; INDICATE B~ CARD MODE<br />

Floe 8A8403<br />

3345<br />

MOV Ox , 03B4H<br />

; ADDRESS OF BW CARD<br />

FIOB FEel 3".<br />

INC BL<br />

; MODE SET FOR Bioi CARD<br />

FICO 8AEO 3347 Me: MOY AH,AL ; SAVE MODE IN AH<br />

FIOF A24900 3348 MOV CRT_MODE ,Al ; SAVE IN GLOBAL VARIABLE<br />

F1l2 89166300 3349 MOV ADDR_6845.0X SAVE ADDRESS OF BASE<br />

F1l6 IE 3350 PUSH OS SAVE POINTER TO DATA SEGMENT<br />

Fll750 3351 PUSH AX SAVE MODE<br />

Fl18 52 3352 PUSH ox SAVE OUTPUT PORT VALUE<br />

f1l9 63C204 3353 ADD DX,4 POINT TO CONTROL REGISTER<br />

FIle 6AC3 3354 HOV Al.Bl ; GEl HODE SET FOR CARD<br />

FilE EE 3355 OUT DX.AL ; RESET VIDEO<br />

FllF SA 3356 POP OX ; BACK TO BASE REGISTER<br />

FI2e 28CO 3357 SUB AX,AX I SET UP FOR ABsa SEGMENT<br />

FIZZ 8E08 3358 MOV DS,AX ESTABLISH YECTOR TABLE ADDRESSING<br />

3359 ASSUME DS:ABSO<br />

F124 C51E7400 3360 lOS BX.PARN_PTR GET POINTER TO VIDEO PARMS<br />

F128 56 3361 POP AX ; RECOVER PARMS<br />

3362 ASSUME DS:COOE<br />

FI29 891000 3363 MOV CX.M4 LENGTH Of EACH ROW Of TABLE<br />

Flle 80FCOZ 3364 CMP AH.2 DETERMWE WHICH DNE TO USE<br />

Fl2F 7210 3365 JC M9 MODE IS 0 OR 1<br />

FBI 0309 3366 ADD Bx,ex MOVE TO NEXT ROW OF INIT TABLE<br />

FI33 BOFC04 3367 CMP AH,4<br />

Fl36 7209 3368 JC N9 ; MODE IS 2 OR 3<br />

Fl3S 0309 3369 ADD BX,CX ; NOVE TO GRAPHICS ROW OF INIT_TABLE<br />

F13A BOFC07 3370 eMP AH,7<br />

F13D 7202 3371 JC N9 MODE IS 4,5. OR 6<br />

F13F 0309 3372 ADO BX.CX HOVE TO BW CARD ROW OF INIT_TABLE<br />

3373<br />

3374 ;------ BX POINTS TO CORRECT ROW OF INITIALIZATION TABLE<br />

3375<br />

F141 3376 M9:<br />

F141 50 3377 PUSH AX • SAVE I':OOE IN AH<br />

Fl42 32E4 3378 XOR AH,AH ; AH WILL SERVE AS REGISTER NUMBER DURItlG LOOP<br />

3379<br />

3380 ;------ LOOP TllRCUGH TABLE. OUTPUTTTING REG ADDRESS, THEN VALUE FROM TABLE<br />

3381<br />

F144 3382 HID: ; nUT LOOP<br />

Fl44 8AC4 3383 NOV AL,AH ; GET 6845 REGISTER ~ruMBER<br />

A-46


LOC OBJ LINE SOURCE<br />

F146 EE<br />

F147 42<br />

Fl48 FEC4<br />

Fl4A 8A07<br />

F14C EE<br />

Fl4D 43<br />

Fl4E 4A<br />

~ Fl4F E2F3<br />

FISl 58<br />

Fl52 IF<br />

Fl53 33FF<br />

Fl55 893E4EOO<br />

Fl59 C606620000<br />

FISE B90020<br />

Fl6l aOFC04<br />

F164 noc<br />

Fl66 80FC07<br />

F169 7404<br />

Fl6B :33CO<br />

Fl60 EB06<br />

Fl6F<br />

FI6F B90008<br />

FI72<br />

F172 B82007<br />

F175<br />

F175 F3<br />

FI76 AS<br />

FIn C7066000-6700<br />

Fl7D A04900<br />

~ Fl8032E4<br />

F182 8BFO<br />

F184 8BI66300<br />

FI88 83C204<br />

FI8B 2E8A84F4FO<br />

F 1 90 EE<br />

Fl n A26500<br />

FI94 2E8A84ECFO<br />

FI99 32E4<br />

F 19B A34AOO<br />

F19E 81E60EOO<br />

FlA2 2E6B8CE4FO<br />

FIA7 890E4COO<br />

FlAB 890800<br />

FlAE BF5000<br />

FIBI IE<br />

FIB2 07<br />

FIB3 nco<br />

FIBS F3<br />

FIS6 AB<br />

FIB7 42<br />

FiB8 B030<br />

FIBA 803E490006<br />

FIBF 7502<br />

FICI B03F<br />

FIC! EE<br />

FIC4 A266DO<br />

3384 OUT OX.Al<br />

3385 INC ox ; POINT TO DATA PORT<br />

3366 INC AH ; NEXT REGISTER VALUE<br />

3367 MOV Al.[BX) ; GET TABLE VAlUE<br />

3388 OUT OX.Al ; OUT TO CHIP<br />

3369 INC BX ; UEXT IN TABLE<br />

3390 OEC OX ; BACK TO POINTER REGISTER<br />

3391 LOOP MID DO THE WHOLE TABLE<br />

3392 POP AX GET MODE BACK<br />

3393 POP OS RECOVER SEGMENT VALUE<br />

3394 ASSUME OS:OATA<br />

3395<br />

3396 ;------ FILL REGEN AREA WITH BLANK<br />

3397<br />

3398 XOR 01.01 ; SET UP POINTER FOR REGEN<br />

3399 MOV CRT_START .01 ; START ADDRESS SAVED IN GLOBAL<br />

3400 MOV ACTIVE_PAGE ,0 ; SET PAGE VALUE<br />

3401 MOV CX.8192 ; NUMBER OF WORDS IN COLOR CARD<br />

3402 CMP AH ,4 TEST FOR GRAPHICS<br />

3403 JC MI2 NO_GRAPHICS_INIT<br />

3404 CHP AH , 7 TEST FOR Bioi CARD<br />

340S JE MIl BW_CARD_INIT<br />

3406 XOR AX, AX FILL FOR GRAPHICS MODE<br />

3407 JHP SHORT Ml3 CLEAR_BUFFER<br />

3408 MIl:<br />

3409 HOV CX,2048 ; BUFFER SIZE ON BW CARD<br />

3410 M12; ; NO_GRAPHICS_INIT<br />

3411 MOV AX,' '+7*256 FIll CHAR FOR ALPHA<br />

3412 M13: CLEAR_BUFFER<br />

3413 REP STOSW FILL THE REGEN BUFFER WITH 8UNKS<br />

3414<br />

3415 ;------ ENABLE VIDEO AND CORRECT PORT SETTING<br />

3416<br />

3417 MOV CURSOR_MOoE.67H ; SET CURRENT CURSOR MODE<br />

3418 MOV j GET THE MODE<br />

3419 XOR AH,AH INTO AX REGISTER<br />

3420 MOV SI,AX TABLE POINTER. WDEXEo BY MODE<br />

3421 MOV DX.ADDR_6845 PREPARE TO OUTPUT TO .... IOEO ENABLE PORT<br />

3422 AOO DX,4<br />

3423 HOV AL.CS: I SI+OFFSET M7]<br />

34~4 OUT DX.Al ; SET VIDEO ENABLE PORT<br />

3425 MOV CRT_MOOE_SET,Al ; SAVE THAT VALUE<br />

3426<br />

3427 ; ------ DETERMINE NUMBER OF COLUMNS. BOTH FOR ENTIRE DISPLAY<br />

3428 ;------ AND THE NUMBER TO BE USED FOR TTY INTERFACE<br />

3429<br />

3430 MOV AL.CS:IS1 + OFFSET M6J<br />

3431 XOR AH.AH<br />

3432 MOV CRT_COlS,AX ; HUMBER OF COLUMNS IN THIS SCREEN<br />

31133<br />

3434 ;------ SET CURSOR POSITIONS<br />

3435<br />

3436 ANO SI.OEH ; WORD OFFSET INTO CLEAR lENGTH TABLE<br />

3437 MOV CX.CS:[SI + OFFSET tiS) j lENGTH TO CLEAR<br />

3438 MOV CRT_lEN.CX • SAVE lENGTH OF CRT -- HOT USED FOR Bioi<br />

3439 MOV CX,a ; ClEAR ALL CURSOR POSITlmiS<br />

3440 MOV oI.OFFSET CURSOR_POSr~<br />

3441 PUSH OS ESTABLISH SEGMENT<br />

3442 POP ES ADDRESSINS<br />

3443 XOR AX,AX<br />

3444 REP STOSW ; FILL WITH ZEROES<br />

3445<br />

3446 ;------ SET UP OVERSCAN REGISTER<br />

3447<br />

3448 INC OX SET OVERSCAN PORT TO A DEFAULT<br />

3449 MOV Al,30H VALUE OF 3'OH FOR ALL MODES EXCEPT 640X200<br />

3450 CMP CRT.MODE,6 SEE IF THE HaDE IS 640X200 Bioi<br />

3451 JNZ M14 IF IT IS:n 640X20D. THEN GOTO REGULAR<br />

3452 MOV Al,3FH IF IT IS 640X200, THEN PUT IN 3FH<br />

3453 M14: OUT oX.Al OUTPUT THE CORRECT VALUE TO 309 PORT<br />

3454 MOV CRT.PALLETTE ,Al SAVE THE VALUE FOR FUTURE USE<br />

3455<br />

3456 ;------ NORMAL RETU~N FROM ALL VIDEO RETURNS<br />

3457<br />

A-47


lOC OBJ LINE SOURCE<br />

FtC7 3458 VIDEO_RETURN:<br />

FIC7 Sf 3459 POP 01<br />

Flce 5E 346. POP S!<br />

flC9 58 3461 POP BX<br />

FICA 3462 MIS: j VlOEO_RETURN_C<br />

FICA 59 3463 pOP CX<br />

Fica SA 3464 POP ox<br />

Flee IF 3465 POP DS<br />

fleD 07 3466 POP ES I RECOVER SEGMENTS<br />

Fle( Cf 3467 IRET ; ALL DONE<br />

3468 SET_MODE ENIlP<br />

3469 ; .-­--­-----------------------..-------------­<br />

3470 1 SET_CTYf'E<br />

3471 THIS ROUTINE SETS THE CURSOR VALUE<br />

3472 I INPUT<br />

3473 I (eXI HAS CURSOR VALUE CH-Sf.ART LINE, CL-STOP LINE<br />

3474 j OUTPUT<br />

3475 NONE<br />

3476 ; ------------------­ --­ -------­ -­ -­ -­ --------<br />

FIeF 3477 PROt NEAR<br />

FIeF 840A 3418 AH,10 J 6845 REGISTER FOR CURSOR SET<br />

FIOI 890E6000 3479 HOV CURSOR_f1ODE ,CX ; SAVE IN DATA AReA<br />

FID5 £80200 3480 CALL M16 J OUTPUT ex REG<br />

FID8 EBED 3481 JHP<br />

3482<br />

3483 i -----­ THIS ROUTINE OUTPUTS THE ex REGISTER TO THE 6845 REGS HAMED IN AH<br />

3484<br />

FIDA 3485 N16:<br />

FIDA 8B166300 3486 HOV oX,ADDR_6845 , ADDRESS REGISTER<br />

FIDE 6AC4 3487 HOV AL,AH i GET VALUE<br />

FlED EE 3488 OUT DX,AL ; REGISTER SET<br />

FIEI 42 3489 INC OX ; DATA REGISTER<br />

FJE2 8AC5 3490 11.0V AL,CH i DATA<br />

F1E4 EE 3491 OUT OX,AL<br />

FIES 4A 3492 DEC DX<br />

FIE6 8AC4 3493 HOV AL,AH<br />

FlEB FEtD 3494 INC AL ; POINT TO OTHER DATA REGISTER<br />

FlEA EE 3495 OUT OX,AL J SET FOR SECOND REGISTER<br />

FlEB 42 3496 INC OX<br />

FlEe 6ACl 3497 MOV AL ,CL ; SECOND DATA VALUE<br />

FlEE EE 3498 OUT OX.Al<br />

FIEF C3 3499 RET ; ALL DONE<br />

3500 SET_CTYPE nmp<br />

350 I ; --------------------------­ -----------­ ----­<br />

3502 J SET_CPOS<br />

3503 THIS ROUTINE SETS THE CURRENT CURSOR POSITION TO THE<br />

3504 NEW X-Y VAI.UES PASSED<br />

3505 INPUT<br />

3506 ox - ROW.COLUMN OF NEW CURSOR<br />

3507 BH - DISPLAY PAGE OF CURSOR<br />

3508 ; OUTPUT<br />

3509 I CURSOR IS SET AT 6845 IF DISPLAY PAGE IS CURRENT DISPLAY<br />

3510 i ----..-------------­ ------­ ---­ -­ -­ ----­ ----­<br />

FIFO 3511 SET_CPOS PROC NEAR<br />

FIFO BACF 3512 HOV CL,BH<br />

FIF2 3ZED 3513 XO. CH,CH I ESTABLISH LOOP COUHT<br />

FIF4 DlEl 3514 SAL CX.l I WORO OFFSET<br />

FIF6 88Fl 3515 HOV SI,CX ; USE INDEX REGISTER<br />

FIF8 89945000 3516 MOV (SI+OFFSET CURSOR_POSNI,OX ; SAVE THE POINTER<br />

FIFC 383E6200 3517 CMP<br />

Floa 7505 3518 JHZ HI7 ; SET_CPOS_RETURN<br />

F202 88C2 3519 I10V AX,OX ; GET ROW/COLUMN TO AX<br />

F204 E80200 352. CAl.l HIS ; CURSOR_SET<br />

F207 3521 M17: I SET_CPOS_RETURN<br />

F207 'f;BBE 3522 JHP<br />

3523 ENOP<br />

3524<br />

3525 ;------ SET CURSOR POSITION, AX HAS ROW/COLUMN FOR CURSOR<br />

3526<br />

F209 3521 MI8 PRoe NEAR<br />

F209 £87FOO 3528 CALL POSITION ; DETERMINE I.OCATION IN REGEN BUFFER<br />

FlOC 88C8 3529 MOV eX,AX<br />

F20E 030[4EOO 3530 ADO CX,CRT_START ; ADD IN THE START ADDRESS FOR THIS PAGE<br />

F212 01F9 3531 SAR CX,l ; DIVIDE BY 2 FOR CHAR ONLY COUNT<br />

F214 640E 3532 MOV AH.14 ; REGISTER NUI1BER fOR CURSOR<br />

A-48


LaC OBJ LINE SOURCE<br />

FZ16 E8CIFF 3533 CALL 1116 ; OUTPUT THE VALUE TO THE 6845<br />

F219 C3 3534 RET<br />

3535 H18 WOP<br />

3536 ;---------------------------_ ...--------------­<br />

3537 ; READ_CURSOR<br />

3538 THIS ROUTINE READS THE CURRENT CURSOR VALUE FROM THE<br />

3539 6B45, FORHATS IT, AND SENDS IT BACK TO THE CALLER<br />

354. i INPUT<br />

3541 BH - PAGE OF CURSOR<br />

3542 ; OUTPUT<br />

3543 OX - ROW, COLUMN OF THE CURRENT CURSOR POSITION<br />

3544 CX - CURREHT CURSOR MODE<br />

3545 ;------------------------------------------­<br />

Fl1A 3546 READ_CURSOR PROC HEAR<br />

F21A SADF 3547 MOV Bl.BH<br />

FZIC 3ZFF 3548 XOR SH,BH<br />

F2IE DIEl 3549 SAL eX,l ; WORD OFFSET<br />

FZ2:0 88975000 3550 HOV DX,(BX+OFFSET CURSOR_POSH]<br />

F2:24 880E6000 3551 HOV eX.CURSOR_MODE<br />

F228 SF 3552 POP 01<br />

F229 SE 3553 POP SI<br />

F22'" 58 3554 POP BX<br />

F22:8 58 3555 POP AX ; DISCARD SAVED CX AND ox<br />

F2:2:C 58 3556 POP AX<br />

F22:0 IF 3557 POP OS<br />

F22:E 07 3558 POP ES<br />

F22:F Cf 3559 IRET<br />

3560 READ_CURSOR WOP<br />

3561 ;------------------- - -----------------------­<br />

356Z ; ACT_DISF_PAGE<br />

3563 THIS ROUTINE SETS THE ACTIVE DISPLAY PAGE. ALLOWING<br />

3564 THE FULL USE Of THE RAM SET ASIDE FOR THE VIDEO ATTACHMENT<br />

3565 INPUT<br />

3566 AL HAS THE NEW ACTIVE DISPLAY PAGE<br />

3567 ; OUTPUT<br />

3568 J THE 6845 IS RESET TO DISPLAY THAT PAGE<br />

3569 1-------------------------------------------­<br />

F230 3570 ACT_DISP_PAGE PROC NEAR<br />

F2;30 A2:6200 3571 MOV ACTlVE_PAGE,AL J SAVE ACTIVE PAGE VALUE<br />

F233 8BOE4COO 3572 MOV CX.CRT_LEN ; GET SAVED LENGTH OF REGEN BUFFER<br />

F237 98 3573 CBW I CONVERT AL TO WORD<br />

F238 SO 3574 PUSH AX ; SAVE PAGE VALUE<br />

F239 F7Et 3575 NUL ex ; DISPLAY PAGE TII1ES REGEtl LENGTH<br />

F2:38 A34EOO 3576 HOV CRT_START ,AX ; SAVE START ADDRESS FOR LATER REQUIREMENTS<br />

F23E 8BC8 3571 HOV eX.AX ; START ADDRESS TO ex<br />

f240 01F9 3578 SAR ex ,I ; DIVIDE BY Z FOR 6845 HANDLING<br />

F242 B40C 3579 MOV AH,lZ ~ 6845 REGISTER FOR START ADDRESS<br />

F244 E893FF 3580 CALL M16<br />

F2:47 58 3581 POP 8X ; RECOVER PAGE VALUE<br />

F248 aIE3 358Z SAL BX.l f *2 FOR WORD OFFSET<br />

F2it" 88875000 3583 MOV AX,lBX + OFFSET CURSOR_paStil ; GET CURSOR FOR THIS PAGE<br />

F2:4E EBBSFF 3584 CALL NlB f SET THE CURSOR POSITION<br />

F251 E973FF 3585 JMP VIDEO_RETURN<br />

3587 ; -------------------------------------------­<br />

3588 , SET COLOR<br />

3589 THIS ROUTINE WILL ESTABLISH THE BACKGROUND COLOR, THE OVERSCAN COLOR,<br />

3590 AND THE FOREGROUND COLOR SET FOR MEOIlIt1 RESOLUTION GRAPHICS<br />

3591 INPUT<br />

3592 (BH 1 HAS COLOR ID<br />

3593 IF BH=O, THE BACKGROUND COLOR VALUE IS SET<br />

3594 FROl1 THE LOW BITS OF BL (0-31)<br />

3595 IF BH=l, THE PALLETTE SELECTION IS MADE<br />

3596 BASED ON THE LOW BIT OF st:<br />

3597 0 = GREEN. RED, YEllOW FOR COLORS l,Z.:S<br />

3598 1 = BLUE, CYAN. MAGENTA FOR COLORS 1.2.3<br />

3599 {Bll HAS THE COLOR VALUE TO BE USED<br />

3600 ; OUTPUT<br />

3601 THE COLOR SELECTION IS UPDATED<br />

3602 ; -------------------------------------------­<br />

F254 3603 SET_COLOR !',we NEAR<br />

F254: 88166300 3604 HOV ; 1/0 PORT FOR PALETTE<br />

F25B 83C205 3605 ADD DX.S ; OVERSCAN PORT<br />

F2:58 A06600 3606 HOV AL.CRT]ALLETTE ; GET THE CURRENT PAllETTE VALUE<br />

F2:5E OAFF 3607 OR BH.BH ; IS THIS COLOR O?<br />

A-49


LOC OBJ LINE SOURCE<br />

F260 750E<br />

f2:62 24Eo<br />

F264 80EllF<br />

Fl67 OAe3<br />

F269<br />

F269 EE<br />

Fl6A A26600<br />

Fl60 E957FF<br />

F27Q<br />

FHO 24Df<br />

F272 DOEB<br />

F274 73F3<br />

FZ76 OC20<br />

F278 EBEF<br />

F27A<br />

F27A 8A264AOO<br />

F27E 1.04900<br />

F281 8A3E6200<br />

H8S SF<br />

F286 Sf<br />

F287 59<br />

FleB E93FFF<br />

F2eB<br />

F2aB S3<br />

Flac 8808<br />

Fl8E 8AC4<br />

F290 F6264AOO<br />

F294 32FF<br />

F296 03e3<br />

F298 OlEO<br />

F29A 58<br />

F29B C3<br />

F29C<br />

F29C 8A08<br />

F29E 80FC04<br />

3606 JNZ H2O ; OUTPUT COLOR 1<br />

3609<br />

3610 j------ HANDLE COLOR 0 BY SETTING THE BACKGROUND COLOR<br />

3611<br />

3612 AND Al,DEOH t TURN OFF LOW 5 BITS Of CURRENT<br />

3613 .ND BL,OlFH ; TURN OFF HIGH 3 BITS OF INPUT VALUE<br />

3614 OR Al,Bl ; PUT VALUE IHTO REGISTER<br />

3615 N19: ; OUTPUT THE PALLETTE<br />

3616 OUT OX,AL ioutput c.olor selection to 3d9 port<br />

3617 MOV CRT_PAlLETTE,AL ; SAVE THE COLOR VALUE<br />

3616 JHP VIDEO_RETURN<br />

3619<br />

3!J20 ;------ HANDLE COLOR 1 BY SELECTING THE PALLETTE TO BE USED<br />

3621<br />

3622 H2O:<br />

3623 AND AL,OaFH ; TURN OFF PALlETTE SElECT BIT<br />

3624 SH. BL.l ; TEST THE LOW ORDER BIT Of BL<br />

3625 JNC MI. i ALREADY DONE<br />

3626 OR Al,20H TURN au PAllETTE SElECT BIT<br />

3627 JMP MI. iGODOIT<br />

3628 SET_COLOR ENDP<br />

3629 i -------------------------------------------­<br />

3630 iVIDEO STATE<br />

3631 RETURNS THE CURRENT VIDEO STATE IN AX<br />

3632 AH = NUMBER OF COLUMNS ON THE SCREEN<br />

3633 AL = CURRENT VIDEO MODE<br />

3634 ; BH = CURRENT ACTIVE PAGE<br />

3635 i ------------------ - ------------------------­<br />

3636 VIDEO_STATE PROC NEAR<br />

3637 "OV AH,BYTE PTR CRT_COLS ; GET NUMBER OF COLUMNS<br />

3638 "OV AL,eRT_MODE ; CURRENT MODE<br />

3639 HOV BH.ACTIVE]AGE i GET CURRENT ACTIVE PAGE<br />

3640 pop 01 f RECOVER REGISTERS<br />

3641 pop 51<br />

3642 POP CX DISCARD SAVED ex<br />

3643 JHP MIS RETURN TO CALLER<br />

3644 VIDEO_STATE ENDP<br />

3645 i ----------------------------------­<br />

3646 POSITION<br />

3647 THIS SERVICE ROUTINE CALCULATES THE REGEN BUFFER ADDRESS<br />

3648 OF A CHARACTER IN THE ALPHA MOOE<br />

3649 ; INPUT<br />

3650 AX = ROW, COLUMN POSITION<br />

3651 i OUTPUT<br />

3652 AX = OFFSET OF CHAR POSITION IN REGEN BUffER<br />

3653<br />

3654 POSITION PROC NEAR<br />

3655 PUSH BX SAVE REGISTER<br />

3656 HOV eX,AX<br />

3657 HOV AL,AH , ROJ.IS TO AL<br />

3658 MUL BYTE PTR CRT_COLS ; DETERMINE BYTES TO ROW<br />

3659 XOR BH,BH<br />

3660 AOO AX,BX ADD IN COLUMN VALUE<br />

3661 SAL AX,1 * 2 FOR ATTRIBUTE BYTES<br />

3662 POP BX<br />

3663 RET<br />

3664 POSITION ENDp<br />

3665 ; -----------------------------------------­<br />

3666 ; SCROLL UP<br />

3667 THIS ROUTINE MOVES A BLOCK OF CHARACTERS UP<br />

3668 ON THE SCREEN<br />

3669 ; INPUT<br />

3670 (AH) = CURRENT CRT MODE<br />

3671 (Al) '" NUME',ER OF ROWS TO SCROLL<br />

3672 ICXI :: ROW/COLUMN OF UPPER LEFT CORNER<br />

3673 (OX) = ROW/COLUMN OF LOWER RIGHT CORNER<br />

3674 (BH) = ATTRIBUTE TO BE USED ON BLANKED LINE<br />

3675 (oS) = DATA SEGMENT<br />

3676 IES) = REGEN BUFrER SEGMENT<br />

3677 j OUTPUT<br />

3678 NONE -- THE REGEN BUFFER IS MODIFIED<br />

3679 ; ------ --------- -- ------------------- ------­<br />

3680 ASSUME CS:COOE,DS:DATA,ES:DATA<br />

3681 SCROLL_UP PROC HEAR<br />

3682 MOV BL.AL f SAVE LINE COUNT IN BL<br />

3683 CMP AH.4 ; TEST FOR GRAPHICS MODE<br />

A-50


LOC OBJ LINE SOURCE<br />

F2Al n08<br />

F2A3 80FC07<br />

f2Ab 7403<br />

FlAB E9F301<br />

flAB<br />

fZAB 53<br />

f2AC saCl<br />

FUE E83900<br />

F2Bl 7433<br />

F2:83 03FO<br />

F2:85 8AE6<br />

F287 2:AE3<br />

F2.89<br />

F289 E87500<br />

FZBC 03F5<br />

FZBE 03FO<br />

F2:CO FEee<br />

F2C2 7SFS<br />

F2:C4<br />

F2C4 58<br />

F2CS· B020<br />

F2C7<br />

F2C7 E87000<br />

F2eA 03FO<br />

Flee FEC8<br />

F2CE 75F7<br />

F200<br />

F200 884000<br />

F2:03 8ED8<br />

F205 803E490007<br />

F2DA 7407<br />

F2DC A06500<br />

FlOf SADeD3<br />

F2E2 EE<br />

FtE3<br />

F2f3 E9EIFE<br />

F2E6<br />

F2E6 SADE<br />

F2:E8 EeDA<br />

FlEA<br />

f2EA 803E490002<br />

FtEF 7219<br />

FtF 1 803E490003<br />

F2Fb 7712<br />

FHS 52<br />

F2F9 SADAa]<br />

F2FC 50<br />

F2FD<br />

F2FO EC<br />

FtFE A808<br />

F30D 74F8<br />

F302 B025<br />

F304 BA0803<br />

F307 EE<br />

noe 58<br />

n09 5A<br />

nOA ES7EFF<br />

noD 03064EOO<br />

F311 88f8<br />

FlU 8BFO<br />

Fl15 2801<br />

F3l7 fEe6<br />

F319 FEe2<br />

F318 32EO<br />

F310 882E4AOO<br />

F321 03EO<br />

F3Z3 8AC3<br />

F325 F6264AOO<br />

F3Z9 03eO<br />

3684 JC HI ; HANDLE SEPARATELY<br />

3685 CMP AH.7 ; TEST FOR BW CARD<br />

~8. JE HI<br />

3687 JMP<br />

3688 Nl: ; UP_CotnIHUE<br />

3689 PUSH ex j SAVE FILL ATTRIBUTE IN 8H<br />

3690 NOV AX.CX I UPPER lEFT POSITION<br />

3691 CAll SCROLL_POSITION i DO SETUP FOR SCROLL<br />

3692 JZ N7 I BLANK_FIELD<br />

3693 ADD SI,AX ; FROM ADDRESS<br />

3694 NOV AH,DH ; • ROWS IN BLOCK<br />

3695 SUB AH,Bl ; # ROWS TO BE MOVED<br />

3696<br />

3697 CAll HID ; MOVE ONE ROW<br />

3698 ADD SI.B?<br />

3699 ADD DI,B? ; POINT TO NEXT LINE IN BLOCK<br />

3700 DEC All ; COUNT OF LINES TO HOVE<br />

3701 JHZ<br />

H'<br />

3702 H3: ; CLEAR_ENTRY<br />

3703 pop AX J RECOVER ATTRIBUTE IN AH<br />

3704 NOV AL, • I FILL WITH BLANKS<br />

3705 J CLEAR_lOOP<br />

3706 CALL Nil ; CLEAR THE ROW<br />

3707 ADD DI,B? ; POINT TO NEXT LINE<br />

3708 DEC BL ; COUNTER OF LINES TO SCROLL<br />

3709 JNZ H4 ; CLEAR_lOOP<br />

3710 NS: ; SCROLL_END<br />

3711 MOV AX,OATA ; GET LOCATION<br />

3712 MOV OS,AX<br />

3713 CNP CRT_HODE,7 ; IS THIS THE BLACK AND WHITE CARD<br />

3714 JE ~16 ; IF SO, SKIP THE MODE RESET<br />

3715 NOV AL.CRT_tfODE_SET ~ GET THE VALUE OF THE MODE SET<br />

3716 NOV DX,0308H ; ALWAYS SET COLOR CARD PORT<br />

3717 OUT DX,AL<br />

3718<br />

3719 JMP<br />

3720 N7: ; BLANK_FIELD<br />

3721 NOV BL,OH GET ROW COUNT<br />

3722 JMP<br />

H'<br />

; GO CLEAR THAT AREA<br />

3723 ENDP<br />

3724<br />

3725 ; ----- HANllE COMMON SCROLL SET UP HERE<br />

3726<br />

3127 SCROll_POSITION PROC NEAR<br />

3128 CM? CRT_MOOE,2 I TEST FOR SPECIAL CASE HERE<br />

3129 J8 N9 ; HAVE TO HANDLE 80X25 SEPARATELY<br />

3730 CMP CRT_MODE, 3<br />

3731 JA N9<br />

3732<br />

3733 j -----­ 80X2S COLOR CARD SCROll<br />

3734<br />

3735 PUSH OX<br />

3736 MOV oX,30AH ; GUARANTEED TO BE COLOR CARD HERE<br />

3737 PUSH AX<br />

3738 i WAIT_DISP_ENABLE<br />

3739 IN AL,oX ; GET PORT<br />

3740 TEST AL.S ; WAIT FOR VERTICAL RETRACE<br />

3741 JZ H8 ; WAIT_DISP_ENABLE<br />

3742 NOV AL,25H<br />

3743 MOV OX , 030SH<br />

3744 OUT OX.Al ; TURN OFF VIDEO<br />

3745 POP AX i DURING VERTICAL RETRACE<br />

3746 POP OX<br />

3747 N9: CALL POSITION ; CONVERT TO REGEN POINTER<br />

3748 ADD AX.CRT_START ; OFFSET OF ACTIVE PAGE<br />

3749 HOV OI,AX ; TO ADDRESS FOR SCROll<br />

3750 HOV 5I,AX ; fROM ADDRESS fOR SCROLL<br />

3751 SUB OX,CX ; OX = #ROWS, WCOLS IN BLOCK<br />

3752 INC DH<br />

3753 INC Dl J INCREMENT FOR 0 ORIGIN<br />

3754 XOR CH,CH J SET HIGH BYTE OF COUNT TO ZERO<br />

3755 MOV BP,CRT_COLS ; GET NUMBER OF COLUMNS IN DISPLAY<br />

3756 AOO BP,BP ; TIMES 2 FOP ATTRIBUTE BYTE<br />

3757 MOV AL,Bl ; GET LINE COUNT<br />

3758 MUl BYTE PTR CRT_COLS ; DETERMINE OFFSET TO FROM ADDRESS<br />

3759 ADD AX,AX ; *2 FOR ATTRIBUTE BYTE<br />

A-51


LOC OBJ LINE SOURCE<br />

F32B 06 3760 PUSH ES ESTABLISH ADDRESSING TO REGEN BUFFER<br />

F3ZC IF 3761 pop OS FOR BOTH POINTERS<br />

F32:0 SOFBOO 3762 CMP BL.O o SCROll MEANS BLANK FIELD<br />

F330 C3 3763 RET ; RETURN WITH FUGS SET<br />

3764 SCROLL_POSITION ENOP<br />

3765<br />

3766 j------ MOVE_ROW<br />

F331 3767 HIO PROC NEAR<br />

f331 SACA 3768 MOV Cl,Dl • GET • OF eOLS TO MOVE<br />

F333 56 3769 PUSH 51<br />

F334 57 3770 PUSH 01 I SAVE START ADDRESS<br />

F33S F3 3171 REP MOVSW ; MOVE THAT LlUE ON SCREEN<br />

F336 A5<br />

F337 SF 3772 POP 01<br />

F336 Sf 3773 POP 51 I RECOVER ADDRESSES<br />

F339 C3 3774 RET<br />

3775 HID ENDP<br />

3776<br />

3777 j------ CLEAR_ROW<br />

F33A 3778 HII PROC NEAR<br />

F33A SACA 3779 MOV Cl.Dl I GET I CCUJMNS TO CLEAR<br />

F33C 57 3780 PUSH 01<br />

F33D F3 3781 REP STQSW I STORE THE fILL CHARACTER<br />

F33E AS<br />

F33f SF 3782 pop 01<br />

F340 C3 3783 RET<br />

3784 Nil ENDP<br />

3765 ;--------------------------­ ---­ ---­<br />

3766 ; SCROLL_DOWN<br />

3787 THIS ROUTINE MOVES THE CHARACTERS WITHIN A DEFINED<br />

3788 BLOCK DOWN ON THE SCREEN, FILLING THE TOP LINES<br />

3789 WITH A DEFINED CHARACTER<br />

3790 ; INPUT<br />

3791 (AH I = CURRENT CRT MODE<br />

3792 (All = NUMBER OF LINES TO SCROLL<br />

3793 (CX I = UPPER LEFT CaRtIER OF REGION<br />

3794 (OX) = LOWER RIGHT CORNER OF REGION<br />

3795 (BHJ = FILL CHARACTER<br />

3796 (OS I = DATA SEGMENT<br />

3791 'ESJ = REGEN SEGMENT<br />

3798 ;OUPUT<br />

3799 NOHE -­ SCREEN IS SCROllED<br />

3800 ; --­ ---­ ----­ ------------------------­<br />

F341 3801 SCROLL_DO~N FROC NEAR<br />

f341 FD 1802 STD ; DIRECTION FOR SCROLL DOWN<br />

f342 8AD8 3803 NOV BL,AL ; LINE COUtIT TO BL<br />

F344 80FC04 3804 CMP AH,4 ; TEST FOR GRAPHICS<br />

F347 7208 3805 JC HI2<br />

F349 80FC01 3806 CNP AH,7 i TEST FOR BW CARD<br />

F34C 7403 3S07 JE HI2<br />

F34E E9A601 3808 JMP GRAPHICS_DOWN<br />

F351 1809 NI2.: ; CONTINUE_DOWN<br />

F351 53 3810 FUSH BX ; SAVE ATTRIBUTE IN 8H<br />

F352 8BCZ 3811 NOV AX,OX ; LOWER RIGHT CORNER<br />

F354 E893FF 3812. CALL SCROll.POSITION ; GET REGEN LOCATION<br />

F357 742.0 3811 JZ HI.<br />

F3S9 2BfD 3814 SUB SI,AX ; SI IS FROM ADDRESS<br />

f358 8AE6 3815 MOV AH,OH ; GET TOTAL II ROWS<br />

F35D un 3816 SUB AH,Bl ; COUNT TO MOVE IN SCROLL<br />

F35F 3817 N13:<br />

F3SF E8CFFF 3816 CALL NID ; MOVE ONE ROW<br />

F362 2.BF5 3819 SUB SI,ep<br />

F364 2BFD 3820 SUB DI,BP<br />

F366 fEce 3821 DEC AH<br />

F368 75F5 3622 J~lZ HI3<br />

F36A 3823 N14:<br />

F36A 58 3824 POP AX t RECOVER ATTRIBUTE IN AH<br />

F368 B020 3825 MOV AL, •<br />

F36D 3826 N15:<br />

F36D ESCAFF 3827 CAlL HII ; CLEAR ONE ROW<br />

F370 2BFa 3828 SUB aI,BP ; GO TO NEXT ROW<br />

F372 FEee 3829 DEC 8L<br />

F374 75F7 3830 JNZ HIS<br />

F376 E957FF 3831 JMP HS ; SCROll.END<br />

F379 3832 N16:<br />

F379 8ADE 3833 HOY BL,DH<br />

A-52


lOC 08J LINE SOURCE<br />

F376 fBED 3834 JMP N14<br />

3835 SCROL~OO!J:N ENDP<br />

3836 ; ----------------------- ------------------­<br />

3837 ; READ_At_CURRENT<br />

3838 THIS ROUTINE READS THE ATTRIBUTE AND CHARACTER AT THE CURRENT<br />

3839 CURSOR POSITION AHO RETURNS THEM TO THE CALLER<br />

3a40<br />

; INPUT<br />

3841 (AH) :: CURRENT CRT t10DE<br />

3842 (8H) :: DISPLAY PAGE ( ALPHA HODES ONLY 1<br />

3843 (as) = DATA SEGMENT<br />

3844 (ES) = REGEN SEGMENT<br />

3845 ;OUTPUT<br />

3846 (ALI = CHAR READ<br />

3347 (AH) :: ATTRIBUTE READ<br />

3848 ; -------------------- - - -------------------­<br />

3849 ASSUME CS:CQDE.DS:DATA.ES:DATA<br />

F37D 3850 READ_AC_CURRENT PROt NEAR<br />

F37C 80FC04 3851 eMP AH,4 ; IS THIS GRAPHICS<br />

n80 7Z0B 3852 JC PI<br />

f382 80FC07 3853 CMP AH.7 ; IS THIS ew CARD<br />

F38S 7403 3854 JE PI<br />

Fl87 E9A902 3855 JMP GRAPHICS_READ<br />

FlSA 3856 PI: ; READ_AC_CONTINUE<br />

F3eA E81,o..OO 3857 CALL FINO_POSITION<br />

F38D 8BF3 3858 MOV SI,ex j ESTABLISH ADDRESSING IN 51<br />

3659<br />

3S60<br />

3861<br />

j------ WAIT FOR HORIZONTAL RETRACE<br />

F3SF 8BI66300 3862 MOV DX.AOOR_6845 ; GET BASE ADDRESS<br />

F393 83C206 3863 ADD OX.6 i POINT AT STATUS PORT<br />

F396 06 3864 PUSH ES<br />

F397 IF 386$ POP OS ; GET SEGMENT FOR QUICK ACcESS<br />

F398 3866 P2 : ; W.IT FOR RETR.CE LOW<br />

F398 EC 3867 IN AL,OX ; GET STATUS<br />

F399 ,0..801 3868 TEST AL,1 ; IS HaRZ RETRACE LOW<br />

f39B 75FB 3869 JNZ P2 ; WAIT UNTIL IT IS<br />

F39D FA 3870 CLI j NO MORE INTERRUPTS<br />

r'\<br />

F39E 3871 P3: ; WAIT FOR RETRACE HIGH<br />

F39E EC 3872 IN AL.OX ; GET STATUS<br />

f39F ,0..801 3873 TEST AL.! ; IS IT HIGH<br />

FlAl 74F8 3874 JZ P3 ; WAIT UNTIL IT IS<br />

FlA.3 AD 3875 lOOSW ; GET THE CHAR/ATTR<br />

F3A4 E9Z0Ff 3876 JMP VIDEO_RETURN<br />

3877 RE.O_AC_CURREHT ENDP<br />

3878<br />

FlA7 3879<br />

nA7 8ACF 3880 MQV CL,BH ; DISPLAY PAGE TO CX<br />

F3A9 3ZED 3881 XOR CH.CH<br />

FlAB 86Fl 3882 NOV 5I.CX ; MOVE TO SI fOR INDEX<br />

F3AO DIE6 3883 SAL 51.1 ; • 2: FOR WORD OFFSET<br />

F3AF 88845000 3884 I10V AX,[SI+ OFFSET CURSOR]OSNJ ; GET ROW/COLUMN OF THAT PAGE<br />

F3B3 330B 3885 XOR ex.ex SET START ADDRESS TO ZERO<br />

F3BS n06 3686 JCXZ P5<br />

nB7 3887 P4:<br />

F367 031£4COO 3888 ADD BX.CRT_LEN LENGTH Of BUFfeR<br />

FlBB EZFA 3889 lOOP P4<br />

FlBD 3890 ps: ; NO_PAGE<br />

F3BD E8CBFE 3891 CALL POSITlON ; DETERMINE LOCATION IN REGEN<br />

nco 0308 3892 AOO BX.AX ; ADD TO START OF REGEN<br />

F3C2 C3 3893 RET<br />

3694 FINO_POSITION Et.'OP<br />

3895 ; ----- ~----------- -----------------------­<br />

3896 ;WRITE_AC_CURRENT<br />

3897 THIS ROUTINE WRITES THE ATTRIBUTE AND CHARACTER AT<br />

3696 THE CURRENT CURSOR POSITION<br />

38'99 ; INPUT<br />

3'900 ! AH) = CURRENT CRT MODE<br />

3901 (BH) = DISPLAY PAGE<br />

3902 (CXl = COUNT OF cHARACTERS TO WRITE<br />

3903 (AU = CHAR' TO WRITE<br />

3904 tBLl = ATTRIBUTE Of CHAR TO WRITE<br />

3905 CDS) .. DATA SEGMENT<br />

3906 (ES) = REGEN SEGMENT<br />

3907 ;OUTPUT<br />

3908 NONE<br />

3909 ; --------- ------------- ---------------------­<br />

A-53


LOC OBJ LINE SOURCE<br />

F3Cl 3910 NEAR<br />

F3C3 60fC04 3911 CMP AH,4 i IS THIS GRAPHICS<br />

F3C6 7208 3912 JC P6<br />

nCB BOFC07 3913 CMP AH,7 I IS THIS BW CARD<br />

nCB 7403 3914 J' P6<br />

nco E98101 3915 JMP<br />

noo 3916 P6: i WRITE_AC_CONTINUE<br />

Floa 8An 3917 HOV AH,BL ; GET ATTRIBUTE TO AH<br />

F30Z 50 3918 PUSH AX I SAVE ON STACK<br />

Fl03 SI 3919 PUSH ex ; SAVE WRITE COUNT<br />

F3D4 ESC OFF 39Z0 CALL FlNO_POSITlOH<br />

F30? 8BFB ]92:1 HOY DI.BX • ADDRESS TO 01 REGISTER<br />

n09 59 3922 POP ex ~ WRITE COUNT<br />

FlOA 58 3923 pop ex J CHARACTER IN BX REG<br />

F30B 3924 1'7: ; WRITE_LOOP<br />

3925<br />

3926 ; ------ WAlT FOR HORIZONTAL RETRACE<br />

3927<br />

F30B 8B166300 3n8 MOY DX.ADDR_6645 ; GET BASE ADDRESS<br />

nOf 63C206 3929 ADD DX.6 i POINT AT STATUS PORT<br />

F3El 3930 P6:<br />

F3E2 EC 3931 IN Al,DX ; GET STATUS<br />

BE3 A801 3932 TEST Al.t I IS IT LOW<br />

F3E5 75FB 39~3 JUZ P6 I WAIT UNTIL IT IS<br />

F3E7 FA 3934 ell ; NO MORE INTERRUPTS<br />

FlEa 3935 P9:<br />

FlEe EC 3936 IN .U,DX ; GET STATUS<br />

F3E9 ASOI 3937 TEST Al,l ; IS IT HIGH<br />

FlEB 74FB 3936 JZ P9 ; WAIT UNTIL IT IS<br />

FlED 8BC3 3939 MOV Ax.ex ; RECOVER THE CHAR/ATTR<br />

F3EF AS 3940 STOSW ; PUT THE CHAR/ATTR<br />

F3FO Fa 3941 sn ; INTERRUPTS BACK ON<br />

F3F1 E2E8 3942 j AS MANY TIMES AS REQUESTED<br />

F3F3 E9DIFD 3943<br />

3944<br />

3945 .----------------------------------------­<br />

394. .WRITE_C_CURRENT<br />

3947 THIS ROUTINE WRITES THE CHARACTER AT<br />

3946 THE CURRENT CURSOR POSITION. ATTRIBUTE UNCHANGED<br />

3949 ;INPUT<br />

3950 ( AH) : CURRENT CRT MODE<br />

3951 (BH) = DISPLAY PAGE<br />

3952 (CX) : COUNT OF CHARACTERS TO WRITE<br />

3953 tAll = CHAR TO WRITE<br />

3954 (OS) = DATA SEGMENT<br />

3955 (ES) = REGEN SEGMEtlT<br />

3956 .OUTPUT<br />

3957 NONE<br />

3956 ; -------­--------­-­----­________________---­<br />

F3F6 3959 WRITE_C_CURRENT PROC NEAR<br />

F3F6 BOFC04 396-0 eMP AH.4 IS THIS GRAPHICS<br />

F3F9 7208 396.1 JC PI0<br />

F3FB 80FC07 3962 CMP AH.7 IS THIS Bioi CARD<br />

F3FE 7403 3963<br />

J'<br />

Pl.<br />

F400 E97EOI 3964 JMP GRAPHICS_WRITE<br />

F403 3965 PIO:<br />

F403 50 396-6 PUSH AX ; SAVE ON STACK<br />

F404 51 3967 PUSH CX ; SAVE WRITE COUNT<br />

F40S E89FFF 3966 CALL FIND_POSITION<br />

F40e SBFB 3969 HOV DI.BX ; ADDRESS TO 01<br />

F40A S9 3970 POP CX ; WRITE coutn<br />

F40B 58 3971 POP ; BL HAS CHAR TO WRITE<br />

F40C 3912 PH: i WRITE_LOOP<br />

3973<br />

3974 j------ WAIT FOR HORIZONTAL RETRACE<br />

3975<br />

F40C 8S166300 3976 HOY OX , AODR_6845 ; GET BASE ADDRESS<br />

F410 83C206 3977 ADD DX.6 I POINT AT STATUS PORT<br />

f413 3976 pt2:<br />

F413 EC 3979 IN AL.DX GET STATUS<br />

F414 A801 3960 TEST AL,I IS IT LOW<br />

F416 7SfB 3961 JNZ PI2 ; WAIT UNTIL IT IS<br />

F418 FA 3962 ClI ; NO MORE INTERRUPTS<br />

F419 3963 PI3:<br />

F419 EC 3964 IN AL,OX I GET STATUS<br />

F41A A801 3965 TEST Al.t ;; IS IT HIGH<br />

A·54


LaC OBJ LINE SOURCE<br />

f41C 74F8 3986 JZ P13 ; WAIT UNTIL IT IS<br />

F41£ BAC3 3987 MDV AL,BL ; RECOVER CHAR<br />

F420 AA 3968 SlOSS ; PUT THE CHAR/ATTR<br />

F421 47 3989 INC Dr ; BUNP POINTER PAST ATTRIBUTE<br />

F422 E2E8 3990 LOOP P11 ; AS MANY TII1ES AS REQUESTED<br />

F424 E9AOFD 3991 JMP VIDEO_RETURN<br />

3992 WRITE_C_CURRENT EHOP<br />

3993 j -------------------------------------------­<br />

3994 j READ DOT -- WRITE DOT<br />

3995 ; THESE ROUTINES WIll WRITE A DOT. OR READ THE<br />

3996 DOT AT THE INDICATED LOCATION<br />

3997 ENTRY -­<br />

399S OX = ROW (0-199) (THE ACTUAL VALUE DEPENDS ON THE MODE)<br />

3999 C'I( = COLUMN ( 0-639) ( THE VALUES ARE NOT RANGE CHECKED)<br />

4000 Al = DOT VALUE TO WRITE (I. 2 OR 4 BITS DEPENDING ON MODE.<br />

4001 REQ'D FOR WRITE DOT ONLY. RIGHT JUSTIFIED)<br />

4002 BIT 7 OF AL : 1 INDICATES XOR WE VALUE INTO THE LOCATION<br />

4003 OS = DATA SEGMENT<br />

4004 ES = REGEN SEGMENT<br />

4005<br />

4000 EXIT<br />

4007 AL :: DOT VALUE REAO, RIGHT JUSTIFIED, READ ONLY<br />

4008 J-------------------------------------------­<br />

4009 ASSUME CS :CODE .DS:DATA. ES: DATA<br />

F427 4010 REAO_oDT PROC NEAR<br />

F427 E83100 4011 CALL 03 • DETERMINE BYTE POSITION Of DOT<br />

F42A 268A04 4012 HOV AL,ES:(SIJ ; GET THE BYTE<br />

F420 22C4 4013 AND AL.AH • MASK OFf THE OTHER BITS IN THE BYTE<br />

F42F 02EO 4014 SHL AL,CL ; LEFT JUSTIfY THE VALUE<br />

F431 8ACE 4015 HDV Cl,DH ; GET NUMBER OF BITS IN RESULT<br />

F433 02CO 4016 OOL AL,CL ; RIGHT JUSTIFY THE RESULT<br />

F435 E98FFD 4017 JHP VIDEO.RETURN ; RETURN FROM VIDEO 10<br />

4018 ENOP<br />

4019 <br />

F436 4020 IomITE.DOT PROC NEAR <br />

F438 50 4021 PUSH AX SAVE DOT VALUE<br />

1"""""\ F439 50 4022 PUSH AX TWICE<br />

F43A E61EOO 4023 CALL R3 DETERMINE BYTE POSITION OF THE ~OT<br />

F430 02E8 4024 SHR AL.CL SHIFT TO SET UP THE BITS fOR OUTPUT<br />

F43F 22C4 4025 Mm AL.AH STRIP OfF THE OTHER BITS<br />

F441 268AOC 4026 MOV CL,ES:[SI1 ; GET THE CURRENT BYTE<br />

F444 58 4027 POP BX ; RECOVER XOR flAG<br />

F445 F6C380 4028 TEST BL.80H ; IS IT ON<br />

F448 750D 4029 JNZ .,<br />

; YES. XOR THE DOT<br />

F44A F604 4030 NOT AH ; SET THE MASK TO REMOVE THE INDICATED BITS<br />

F44C 22CC 4031 AND CL,AH<br />

F44E QAel 4032 00 AL.CL ; OR IN THE NEW VALUE OF THOSE BITS<br />

F450 4033 Rl : ; FINISH_DOT<br />

F450 268804 4034 MOV ES:(SI1.AL ; RESTORE THE BYTE IN MEMORY<br />

F453 58 4035 rop AX<br />

F454 E970FO 4036 JMP VIDEO.RETURN ; RETURt~ FROM VIDEO 10<br />

F457 4037 R2 ; ; XOR_OOT<br />

F457 32Cl 4038 XOO AL,CL ; EXCLUSIVE OR THE DOTS<br />

F459 ESFS 4039 JMP .,<br />

; FINISH UP THE W1HTWG<br />

4040 WRITE.DOT ENOP<br />

4041 ; -------------------------------------------­<br />

4042 ; THIS SUBROUTINE DETERMINES THE REGEN BYTE LOCATION OF THE<br />

4043 ; IHDICATED ROW COLUMN VALUE IN GRAPHICS MODE.<br />

4044 ENTRY -­<br />

4045 OX :: ROW VALUE (0-1991<br />

4046 ex = COLUMN VALUE (0-639)<br />

4047 EXIT -­<br />

4048 51 ;: OFFSET INTO REGEN BUFFER FOR BYTE OF INTEREST<br />

4049 AH = MASK TO STRIP OFF THE BITS OF INTEREST<br />

4050 CL ::; BITS TO SHIFT TO RIGHT JUSTIFY THE MASK IN AH<br />

4051 CH = # BITS IN RESULT<br />

4052: j -------------------------------------------­<br />

F458 4053 03 PROC HEAR<br />

F4SB 53 4054 PUSH BX ; SAVE ex OURING OPERATION<br />

F45C 50 4055 PUSH AX ; WILL SAVE AL DURING OPERATION<br />

4056<br />

4057 ;------ DETERMINE 1ST BYTE IN IDICATEO ROW BY MULTIPLYING ROW VALUE BY 40<br />

4058 ;------ ( LOW BIT OF ROW DETERMINES EVEN/ODD. 80 BYTES/ROW<br />

4059<br />

F450 B028 4060 MOV AL.40 <br />

F45F 52 4061 PUSH OX ; SAVE ROW VALUE <br />

A-55


laC OBJ LINE SOURCE<br />

1'460 80HfE<br />

F46J F6E2<br />

F465 SA<br />

F466 F6t201<br />

F469 '7403<br />

F46B 050020<br />

F46E<br />

F46E aeFO<br />

F470 58<br />

F471 seDl<br />

F473 B&e002<br />

F476 B90203<br />

F479 803£490006<br />

F47E n06<br />

1'480 BB8001<br />

F483 B90307<br />

F486<br />

1'486 22EA<br />

F488 03EA<br />

F4814. 031'2<br />

F48C 8AF7<br />

F48e 2AC9<br />

1'490<br />

F490 DOCS<br />

F492 otco<br />

F494 FECI'<br />

1'496 751'8<br />

F498 8AE3<br />

1'4914. D2EC<br />

F49C S8<br />

F49D Cl<br />

F49£<br />

F49E 8AD8<br />

F4Ao 8BCl<br />

F4A2 E86A02<br />

f4A5 8BF8<br />

4062 AND Dl.OFfH ; STRIP OFF ODDIEVEN BIT<br />

4063 MUL DL ; AX HAS ADDRESS OF 1ST BnE OF INDICATED ROW<br />

4064 PDP OX ; RECOVER IT<br />

4065<br />

TEST DL.l<br />

I TEST FOR EVEN/ODD<br />

4066 Jl<br />

J JUMP IF EVEN ROW<br />

••<br />

4067 ADD AX,2000H ; OFFSET TO LOCATION OF 000 ROWS<br />

4068 R4: J EVEN_ROW<br />

4069 I10V SI,AX I HOVE POINTER TO SI<br />

4070 POP AX ; RECOVER AL VALUE<br />

4071 I10V DX,CX j COLUMN VALUE TO ox<br />

4072<br />

4073 j------ DETERMINE GRAA-UCS NOOE CURRENTLY IN EFFECT<br />

4074<br />

4075 , SET UP THE REGISTERS ACCORDING TO THE HOOE<br />

4076 ,CH :: MASK FOR LOW OF COLUt1N ADDRESS ( 7/3 FOR HIGttmf:D RES)<br />

4077 Cl :: • OF ADORESS BITS IN COlUMH VALUE ( 3/2 FOR HIH)<br />

4078 BL = MASK TO SELECT BITS FROH POINTED SHE (80H/COH fOR H,"'<br />

4079 ~ BH:: NUMBER OF VALID BITS IN pOINTED BYTE ( 1/~ fOR H/M)<br />

4080<br />

4081 I1DV BX.2COH<br />

4082 I10V CX.302H J sEl PAR"S FOR MED RES<br />

4083 CMP CRT_HODE.6<br />

4084 JC .s J HANDLE IF MED ARES<br />

4085 MOV BX,180H<br />

4086 MOV CX,703H ~ SET PARH$ FOR HIGH IlES<br />

4087<br />

40ee ;-----~ DETERMINE BIT OFFSET IN BYTE FROM' COllR1N HAst<<br />

4089 RS:<br />

4090 AND CH,OL ; ADDRESS OF PEl WItHIN BytE TO CH<br />

4091<br />

4092 I--~"-~ DETERI1INE: BytE OFFSET FOR THIS lOCA'rION IN COLUHN<br />

4093<br />

4094 SH. DX.CL ; SHIFT BY cORRECT AnoUHT<br />

4095 ADD SI,DX ; IUCREMENT THE POINTER<br />

4096 HOV DH,BH i GET THE I OF BITS IN RESULT TO DH<br />

4097<br />

4098 J------ MULTIPLY BH (VALID SItS IN BYTE) BY CH (BIT OFFSET)<br />

4099<br />

4100 SUB Cl.CL ; ZERO INTO STORAGE LOCATION<br />

4101 R6:<br />

4102 .0. AL,1 ; lEFT JUSTIFY THE VALUE IN AL (FOR WRITE)<br />

4103 ADD CL.CH ; ADO I~ THE BIT OFFSET VALUE<br />

4104 DEC aH I lOOP CONTROL<br />

4105 JNl o. ; ON EXIT, Cl HAS SHIFT COUNT TO RESTORE BITS<br />

4106 MDV AH,SL ; GET MASK TO AH<br />

4107 SH. AH,CL ; HOVE THE MASK TO CORRECT LOCAtION<br />

410S PDP BX ; RECOVER REG<br />

4109<br />

.ET<br />

; RETURN WITH EVERYTlUNG SET UP<br />

.,<br />

4110 EHOP<br />

4111 j -------------------------------------------­<br />

4112 ; SCROll UP<br />

4113 I THIS ROUTINE SCROLLS UP THE INFORMATION ON THE CRT<br />

4114 ENTRY -­<br />

4115 ; CH.CL --=: UPPER LEFT CORNER OF REGION TO SCROLL<br />

4116 DH.Dl = LOWER RIGHT CORNER OF REGION TO SCROll<br />

4117 80TH OF THE ABOVE ARE IN CHARACTER POSITIONS<br />

4118 BH = FILL VALUE FOR BLANKED LINES<br />

4119 I AL = • LINES TO SCROLL (AL=O MEANS BLANK THE ENTIRe FIElD)<br />

412:0 OS = DATA SEGMENT<br />

412:1 ; ES = REGEN SEGMENT<br />

4122 EXIT -­<br />

4123 NOTHING. THE SCREEN IS SCROllED<br />

4124 j ------­---------------------_.. _ .. _ ..-­-------­<br />

412:5 GRAPHICS_UP PRoe NEAR<br />

4126 MOV BL.AL ; SAVE LINE COUNT IN BL<br />

4127 MOV AX.CX ; GET UPPER LEFT POSITION INTO AX REG<br />

4128<br />

4129 ;------ USE CHARACTER SUBROUTINE FOr:! POSITIONING<br />

4130 ,------ ADDRESS RETURNED IS MULTIPLIED BY 2 FROM CORRECT VALUE<br />

413]<br />

4132<br />

4133 MOV OI.AX , SAVE RESULT AS DESTINATION ADDRESS<br />

4134<br />

413S j -----­ DETERMINE SIZE OF WINDOW<br />

4136<br />

A-56


loe OBJ<br />

LINE<br />

SOURCE<br />

F4A7 2BOl<br />

F4A9 81C20101<br />

F4AO DOE6<br />

F4AF DOE6<br />

r"'\ F481 803£490006<br />

F486 7304<br />

F488 00E2<br />

F4SA DIE7<br />

FItSe<br />

F4SC 06<br />

F480 1f<br />

F48E 2AED<br />

F4eo OOEl<br />

F4e2 001:3<br />

F4C4 7420<br />

F4C6 SAC]<br />

F4CB 8450<br />

F4CA F6E4<br />

F4CC BBF7<br />

F4CE 03FO<br />

F4DO 8AE6<br />

F4DZ: ZAf3<br />

F404<br />

F404 EaMOD<br />

F407 8IEEBOlF<br />

F4DS 81EFBOIF<br />

F40F FEee<br />

r"'\ F4El 75Fl<br />

r"'\<br />

F4E3<br />

F4E3 8AC7<br />

F4ES<br />

F4ES E88800<br />

FitE8 81EFBOIF<br />

F4EC FECB<br />

F4EE 75F5<br />

F4FO E9D4FC<br />

F4H<br />

F4F3 8AOE<br />

F4FS EBEC<br />

F4H<br />

F4F7 FD<br />

F4F8 SADS<br />

F4FA 8BCl.<br />

F4FC E81002<br />

4137 SUB ox.ex<br />

4138 ADO OX,lOlH I ADJUST VALUES<br />

4139 SAL DH.l I NULTIPLY a- ROWS BY It SINCE 8 VERT DOTS/CHAR<br />

414Q SAL OHt! I AND EVEN/ODD ROWS<br />

4141<br />

4142 1------ DETERMINE CRT HODE<br />

4143<br />

4144 CMP CRT_mlOE.6 J TEST FOR MEDIUM RES<br />

4145 JNC R7 FIHO_SOURCE<br />

4146<br />

4147 1------ MEDIUM RES UP<br />

4148 SAL OL.! ; I COLUMNS * 2:, SINCE ;2 BYTES/CHAR<br />

4149 SAL Old ; OFFSET *2 SINCE 2: BYTES/tHAR<br />

4150<br />

4151 ;------ DETERttINE THE SOURejE ADDRESS IN THE BUfFER<br />

4152 R7: ; FIND_SOURCE<br />

4153 PUSH ES ; GET SEGMENTS BOTH POINTING TO REGEN<br />

4154 POP OS<br />

4155 SUB CHtCH I ZERO TO HIGH OF COUNT REG<br />

4156 SAL Bl.t ; MULTIPLY tU1BER OF LINES BY 4<br />

4157 SAL Bl.l<br />

4158 JZ ; IF ZERO. THEN BLANt< ENTIRE FIELD<br />

4159 NOV "" Al.St ; GET NUMBER OF LItlES IN AL<br />

4160 MOV AH,80 J 80 SrTES/ROW<br />

4161 NUL AH t DETERMINE OFfSET TO SOURCE<br />

4162 NOV SI,D! ; SET UP SOURCE<br />

4163 ADO 51,AX ; ADD IN OFFSET TO IT<br />

4164 HOY AH,DH I NUMBER OF ROWS IN FIELD<br />

4165 SUB AH,Ol ; DETERMINE NUt1BER TO MOVE<br />

4166<br />

4167 ,------ LOOP THROUGH. MOVING ONE ROW AT A TIME, BOTH EVEN AND ODD fIELDS<br />

4168 pa: ; ROW_lOOP<br />

4169 CALL "17 ; MOVE DUE ROW<br />

4170 SUB SI.2000H-8.0 ; ttOVE TO NEXT ROW<br />

4171 SUB DX ,2000H-80<br />

4172 OEC AH I NUMBER OF ROWS TO tfOVE<br />

4173 J»Z .s J CONTINUE TILL ALL HOVED<br />

4174<br />

4175 ;------ FILL IN THE VACATED LINE(S)<br />

4176 R9: i CLEAR_ENTRY<br />

4177 MOV Al,SH ; ATTRIBUTE TO FILL NITH<br />

4178 RIO:<br />

4179 CAll Rle I CLEAR THAT ROW<br />

4180 SUB DI.2:000H-80 POINT TO NEXT LINE<br />

41S1 DEC BL NUHBER OF LINES TO FIll<br />

4182 JNZ RIO ; CLEAR_LOOP<br />

41S3 JMP VIDEO_RETURN j EVERYTHING DONE<br />

41S4<br />

41SS Rll: ; BLANKJIElO<br />

4186- HOV BL,DH ; SET BLANK COUNT TO EVERYTHING IN FIElD<br />

4187 JNP .9<br />

f CLEAR THE FIELD<br />

4188 GRAPHICS_UP ENDP<br />

4189 ;---------- .....---..---------------------------­<br />

4190 I SCROll DOWN<br />

4191 I THIS ROUTINE SCROllS DOriN THE INFORMATION ON THE CRT<br />

4192 ; ENTRY -­<br />

4193 I CH .CL = UPPER LEFT CORNER OF REGION TO SCROLL<br />

4194 DH,DL ::; LOWER RIGHT CORNER OF REGION TO SCROLL<br />

4195 BOTH OF THE ABOVE ARE IN CHARACTER POSITIONS<br />

4196 BH- = FILL VALUE FOR BLANKED LIHES<br />

4)97 I AL ::; I LINES TO SCROll fAL=O MEANS BLAHI< THE ENTIRE FIELD)<br />

4198 OS =DATA SEGMENT<br />

4199 I ES ::; REGEN SEGMENT<br />

4200 I EXIT -­<br />

4201 ; NOTHING, THE SCREEN IS SCROLLED<br />

42:02 1-------------------------------------------­<br />

4203<br />

4204 GRAPHICS_DOWN PROC NEAR<br />

4205 5TO ; SET DIRECTION<br />

4206 NOV BL,AL J SAVE LINE COUNT IN BL<br />

4207 NOV AX ,ox. ; GET LOWER RIGHT POSITION INTO AX REG<br />

4208<br />

4209 ; ------ USE CHARACTER SUBROUTINE FOR POSITIONING<br />

4210 ; ..----- ADDRESS RETURt~ED IS tlULTIPLIED BY 2 FROt! CORRECT VAWE<br />

4211<br />

4212 CALL GRAPH_POSN<br />

A-57


LOC OBJ LINE SOURCE<br />

F4FF BSFB 4213 MOV DI,AX SAVE RESULT AS DESTINATION ADDRESS<br />

4214<br />

42:15 ;------ DETERMINE SIZE OF WINDOW<br />

4216­<br />

F501 2BDI 4217 SUB DX,ex<br />

F503 81C20101 4218 ADO OX.I01H ; ADJUST VALUES<br />

F507 OOE6 4219 SAL DH.1 ; NULTIPLY I ROWS BY 4 SINCE 8 VERT DOTS/CHAR<br />

F509 DOE6 4220 SAL DH .I ; AND EVEN/ODD ROWS<br />

4221<br />

4222 ;------ DETERMINE CRT HOOE<br />

4223<br />

F508 603E490006 4224 CMP ; TEST FOR MEDIUM RES<br />

F510 7305 4225 JNC FIND_SOURCE_OOWN<br />

4226<br />

4227 ;------ MEDIUM RES DOWN<br />

F512 00£2 4228 SAL CL.l I .. COLUMNS v 2, SINCE 2 SYTES/CHAR (OFFSET OK J<br />

F514 DIE7 4229 SAL DI,! ; OFFSET -112 SINCE 2. BYTES/CHAR<br />

F516 47 4230 INC 01 ; POINT TO LAST BYTE<br />

4231<br />

4232 ; -----­ DETERMINE THE SOURCE ADDRESS IN THE BUFFER<br />

F517 4233 R12! ; FIND_SOURCE_DOWN<br />

F517 06 4234 PUSH ES ; BOTH SEGMENTS TO REGEN<br />

Fs18 IF 4235 POP OS<br />

F519 2AEO 4236 SUB CH.CH ; ZERO TO HIGH OF COUNT REG<br />

F516 81C7FOOO 4237 ADO 01.240 ; POINT TO LAST ROW OF PIXELS<br />

FSlF Don 4238 SAL BLol ; MULTIPLY NUMBER OF LINES BY 4<br />

F52.1 Don 4239 SAL BL.I<br />

F523 742E 4240 JZ RI. ; IF ZERO. THEN BLANK ENTIRE FIELD<br />

F525 8AC3 4241 MOV AL,BL ; GET NUtlBER OF LINES IN AL<br />

F527 8450 4242 MOV AH,80 ; 80 BYTES/ROW<br />

F529 F6E4 4243 MUl AH ; DETERMIHE OFFSET TO SOURCE<br />

F526 8BF7 4244 MOV 51,01 ; SET UP SOURCE<br />

F520 2BfO 4245 SUB SI,AX ; SUBTRACT THE OFFSET<br />

F52:f 8AEo 42460 MOV AH,OH j NUMBER OF RO~S IN FIELD<br />

F53) ZAn 4247 SUB AH,6L ; DETERMINE NUMBER TO MOVE<br />

4248<br />

4249 ;------ LOOP THROUGH, MOVING ONE ROW AT A TIME, BOTH EVEN AND ODD FIelDS<br />

F533 4250 PH: ; ROW_LOOP_OO\o.'N<br />

F533 E62100 4251 CALL RI7 ; MOVE OI~E ROW<br />

F536 SlEE50l0 4252 SUB SI,2000H+80 ; MOVE TO NEXT ROW<br />

F53A 81EF5020 4253 SUB OI,2000H+80<br />

F53E FEee 4254 DEC AH ; NUMBER OF ROWS TO MOVE<br />

F540 75F1 4255 JNZ R13 ; CONTINUE TILL ALL MOVED<br />

4256<br />

4257 ;------ FILL IN THE VACATED LINE(S)<br />

F542 4258 RI4: ; CLEAR_ENTRY_DOWN<br />

F542 8AC7 4259 MOV AL.BH ; ATTRIBUTE TO FILL WITH<br />

F544 42600 RIS: ; CLEAR_LOOP_OOWN<br />

F544 E82900 4261 CALL RIB ; ClEAR A ROW<br />

F547 81EfSOZO 4262 SUB DI.2000H+BO ; POINT TO NEXT LINE<br />

F548 FECB 4263 DEC Bl ; NUMBER OF LINES TO FILL<br />

F54D 75FS 4264 JtlZ RI5 ; CLEAR_ LOOP_DOI.IN<br />

F54F Fe 4265 CLO ; RESET THE OIREcTION FLAG<br />

F550 E974FC 4266­ JMP VIDEO_RETURN ; EVERYTHING DONE<br />

4267<br />

F553 4268 RI6: ; BLA~IKJIELO_OOWN<br />

F553 SADE 4269 MOV BL,OH ; SET BLANK COUNT TO EVERYTHING IN FIElD<br />

F555 EBEB 4270 JMP RI4 ; CLEAR THE FIELD<br />

4271 GRAPHICS_DOWN ENOP<br />

4272<br />

427"> ;------ ROUTINE TO MOVE ONE ROW OF INFORMATION<br />

4274<br />

F557 4275 RI7 PROC NEAR<br />

F557 BACA 4276 MOV CL,DL ; NUMBER OF BYTES IN THE ROW<br />

F559 56 4277 PUSH SI<br />

F55. 57 4278 FUSH 01 SAVE POIHTERS<br />

F558 F3 4279 REP MOVSB MOVE THE EVEN FIELD<br />

F55C A4<br />

F550 SF 4280 POP 01<br />

F55E Sf 4281 POP S1<br />

F55F 81C6002:0 4282 ADO SI,ZOOOH<br />

F563 81C70020 4283 ADO 01.2000H ; POINT TO THE ODD FIelD<br />

F567 56 4284 PUSH SI<br />

FSb8 57 4285 PUSH 01 ; SAVE THE POINTERS<br />

F569 BACA 4286 MOV CL.Ol I COUNT BA.CK<br />

A-58


lOC OBJ LINE SOURCE<br />

FS6B F3 4287 REP MOVSB ; MOVE THE ODD FIELD<br />

FS6C A4<br />

FS6D SF 4288 POP or<br />

FS6E SE 4289 rop 5r ; POINTERS BACK<br />

FS6F C3 4290 RET ; RETURN TO CALLER<br />

4291 R17 ENOP<br />

4292<br />

~<br />

4293 ;------ CLEAR A SINGLE ROW<br />

4294<br />

F570 4295 R18 PROC NEAR<br />

F570 6ACA 4296 MOV Cl,Dt ; NUMBER OF BYTES IN FIELD<br />

F572 57 4297 PUSH or SAVE POINTER<br />

F573 F3 4298 REP STOSB STORE THE ~lEW VALUE<br />

F574 AA<br />

FS7S SF 4299 POP or POINTER BACK<br />

F576 61C70020 4300 ADO OI.2000H i POINT TO 000 FIELD<br />

F57A 57 4301 PUSH or<br />

FS7B 6ACA 4302 MOV Cl,DL<br />

F57D F3 4303 REP STOSB FILL THE ODD FIlElD<br />

FS7E AA<br />

F57F SF 4304 POP or<br />

FS80 C3 4305 RET ; RETURN TO CALLER<br />

4306 Ria ENOP<br />

4307 ; -----------------­-­-­----­----------------­<br />

4308 ; GRAPHICS WRITE<br />

4309 THIS ROUTINE WRITES THE ASCII CHARACTER TO THE CURRENT<br />

4310 POSITION ON THE SCREEN.<br />

4311 ENTRY -­<br />

4312 Al = CHARACTER TO WRITE<br />

4313 Bl = COLOR ATTRIBUTE TO BE USED FOR FOREGROUND COLOR<br />

4314 IF BIT 7 IS SET I THE CHJ\R IS XOR '0 INTO THE REGEN BUFFER<br />

4315 (0 IS USED FOR THE BACKGROUND COLOR)<br />

4316 CX = NUMBER OF CHARS TO WRITE<br />

4317 OS = DATA SEGMENT<br />

4318 ES = REGEN SEGMENT<br />

4319 EXIT -­<br />

4320 NOTHING IS RETURNED<br />

4321<br />

4322 GRAPHICS READ<br />

4323 THIS ROUTINE READS THE ASCII CHARACTER AT TIiE CURRENT ClrnSOR<br />

4324 POSITION ON THE SCREEN BY MATCHING THE DOTS ON THE SCREEN TO THE<br />

4325 CHARACTER GENERATOR CODE POINTS<br />

4326 ENTRY -­<br />

4327 NONE (0 IS ASSUMED AS THE BACKGROUNO COLOR<br />

4326 ; EXIT -­<br />

4329 Al ; CHARACTER READ AT THAT POSITION (0 RETURNED IF NONE FOUND)<br />

4330<br />

4331 I FOR BOTH ROUTINES, THE IMAGES USED TO FORM CHARS ARE CONTAINED IN ROM<br />

4332 FOR THE 1ST 128 CHARS. TO ACCESS CHARS IN THE SECOND HALF, THE USER<br />

4333 MUST INITIALIZE THE VECTOR AT INTERRUPT lFH (LOCATION 0007CH) TO<br />

4334 POItn TO THE USER SUPPLIED HBlE OF GRAPHIC IMAGES (6X6 BOXESL<br />

4335 FAILURE TO 00 SO WILL CAUSE IN STRANGE RESULTS<br />

4336 ; ----------­------­---­-----­- - -­-----------­<br />

4337 ASSUME CS: CODE ,DS:DATA. ES : DATA<br />

FS81 4338 GRAPHICS_~?ITE PROC NEAR<br />

F581 B400 4339 MOV AH,O ; ZERO TO HIGH Of CODE POINT<br />

F583 50 4340 PUSH AX i SAVE CODE POINT VALUE<br />

4341<br />

4342 ;------ DETERMINE POSITION IN REGEN BUFFER TO PUT CODE POINTS<br />

4343<br />

FS84 E88501 4344 CALL S26 ; FINO LOCATION IN REGEN BUFFER<br />

F587 8BF8 4345 MOV DI,AX i REGEN POINTER IN 01<br />

4346<br />

4347 ;------ DETERMINE REGION TO GET CODE POINTS FROM<br />

4348<br />

~ FS8958 4349 pOP AX RECOVER CODE POINT<br />

F58A 3C80 4350 eMP AL,80H IS IT IN SECOND HALF<br />

F58C 7306 4351 JAE 51 YES<br />

4352<br />

4353 j------ IMAGE IS IN FIRST HALF, CONTAINED IN ROM<br />

4354<br />

F58E BE6EFA 4355 MOV SI,OFA6EH OFFSET CRT_CHAR_GEN-OFFSET OF IMAGES<br />

F591 OE 4356 PUSH e5 ; SAVE SEGMENT ON STACK<br />

F592 EBOF 4357 JMP SHORT S2 ; DETERMINE_NODE<br />

4358<br />

A-59


LOC OBJ LINE SOURCE<br />

4359 j------ IMAGE IS IN SECOND HALF. IN USER RAM<br />

4360<br />

F594 4361 51:<br />

F594 2e60 4362 SUB AL.SOH j ZERO ORIGIN FOR SECOND HALF<br />

F596 1E 4363 PUSH OS SAVE DATA POINTER<br />

F597 28F6 4364 SUB SI.SI<br />

F599 BEDE 4365 tIDV OS.SI ESTABLISH VECTOR ADDRESSING<br />

4366 ASSUME OS:ABSO<br />

F598 C5367COO 4367 LOS SI.EXT_PTR GET THE OFFSET OF THE TABLE<br />

F59F BCDA 4368 MOV OX.OS GET THE SEGMENT OF THE TABLE<br />

4369 ASSUME OS : DATA<br />

F5Al IF 4370 POP OS ; RECOVER DATA SEGMENT<br />

F5AZ S2 4371 PUSH OX l SAVE TABLE SEGMENT ON STACK<br />

4372<br />

4373 ; -----­ DETERMINE GRAPHICS MODE IN OPERATION<br />

4374<br />

F5A3 4375 52 : ; DETERMINE_MODE<br />

FSA3 OlEO 4376 SAL AX,! I tlULTIPLY CODE POINT<br />

F5A5 OlEO 43n SAL AX,! ; VALUE BY 8<br />

F5A7 OlEO 4378 SAL AX.!<br />

F5A9 03FO 4379 ADD SI.AX ; SI HAS OFFSET OF DESIRED CODES<br />

F5AB 803£490006 4380 CMP CRT_MOOE.6<br />

F580 IF 4381 POP DS j RECOVER TABLE POIHTER SEGMEHT<br />

F581 7:2C 4382 JC 57 ; TEST FOR MEDIUM RESOLUTIOH MODE<br />

4383<br />

4384 1------ HIGH RESOLUTION MODE<br />

F5B3 43~5 S3: j HIGH_CHAR<br />

F583 57 4381:> PUSH ['II j. SAVE REGEN POINTER<br />

F584 56 4387 PUSH 51 ; SAVE CODE POINTER<br />

FSB5 6604 "388 MOV OH,4 ; HUl'18ER OF TIMES THROUGH LOOP<br />

F587 4389 54:<br />

F587 At 4390 Loose ; GET eYTE fROM CODE POINTS<br />

F586 F6C360 4391 TEST eL,S"1-I ; SHOULD WE USE TKE FUNCTION<br />

F5BB 7516 4392­ JNl 56 ; TO PUT CHAR IN<br />

F580 AA 4393 STOSB STORE IN REGEN BUFFER<br />

F58E AC 4394 Loose<br />

F5SF 4395 $5:<br />

F5BF 266885FFIF 4396 MOV ES: (DI+2000H-l J.AL ; StORE IN SECONO HALF<br />

F5C4 83C74F 4397 ADD 01.79 j MOVE TO NEXT ROW IN REGEN<br />

F5C7 FEtE 4398 DEC DH j DONE WITH LOOP<br />

F5C9 75EC 4399 JNZ 54<br />

F5CB 5£ 4400 POP 51<br />

F5CC SF 4401 POP 01 ; RECOVER REGEN POINTER<br />

FSCD 47 4402 INC 01 ; POINT TO NEXT CHAR POSITION<br />

FSCE EtEl 4403 LOOP S3 j MORE CHARS TO WRITE<br />

F500 £9F4F8 4404 JMP<br />

4405<br />

F503 4406 56:<br />

F503 263205 4407 XOR AL.E5:tOIJ i EXCLUSIVE OR WITH CURRENT<br />

F506 AA 4408 STOSB ; STORE THE CODE POINT<br />

F507 At 4409 LeDse ; AGAIN FOR ODD FIELD<br />

F508 263285FFIf 4410 XOR AL.ES:IOl+2000H-ll<br />

F50D EBED 4411 JMP 55 ; BACK TO MAINSTREAM<br />

4412<br />

4413 ; -----­ MEDIUM RESOLUTION WRITE<br />

F50F 4414 S7:<br />

F5DF 6A03 4415 MOV OL.eL ; SAVE HIGH COLOR BIT<br />

F5£1 D1E7 4416 SAl 01,1 ; OFFSET*2 SINCE 2 BYTES/CHAR<br />

F5E3 £80100 4417 CALL 519 ; EXPAND BL TO FULL WORD OF COLOR<br />

F5£6 4418 S8: ; MEO_CHAR<br />

F5£6 57 4419 PUSH 01 ; SAVE REGEN POINTER<br />

FSE7 56 4420 pUSH SI j SAVE THE CODE POINTER<br />

F5£6 6604 4421 HOV OH.4 ; NUMBER OF LOOPS<br />

F5EA 4422 59:<br />

F5EA At 4423 Loose j GET CODE POINT<br />

F5EB £80EOO 4424 CALL 521 ; DOUBLE UP ALL THE BITS<br />

F5EE 23C3 4425 AND AX.BX ; CONVERT THEH TO FOREGROUNl) COLOR ( 0 BACK J<br />

F5FO F6C280 4426 TEST oL,BOH ; IS THIS XOR FUNCTION<br />

F5F3 7407 4427 JZ 510 ; NO, STORE IT IN AS IT IS<br />

F5F5 263225 4428 XOR AH,ES:tDIJ ; DO FUNCTION WITH HALF<br />

F5F8 26324501 4429<br />

FSFC 4430 S10:<br />

XOR AL,ES:IDI+ll ; AND WITH OTHER HALF<br />

,<br />

F5FC 268825 4431 MOV ES:[OIJ.AH I STORE FIRST BYTE<br />

F5FF 26884501 4432 MOV ES;[oI+1J,AL ; STORE SECOND BYTE<br />

F603 AC 4433 LOOSS ; GET CODE POUlT<br />

F604 E8t500 4434 CALL 521<br />

A-60


LOC OBJ LINE SOURCE<br />

F607 23C3 4435 AND Ax.ex ; CONVERT TO COLOR<br />

F609 F6C280 4436 TEST DL.80H J AGAIN. IS THIS XOR FlmCTION<br />

F60e 740A 4437 JZ S11 ; NO I JUST STORE THE VAlUES<br />

F60E 2632"50020 4438 XOR AH.ES:{Dh2000HJ I FUNCTION WITH fIRST HAlF<br />

F613 2632850120 4439 XOR AL,ES:[oli-2001HJ i AND WITH SECOND HAlf<br />

F618 4440 511:<br />

F616 2688ASOO2:0 4441 MOV ES:(DH2000H),AH<br />

F610 2688850120 4442 MOV ES: [01+2000H+l "Al ; STORE IN SECOND PORTION OF BUFFER<br />

F622 83C7$O 4443 ADO 01.60 I POINT TO NEXT LOCATION<br />

F625 FEtE 4444 DEC OH<br />

F627 75CL 4445 JNZ S9 ; KEEP GOING<br />

F629 SE 4446 POP 51 ! RECOVER CODE PONTEA<br />

F62A SF 4447 POP 01 I RECOVER REGEN POINTER<br />

F628 83e702 4448 ADO DI.~ ; POINT TO NEXT CHAR POSITION<br />

F62:E f2B6 4449 LOOP 58 ; NORE TO WRITE<br />

F630 £994F8 4450 JMP VIDEO_RETURN<br />

4451 GRAPHICS_WRITE EHOP<br />

4452 j -----------------"'-... ------------------­<br />

4453 j GRAPHICS READ<br />

4454 ; -------------..--­ -­ --------------------­<br />

F633 4455 GRAPHICS_READ PROC NEAR<br />

F633 [80600 445. CAll 52& ; CONVERTED TO OFFSET IN REGEN<br />

F636 BBFO 4451 MOV SI,AX ; SAVE IN 51<br />

'638 83Ee08 4458 sua SP.8 ; AllOCATE SPACE TO SAVE THE READ CODE POINT<br />

F61B 88EC ..459 MOV BP.SP POINTER TO SAVE AREA<br />

4460<br />

"461 ;------ DETERMINE GRAPHICS MODES<br />

4462:<br />

F630 803E490006 4463<br />

F642 06 4464<br />

F643 IF 4465 POP OS • POINT TO REGEN SEGMENT<br />

F644 1ZlA 4466 JC 5.. ; I'IEDIut1 RESOLUTION<br />

4467<br />

4468 1------ HIGH RESOLUTION READ<br />

4469<br />

4470 ;------ GET VALUES FAoM REGEN BUFFER AI«) CONVERT TO CODE POINT<br />

F646 8604 4471 MOV ; NUMBER OF PASSES<br />

F648 4472 512:<br />

F648 BA04 4473 MOV AL.IsIJ ; GET FIRST BYTE<br />

F64A 884600 4474 MOV lsPI,Al I SAVE IN STORAGE AREA<br />

F640 45 4475 INC BP , NEXT LOCATION<br />

F64E 8A840020 4476 MOV Al.tsi+200OHI I GET LOIolER REGION BYTE<br />

F652 884600 4477 MOV (SPhAL J ADJUST AND STORE<br />

F655 45 4478 INC BP<br />

'6$6 83C650 4479 ADO SI,60 ; POINTER INTO REGEN<br />

F659 FECE 4480 DEc DH ; LOOP CONTROL<br />

F6se 75E8 4481 JHZ SIt ; DO IT SOME HORE<br />

F65D £81790 4462 JtIP SiS I GO MATCH TH-E SAVED CODE POINTS<br />

4483<br />

4484 1------ HEDIUH RESOLUTION READ<br />

F660 448S 513: ; MED_RES_READ<br />

F660 01E6 4486 SAL SId ; OFFSET*! SINCE Z BYTES/CHAR<br />

F662 8604 4487 NOV OH,4 ; NUMBER OF PASSES<br />

F664 4488 S14:<br />

F664 E88600 4469 CALL 52:3 I GET PAIR BYTES FROM REGEN INTO SINGLE SAVE<br />

F667 81C60020 4490 ADD 51. 2000H ; GO TO LOWER REGION<br />

fi6S £68100 4491 CALL sn ; GET THIS PAIR INTO SAVE<br />

F66E 8lE:EBOIF 4492 sua SI.2:000H-80 ; ADJUST POINTER BACK INTO UPPER<br />

F672 FEtE 4493 DEC DH<br />

F674 75EE 4494 JHZ 514 J KEEP GOING UNTl L ALL 8 DONE<br />

4495<br />

4496 1--... ----­ SAVE AREA HAS CHARACTER IN IT, MATCH IT<br />

F676 4497 515: I FIND_CHAR<br />

F676 BF6EF. 4498 MOV Dr ,OFA6EH I OFFSET CRT_CHAR_GEN-ESTABlISH ADDRESSING<br />

F679 DE 4499 PUSH CS<br />

F67A 07 4500 POP ES I CODE POINTS IN CS<br />

F678 83ED08 4501 SUB BP.8 ADJUST POINTER TO BE6IHt-lING OF SAVE AREA<br />

F67£ 8BFS 4502 Mov SIIBP<br />

F680 Fe 4503 eLD ; ENSURE DIRECTION<br />

F681 BODO 4504 MOV Al,O ; CURRENT CODE POINT BEING MATCHED<br />

F683 450S 516:<br />

F683 16 4506 PUSH SS ; ESTABLISH ADDRESSING TO STACK<br />

F684 IF 4507 POP OS ; FOR THE STRING COMPARE<br />

F685 8"8000 4508 MOV DX,l2& 1 NIJt1BER TO TEST AGAINST<br />

F688 4509 S17:<br />

F688 56 4510 PUSH 51 ; SAVE SAVE AREA POINTER<br />

A-61


LOC OBJ LINE SOURCE<br />

F689 57 4511 PUSH 01 i SAVE CODE POINTER<br />

F68A B90800 4512 MOV (x.a i NUMBER OF BYTES TO MATCH<br />

F66D F3 4513 REPE CMPSB COMPARE THE 8 BYTES<br />

f68E A6<br />

F68F SF 4514 POP 01 RECOVER THE POINTERS<br />

f690 Sf 4515 POP 51<br />

F691 741E 4516 JZ 518 J IF ZERO FLAG SET, THEN MATCH OCCURRED<br />

F693 FEeo 4517 INC AL ; NO MATCH, MOVE ON TO NEXT<br />

F695 83C708 4518 ADD 01.6 I NEXT COOE POINT<br />

F698 4A 451'9 DEC OX lOOP CONTROL<br />

F699 75EO 4520 JHZ 517 j DO ALL OF THEM<br />

4521<br />

4522 j--._-- CHAR NOT HATCHED, HIGHT BE IN USER SUPPLIED SECOND HALF<br />

4523<br />

F69B 3eoo 4524 CHP Al.O AL 0 IF ONL'( 1ST HALF SCAHHEO<br />

F690 7412 4525 JE 51. IF = 0, THEN ALL HAS BEEN SCANNED<br />

F69F 2BCO 4526 SUB AX,AX<br />

F6A1 8E08 452.7 HOV DS,AX ESTABLISH ADDRESSING TO VECTOR<br />

4528 ASSUME DS:ABSO<br />

F6A3 C43E7COO 4529 LE5 OI,EXT_PTR j GET POINTER<br />

F6,6,7 aceD 4530 MOV AX,ES ; SEE IF THE POINTER REALLY EXISTS<br />

F6A9 OBC7 4531 OR AX,DI ; IF ALL 0, THEN DOESN'T EXIST<br />

F6AB 7404 4532 JZ 51. ; NO SENSE LOOKING<br />

F6AD B080 4533 MOV AL,I,S I ORIGIN FOR SECOND HALF<br />

F6AF EBD2 4534 JMP 51. ; GO BACK AND TRY FOR IT<br />

4535 ASSUME Ds:OATA<br />

4536<br />

4537 j------ CHARACTER IS FOUND ( AL=O IF NOT FOUND I<br />

F6Bl 4538 S18:<br />

F6Bl 83C408 4539 ADO SP,8 ; READJUST THE STACK. THROW AWAY SAVE<br />

F664 E910FB 4540 JHP VIDEO.RETURN ; ALL DONE<br />

4541 GRAPHICS.READ ENDP<br />

4542 ; -------------------------------------------­<br />

4543 EXPAND.MED.COLOR<br />

4544 THIS ROUTINE EXPANDS THE LOW 2 BITS IN BL TO<br />

4545 FILL THE ENTIRE BX REGISTER<br />

4546 ENTRY -- r"-.<br />

4547 BL = COLOR TO BE USED ( LOW , BITS )<br />

4548 EXIT -­<br />

4549 BX = COLOR TO BE USED ( 8 REPLICATIONS OF THE 2: COLOR BITS I<br />

4550 ; -------------------------------------------­<br />

F6B7 4551 51. PROC NEAR<br />

F6B7 80E303 455, Atm BL,3 ; ISOLATE THE COLOR BITS<br />

F6BA 8AC3 4553 HOV Al,Bl ; COPY TO AL<br />

F6BC 51 4554 PUSH CX ; SAVE REGISTER<br />

F6BD B90300 4555 MOV CX,3 ; NUMBER OF TIMES TO DO THIS<br />

F6CO 4556 S20:<br />

f6CO ODED 4557 SAL AL,l<br />

F6C2 DOEO 4558 SAL AL,I ; lEFT SHIFT BY 2<br />

F6C4 OAD8 4559 OR Bl.Al ; ANOTHER COLOR VERSION INTO 8L<br />

F6C6 E,F8 4560 lOOP 52. ; FILL ALL OF BL<br />

F6C8 8AFB 4561 MOV BH,Bl ; FI LL UPPER PORTION<br />

F6CA 59 4562 POP CX ; REGISTER BACK<br />

F6CB C3 4563 RET ; ALL DONE<br />

4564 51. Etmp<br />

4565 1-------------------------------------------­<br />

4566 EXPAND.BHE<br />

4567 THIS ROUTII1E TAKES THE BYTE IN AL AND DOUBLES ALL<br />

4568 OF THE BITS, TURNING THE 8 BITS INTO 16 BITS.<br />

4569 THE RESULT IS lEFT IN AX<br />

4570 ; -------------------------------------------­<br />

F6CC 4571 521 PRoe NEAR<br />

F6CC 52 4572 PUSH OX ; SAVE REGISTERS<br />

F6CD 51 4573 PUSH CX<br />

F6CE 53 4574 PUSH BX<br />

F6CF BAOOOO 4575 HOV OX,O J RESULT REGISTER<br />

F602 B90100 4576 HOV CX,1 ; MASK REGISTER<br />

F605 4577 S,,:<br />

F605 8BD8 4578 MOV eX,AX ; BASE INTO TEMP<br />

F607 ,309 4579 AND BX,ex USE MASK TO EXTRACT A BIT<br />

F6D9 OB03 4580 OR DX,ex PUT INTO RESULT REGISTER<br />

F6DS OlEO 4581 5HL AX,l<br />

F60D D1E1 4582 SHL ex,! SHIFT 6ASE AND MASK BY 1<br />

F6DF 8608 4583 MOV eX.AX ; BASE TO TEMP<br />

F6E1 ,309 4584 AND BX,ex EXTRACT THE SAME BIT<br />

F6El OB03 4585 OR DX,BX ; PUT INTO RESULT<br />

A-62


LOC OBJ LINE SOURCE<br />

F6E5 DIE 1 4586 5Hl eX.l ; SHIFT ONLY MASK NOW. MOVING TO NEXT BASE<br />

F6E7 73fC 4587 JNe 522 ; USE MASK BIT COMING OUT TO TERMINATE<br />

F6E9 8BC2 4588 MOV AX.OX ; RESULT TO PARM REGISTER<br />

F6EB 5B 4589 POP BX<br />

F6EC 59 4590 POP ex j RECOVER REGISTERS<br />

F6ED SA 4591 POP ox<br />

F6EE C3 4592 RET I ALL DONE<br />

4593 521 ENDP<br />

4594 l------------ - - - ------- - - -------------------­<br />

4595 J HED_READ_BYTE<br />

4596 f THIS ROUTINE WILL TAKE 2 BYTES FROM rtfE REGEN BUFFER.<br />

4597 I COMPARE AGAINST THE CURRENT fOREGROUND COLOR. AND PLACE<br />

4598 ; THE CQRRESPQtmING ONIOFF BIT PATTERN INTO THE CURRENT<br />

4599 POSITION IN THE SAVE AREA<br />

4600 ENTRY -­<br />

4601 SI,OS :: POINTER TO REGEN AREA OF INTEREST<br />

4602 ,BX = EXPANDED FOREGROUND COLOR<br />

4603 BP = POINTER TO SAVE AREA<br />

4604 , EXIT -­<br />

4605 ; SP IS INCPEMENT AFTER SAVE<br />

4606 1-------------------------------------------­<br />

F6EF 4607 S23 PRoe NEAR<br />

F6EF 8A24 4608 HOV AH. [SI 1 ; GET FIRST BYTE<br />

F6Fl 844401 4609 MOV AL.[SI+l1 ; GET SECOND BYTE<br />

F6F4 6900CO 461D HOV eX.DCODDH ; 2: BIT MASK TO TEST THE ENTRIES<br />

F6F7 B200 4611 HOV DL.O ; RESULT REGISTER<br />

F6F9 4612 S24:<br />

F6F9 85Cl 4613 TEST AX.CX ; IS THIS SECTION BACKGROUHD?<br />

F6FB F8 4614 eLe ; CLEAR CARRY IN HOPES THAT IT IS<br />

F6FC 7401 4615 JZ 525 ; IF ZERO. IT IS BACKGROUND<br />

F6FE '9 4616 5Te , WASN'T, so SET CARRY<br />

F6FF 0002 4617 S25: ReL DL,! ; MOVE THAT BIT INTO THE RESULT<br />

F701 DlE9 4618 SHR CXol<br />

F703 DJE9 4619 5HR CX,! , MOVE THE MASK TO THE RIGHT BY 2 BITS<br />

F705 73F2 462. JNe 52. ; DO IT AGAm IF MASK DIDN'T FALL OUT<br />

F707 885600 4621 MOV [BPl,DL ; STORE RESULT IN SAVE AREA<br />

nOA 45 4622 It~C BP ; ADJUST POINTER<br />

F70B C3 4623 RET ; ALL DONE<br />

4624 S23 ENOP<br />

4625 ; - - ----- - - ------------------------------ -­<br />

4626 ; V4_POSITION<br />

4627 ; THIS ROUTINE TAKES THE CURSOR POSITION CONTAINED IN<br />

4626 THE MEMORY LOCATION. AND COtNERTS IT INTO AN OFFSET<br />

4629 I INTO THE REGEN BUFFER, ASSUMING ONE BYTE/CHAR.<br />

4630 FOR MEDIUM RESOLUTION GRAPHICS, THE NUMBER MUST<br />

4631 BE DOUBLED.<br />

4632 ENTRY -- NO REGISTERS,MEMORY LOCATION CURSOR_POSH IS USED<br />

4633 EXIT-­<br />

4634 AX CONTAINS OFFSET INTO REGEN BUFFER<br />

4635 ; --------------------------------- -------­<br />

F70C 4636 52. PROC NEAR<br />

FlOC A15000 4637 HOV AX.CURSOR_POSN ; GET CURRENT CURSOR<br />

F70F 4638 GRAPH_POSH LABEL NEAR<br />

F70F 53 4639 PU5H BX I SAVE REGISTER<br />

F710 8808 4640 HOV BX,AX ; SAVE A COpy OF CURRENT CURSOR<br />

F712 8AC4 4641 HOV AL.AH I GET ROWS TO AL<br />

F714 F6264AOO 4642 HUl BYTE PTR CRT_COLS ; NULTIPLY BY BYTES/COLUMN<br />

F7l8 DIED 4643 5HL AX'! ; MULTIPLY * 4 SINCE 4 ROWS/BYTE<br />

F7lA DIED 4644 SHl AXd<br />

F71C 2AFF 4645 SUB BH,BH ; ISOLATE COLUMN VALUE<br />

F7lE 03C3 4646 ADO AX,BX ; DETERMINE OFFsET<br />

F720 56 4647 POP BX ; RECOVER POINTER<br />

F721 C3 464& RET ; ALL DONE<br />

4649 526 ENDP<br />

4650 ;-------------------------------------------­<br />

4651<br />

4652 , THIS INTERFACE PROVIDES A TElETYPE LIKE INTERFACE TO THE<br />

4653 VIDEO CARD. THE INPUT CHARACTER IS WRITTEN TO THE CURRENT<br />

4654 ClJ;!SOR POSITION. AND THE CURSOR IS MOVED TO THE NEXT POSITION.<br />

4655 IF THE CURSOR LEAVES THE LAST COLUMN OF THE FIELD, THE COLUMN<br />

4656 IS SET TO ZERO. AND THE ROW VALUE IS INCREMENTED. IF THE ROW<br />

4657 ROW VALUE LEAVES THE FIELD. THE CURSOR IS PLACED ON THE LAST ROW.<br />

4658 FIRST COLUMN, AND THE ENTIRE SCREEN IS SCROLLED UP ONE LIUE.<br />

4659 WHEN THE SCREEN IS SCROLLED UP. THE ATTRIBUTE FOR FILLING THE<br />

4660 NEWLY BLANKED LINE IS READ FROM THE CURSOR POSITION ON THE PREVIOUS<br />

4661 LINE BEFORE THE SCROLL. lH CHARACTER MODE. IN GRAPHICS MODE,<br />

A-63


lOC OBJ LINE SOLIRCE<br />

4662 THE 0 COLOR IS USED.<br />

4663 ~ ENTRY -­<br />

4664 (AH) = CURRENT CRT MODE<br />

4665 (AL) = CHARACTER TO BE WRInEN<br />

4666 NOTE THAT BACK SPACE, CAR RET, BEll AND LINE FEED ARE HANDLED<br />

4667 AS COI1MANOS RATHER THAN AS DISPUYABLE GRAPHICS<br />

4668 (BLI = FOReGROUND COLOR FOR CHAR WRITE IF CURRENTLY IN A GRAPHICS f10DE<br />

4669 EXIT -­<br />

4670 All REGISTERS SAVED<br />

~671<br />

F722<br />

F722 50<br />

F723 50<br />

F724 8403<br />

F726 COlO<br />

F728 58<br />

F7Z9 3C08<br />

f'728 7459<br />

F72D 3COD<br />

F72F 745£<br />

F731 3eOA<br />

F733 745E<br />

F735 lC07<br />

F737 7461<br />

F739 6A3E6200<br />

F73D B40A<br />

F73F 890100<br />

F742 COlO<br />

F7" FEe2<br />

F746 3Al64AOO<br />

F74A 753(,<br />

F74C B200<br />

F74E 80F£18<br />

F751 7520<br />

F753<br />

F753 B402<br />

F755 8700<br />

F757 COlO<br />

F759 A04900<br />

F75C 3C04<br />

F75E 12.06<br />

F760 3e07<br />

F762 B700<br />

F764 7506<br />

F766<br />

F766 6408<br />

F768 COlO<br />

f76A SAFe<br />

F76C<br />

F76C 880106<br />

F76F 690000<br />

F772 B618<br />

F774 8A164ADO<br />

F778 FECA<br />

F77A<br />

F77A COlO<br />

F77C<br />

F77C 58<br />

46n: ASSUME CS:CQDE.DS:DATA<br />

4673 WRITE_TTY PROC NEAR<br />

4674 PUSH AX • SAVE REGISTERS<br />

4675 PUSH Ax ; SAVE CHAR TO WRITE<br />

4676 MOV AH.3<br />

4677 INT 10H ; READ THE CURRENT CURSOR POSITION<br />

4678 POP AX ; RECOVER CHAR<br />

4679<br />

4680 ;------ DX NOW HAS THE CURRENT CURSOR pOSITION<br />

4681<br />

4682 CM' AL,e ; IS IT A BACKSPACE<br />

4683 JE U8 j BACK_SPACE<br />

4684 CM" Al.ODH j IS IT CARRIAGE RE11.mN<br />

4685 JE U9 ; CAR_RET<br />

4686 CMP ALtOAH ; IS IT A LINE FEED<br />

4687 JE UIO ; LINEJEED<br />

468a Ct1P AL,07H ; IS IT A BELL<br />

4689 JE Ull ; BELL<br />

4690<br />

4691 ;------ WRITE THE CHAR TO THE SCREEN<br />

4692<br />

4693 MOV BH.ACTIVE_PAGE; GH THE CURRENT ACTIVE PAGE<br />

4694 MOV AH.I0 ; I..'RIT£ CHAR ONLY<br />

4695 t1Qy CX.l ; ONLY ONE CHAR<br />

4696 tNT 10H i WR ITE THE CHAR<br />

4697<br />

4698 ;------ POSITION THE CURSOR FOR NEXT CHAR<br />

4699<br />

4700 IHC OL<br />

4701 eMP OL,BYTE PTR CRT_COLS ; TEST FOR COLUMN OVERflOW<br />

4702 JNl U7 ; SET_CURSOR<br />

4703 MOV DL,D ; COLUMN FOR CURSOR<br />

4704 CM' DH,24<br />

4705 JHZ U6<br />

4706<br />

4707 ; ------ SCROLL REQUIRED<br />

4708 VI:<br />

4709<br />

4710 HOV AH.2<br />

4711 MOV BH,O<br />

4712 INT 10" ; SET TH E CURSOR<br />

4713<br />

4714 1------ DfTERMINE VALUE TO FILL WITH DURING S'ROLL<br />

4715<br />

4716 l10V Al.eRT_MOOE GET THE CURRENT HOOE<br />

4717 CM' Al.4<br />

4718 JC ua READ-CURSOR<br />

4719 CM" Al.7<br />

4720 MOV 8H,0 ; FILL a.llTH BACKGROUND<br />

4721 JNE U3 ; SCROLL-UP<br />

4722<br />

4723 U2: ; READ-CURSOR<br />

4724 HOV AH,e<br />

4725 INT IOH ; READ CHAR/AHR AT CURRENT CURSOR<br />

4726 MOV BH.AH STORE IN BH<br />

472.7<br />

4128 U3: I SCROLL-UP<br />

4729 I10V AX.601H SCROLL ONE LINE<br />

4730 HOV CX,O ; UPPER LEFT CORNER<br />

4731 MOV OH,24 ; LOWER RIGHT ROW<br />

4732 MOV OL,BYTE PTR CRT_COLS ; LOlolfR RIGHT COLutIN<br />

4733 DEC OL<br />

4734 lJ4, , VIDEO-CALL-RETURN<br />

4735 INT 10H ; SCROLL UP THE SCREEN<br />

4736 us: ; TTY-R!;TURN<br />

4737 POP AX ; JilESTORE THE CHARACTER<br />

A-64


LOC OBJ LINE SOURCE<br />

F77D E947FA 4738 JHP VIDEO_RETURN RETURN TO CAllER<br />

4719<br />

nea 4740 U6: l SET-CURSOR-INC<br />

F7BD FEC6 4741 INC DH ; NEXT ROW<br />

F782 4742 U7: SET-CURSOR<br />

F762 B40Z 4743 HOV AH .2<br />

F784 EBF4 4744 JHP U4 J ESTABLISH THE NEW CURSOR<br />

~ 4745<br />

4746 ;------ BACK SPACE FOUND<br />

4747<br />

F786 4748 US:<br />

F786 eOFAao 4749 CHP OL.O ; ALREADY AT END OF LINE<br />

F789 74F7 4750 JE U7 SET_CURSOR<br />

F7BB FECA 4751 DEC Dl NO -­ JUST MOVE IT BACK<br />

F7BD f6F! 4752 JMP U7 SET_CURSOR<br />

4753<br />

475'1­ j-----~ CARRIAGE RETURN FOUND<br />

4755<br />

F78F 4756 U9:<br />

F7Sf 82:00 4757 HDV CL,O ; HOVE TO FIRST COlUtfN<br />

f7'91 EBEF 4758 J"P U7 ; SET_CURSOR<br />

4759<br />

4760 ;------ LINE FEED FOUND<br />

4761<br />

F793 4762 UlO:<br />

F793 BOFEle 4763 CMP OH.24 ; BOTTOM OF SCREEN<br />

F796 75E8 4764 JNE U. ; YES, SCROLL THE SCREEN<br />

F798 ESB9 4765 JHP Ul ; NO. JUST SET THE CURSOR<br />

4766<br />

4767 j~----- BElL FOUND<br />

4768<br />

F79A 4769 Ull:<br />

F79A 8302 4770 HOV BL,Z ; SET UP COUNT FOR BEEP<br />

F79C ESC7EE 4771 CALL BEEP ; SOUND THE POD BElL<br />

F79f fBDB 477Z jMP U5 ; TTY_RETURN<br />

4773 ENDP<br />

~ 4774 j ~------------------------------------------<br />

4775 LIGHT PEN<br />

4776 THIS ROUTINE TESTS THE LI~HT PEN SWITCH AND THE LIGHT<br />

4777 PEN TRIGGER. IF BOTH ARE SET, THE LOCATION OF THE LIGHT<br />

4778 PEN IS DETERMINED. OTHERWISE, A RETURN WITH NO INFORMATION<br />

4779 IS MADE.<br />

4780 ON EXIT:<br />

4781 IAH) :: 0 IF NO LIGHT PEN INFORMATION IS AVAILABLE<br />

4782: Bx.ex,Ox ARE DESTROYED<br />

4783 'AH) :: 1 IF LIGHT PEN IS AVAILABLE<br />

4784 {OH,OU :: ROW,COLUMN OF CURREtrr LIGHT PEN POSITION<br />

4785 (CHI = RASTER POSITIml<br />

4786 (BX) = BEST GUESS AT PIXEL HORIZONTAL POSITION<br />

4787 ; -------------------------------------------­<br />

4788 ASSUME CS:COOE.DS:OATA<br />

4789 j------ SUBTRACT_TABLE<br />

F7U 4790 Vl LABEL BYTE<br />

F7Al 0]03050503030304 4791 3.3,5.5.3.3.3.4 ;<br />

F7A9 4792 PRoe NEAR<br />

4793<br />

4794 ;------ WAIT FOR LIGHT PEN TO BE DEPRESSED<br />

4795<br />

F7A9 6400 4796 HDV AH,O SET NO LIGHT PEN RETURN CODE<br />

F7AB 88166300 4797 MDV DX,ADDR_6845 ; GET BASE ADDRESS OF 6845<br />

F7AF 83C206 4798 ADD OX.6 ; POINT TO STATUS REGISTER<br />

F7BZ EC 4799 Hi AL.OX ; GET STATUS REGISTER<br />

FiB3 A804 4800 TEST AL,4 ; TEST LIGHT PEN SWITCH<br />

F7B5 7578 4801 JNZ V. i NOT SET. RETt.mN<br />

4802<br />

4803 j -----­ NOW TEST FOR LIGHT PEN TRIGGER<br />

4804<br />

F7S? A802: 4805 TEST AL.2 ; TEST LIGHT PEN TRIGGER<br />

F7B9 747E 4806 JZ V7 j RETURN WITHOUT RESETTING TRIGGER<br />

4807<br />

4808 j------ TRIGGER HAS BEEN SET. READ THE VALUE IN<br />

4809<br />

FlBB 8410 4810 MDV AH.l6 ; LIGHT PEN REGISTERS ON 6845<br />

4811<br />

4812 ;-----­ WPUT REGS POINTED TO BY AH, AND COHVERT TO ~OW COLUMN IH OX<br />

4813<br />

F7BO 88166300 4814 HOV j JlODRESS REGISTER FOR 6845<br />

A-65


LOC OBJ LINE SOURCE<br />

F7Cl 8AC4<br />

F7e] EE<br />

F7C4 42<br />

F7C5 EC<br />

F7C6 SAEe<br />

F7e8 4.1.<br />

F7C9 FEC4<br />

F7CB 8AC4<br />

F7CD EE<br />

F7eE 42<br />

F7CF EC<br />

F700 8AE5<br />

F102 8A1E4QOO<br />

F706 ZAFF<br />

F70B ZE8A9FAIF7<br />

FlOD 2BC3<br />

nOF 26064EOO<br />

F7E3 790]<br />

PES B80000<br />

F7E8<br />

F7E8 8103<br />

F7EA 803E490004<br />

F7EF 722A<br />

F7F 1 803E490007<br />

F7F6 7423<br />

F7F8 62:28<br />

F7FA F6FZ<br />

F7FC 8AE8<br />

F7FE 02EO<br />

F800 BADe<br />

F802 ZAFF<br />

F804 803E490006<br />

F809 7504<br />

F808 6104<br />

F90D DOE4<br />

F80F<br />

F80F D3E3<br />

F811 8.1.04<br />

F813 8AFO<br />

F815 DOEE<br />

F817 DOEE<br />

F619 EB12<br />

F818<br />

F81B F6364AOO<br />

F81F 8AFO<br />

F821 8.1.04<br />

F823 02EO<br />

F625 8AE8<br />

F827 BADe<br />

F829 32F'F<br />

F828 D3E3<br />

F820<br />

F820 8401<br />

F8ZF<br />

FeZF 52<br />

F630 68166300<br />

F634 83C207<br />

F837 EE<br />

4615 MOV Al.AH ; REGISTER TO READ<br />

4816 OUT DX,AL I SET IT UP<br />

4817 INC ox ; DATA REGISTER<br />

4818 IN AL,OX ; GET THE VALUE<br />

4819 MOV CH,AL ; SAVE IN CX<br />

4820 DEC OX ; ADDRESS REGISTER<br />

4821 INC AH<br />

4822 MOV AL.AH SECDND DATA REGISTER<br />

4623 OUT OX,Al<br />

4824 INC OX POINT TO DATA REGISTER<br />

4925 IN Al,DX GET SECOND DATA VALUE<br />

4626 MOV AH,CH ; AX HAS INPUT VALUE<br />

4827<br />

4826 ;------ AX HAS THE VALUE READ IN FROM THE 6845<br />

4629<br />

4630 MOV BL,CRT_MODE<br />

4831 SUB BH,BH ; MODE VALUE TO ax<br />

4832 HOV 8l,CS:vUBXl ; DETERMINE AMOUNT TO SUBTRACT<br />

4633 SUB AX.BX ; TAKE IT AWAY<br />

463,+ SUB AX,CRT_START ; CONVERT TO CORRECT PAGE OOIGIN<br />

4635 JNS V2 IF POSITIVE. DETERMINE HaDE<br />

4636 HOV AX,Q ;


LaC OBJ LINE SOURCE<br />

F636 5.60 4891 POP OX ; RECOVER VALUE<br />

F839 4892 V7: RETURN_NO_RESET<br />

F839 SF 4893 POP Dr<br />

F83A 5f 4894 POP sr<br />

F83B IF 4895 POP os ; DISCARD SAVED BX,CX,DX<br />

Fe3C IF 4896 POP os<br />

F83D IF 4897 POP OS<br />

F83E IF 4698 PDP os<br />

r"\<br />

F83F 07 4899 POP ES <br />

F840 CF 4900 IRET <br />

4901 READ LPEN EHDP <br />

4902 ;--- INT 12 --------------------------------­<br />

4903 ; HENORY_SIZE_DETERMINE<br />

4904 THIS ROUTINE DETERMINES THE AHOUNT OF MEMORY IN THE SYSTEM<br />

4905 AS REPRESENTED BY THE SWITCHES ON THE PLANAR. NOTE THAT<br />

4906 THE SYSTEM HAY NOT BE ABLE TO L;SE I/O MEMORY UNLESS THERE<br />

4907 IS A FULL COMPLEMENT OF 64K BYTES ON THE PLANAR.<br />

4908 INPUT<br />

4909 NO REGISTERS<br />

4910 THE MEMORY SIZE VARIABLE IS SET DURING POWER ON DIAGNOSTICS<br />

4911 ACCORDING TO THE FOLLOWING HARDWARE ASSUMPTIONS:<br />

4912 PORT 60 BITS 3.2 =- 00 - 16K BASE RAM<br />

4913 01 - 32K BASE RAM<br />

4914 10 - 46K BASE RAM<br />

4915 11 - 64K BASE RAM<br />

4916 PORT 62 BITS 3-0 INDICATE AMOUNT Of I/O RAM IN 32K INCREMENTS<br />

4917 E. G•• 0000 - NO RAM IN 1/0 CHANNEl<br />

4918 0010 - 64K RAM IN I/O CHANNEl, ETC.<br />

4919 ; OUTPUT<br />

4920 (AX I = NUMBER OF CONTIGUOUS lK BLOCKS Of MEMORY<br />

4921 ; -------------------------------------------­<br />

4922 ASSUME CS:CODE,DS:DATA<br />

f841 4923 MEMORY_SIZE_DETERMINE PROC FAR<br />

F841 FB 4924 STI j INTERRUPTS BACK ON<br />

FS42 IE 4925 PUSH OS ; SAVE SEGMENT<br />

F843 684000 4926 HOV AX. DATA ; ESTABLISH ADDRESSING<br />

r"\ F846 BED8 4927 HOV DS.AX<br />

F848 A11300 4928 HOV AX. MEMORY_SIZE ; GET VALUE<br />

F848 IF 4929 POP OS ; RECOVER SEGMENT<br />

F84C CF 4930 IRET ; RETURN TO CALLER<br />

4931 MEMORY_SIZE_DETERMINE. ENDP<br />

4932 ;--- INT 11 --------------------------------­<br />

4933 EQUIPMENT DETERMINATION<br />

4934 THIS ROUTINE ATTEMPTS TO DETERMINE WHAT OPTIONAL<br />

4935 DEVICES ARE ATTACHED TO THE SYSTEM.<br />

4936 j INPUT<br />

4937 NO REGISTERS<br />

4936 THE EqUIP_FLAG VARIABLE IS SET DURING THE POWER ON DIAGNOSTICS<br />

4939 USING THE fOLLOWING HARDWARE ASSUMPTIONS:<br />

4940 PORT 60 = LOW ORDER BYTE Of EQUPMENT<br />

4941 PORT 3FA = INTERRUPT 10 REGISTER OF 8250<br />

4942 BITS 7-3 ARE ALWAYS 0<br />

4943 PORT 376 = OUTPUT PORT Of PRINTER -- 6255 PORT THAT<br />

4944 CAN BE READ AS WELL AS WRITTEN<br />

4945 ; OUTPUT<br />

4946 (AX) IS SET. BIT SIGNIfICANT, TO INDICATE ATTACHED I/O<br />

49'47 BIT 15,14 = NUMBER OF PRINTERS ATTACHED<br />

4948 BIT 13 NOT USED<br />

4949 BIT 12 = GAME I/O ATTACHED<br />

4950 BIT 11.10.9 = NUMBER Of RS232 CARDS ATTACHED<br />

4951 BIT 8 UNUSED<br />

4952 BIT 7.6 :: NUMBER OF DISKETTE DRIVES<br />

4953 00=1. 01=2. 10=3. 11=4 ONLY IF BIT 0 :: 1<br />

4954 BIT 5.4 :: INITIAL VIDEO MODE<br />

4955 00 - UNUSED<br />

4956 01 - 40X25 Bioi USING COLOR CARD<br />

4957 10 - aOX25 Bioi USING COLOR CARD<br />

4958 11 - aOX25 BW USING BW CARD<br />

4959 BIT 3.2 = PLANAR RAM SIZE (OO=16K,Ol=32K.IO=48Koll=64KI<br />

4960 BIT 1 NOT USED<br />

4961 BIT 0 = IPl FRaN DISKETTE -- THIS BIT INDICATES THAT THERE ARE DISKETTE<br />

4962 DRIVES ON THE SYSTEM<br />

4963<br />

4964 NO OTHER REGISTE~S AFfECTED<br />

4965 ; ------------------------------ -------------­<br />

4966 ASSUMf CS:CQOE.DS:DATA<br />

A-67


LaC OBJ LINE SOURCE<br />

F840 4967 EQUIPMENT PROC FA.<br />

F840 F8 4968 ST! • INTERRUPTS BACK ON<br />

F84E IE 4969 PUSH DS j SAVE SEGMENT REGISTER<br />

F84F 884000 4970 MOV AX. DATA ; ESTABLISH ADDRESSING<br />

F852 SEDS 4971 MOV OS,AX<br />

F654 A11000 4972 NOV AX. EQUIP_FLAG i GET THE CURRENT SETTINGS<br />

F857 IF 4973 pop OS ; RECOVER SEGMENT<br />

f8S8 CF 4974 IRET I RETURN TO CALLER<br />

4975 EQUIPMENT ENDP<br />

4976 ;--- INT 15 --------------------------------­<br />

4977 ; CAssenE 1/0<br />

4976 (AH) = 0 TURN CASSETTE HOTOR ON<br />

4979 (AH) :; 1 TURN CASSETTE HOTOR OFf<br />

4980 [AH) = 2 READ 1 OR MORE 256 BYTE BLOCKS FROM CASSETTE<br />

4981 (ES,BX) :;: POINTER TO DATA BUFFER<br />

4982 {ex) = COUNT OF BYTES TO READ<br />

4983 ON EXIT:<br />

4984 f!S.BX) = POINTER TO LAST BYTE READ + 1<br />

4985 (OX) = COUHT OF BYTES ACTUALLY READ<br />

4986 (Cv) = a IF NO ERROR OCCURRED<br />

4987 = 1 IF ER~OR OCCURRED<br />

4988 (AH J :;; ERROR RETURN IF (eYJ: 1<br />

4989 ;: 01 IF CRC ERROR WAS DETECTED<br />

4990 =­ 02 IF DATA ~ANSITIONS ARE LOST<br />

4991 = 04 IF tlO DATA WAS FOUt~D<br />

49n<br />

{AH 1 = 3 WRITE 1 OR MORE 256 BYTE BLOCKS TO CASSETTE<br />

4993 (ES.BX) .:: POINTE~ TO DATA BUFfn<br />

4994 (ex) = COUNT OF BYTES TO WRITE<br />

4995 ON EXIT:<br />

4996 (EX,8Xl = POINTER TO LAST BYTE WRITTEN + 1<br />

4997 (CXI = 0<br />

4996 (AM) = ANY OTHER THAN ABOVE VALUES CAUSES (CYJ= 1<br />

4999 AND (AH)= 60 TO BE RETURNED UtNALID COHMAND).<br />

5000 ;-------------------------------------------­<br />

5001 ASSUME DS:DATA, ES:NOTHING.SS:NOTHING.C5:CODE<br />

F859 5002 CASSETTE_IO PRoe FAR<br />

F859 F8 5003 STI INTERRUPTS BACK ON<br />

F85.&. 1E 5004 PUSH as I ESTABLISH ,.,DDRESSIHG TO DATA<br />

Fase 50 5005 PUSH AX<br />

Fast 884000 5006 MOV AX. DATA<br />

F85F 8£08 5007 NOV os. AX<br />

F861 802671007F 5006 AND BIOS_BR EAK. 7FH i HAKE SURE BREAK flAG IS OFF<br />

F866 56 5009 POP AX<br />

F867 E80400 5010 CALL WI J CASSETTE_IO_CONT<br />

F86.&. 1F 5011 POP os<br />

F868 CA02:00 5012 RET INTERRUPT RETVRN<br />

5013 CASSETTE_IO ENDP<br />

F86E 5014 NI PROC NEAR<br />

5015 1-----------­-------------------------------­<br />

5016 ; PURPOSE:<br />

5017 I TO CALL APPROPRIATE ROUTINE DEPENDING ON REG AH<br />

5018<br />

5019 AH ROUTINE<br />

5020<br />

5021 MOTOR ON<br />

502:2 I I MOTOR OFF<br />

5023 ; 2 READ CASSETTE BLOCK<br />

5024 WRITE CASSETTE BLOCK<br />

5025<br />

5026<br />

F86£ OA£4 5027 OR AH,AH f TURN ON MOTOR?<br />

F870 7413 502:8 JZ MOTOR_ON iYES. 00 IT<br />

F872: FEte 502:9 DEC AH ;TURN OFF MOTOR?<br />

F874 7418 5030 JZ MOTOR_OFF IYES, DO IT<br />

F876 FEee 5031 DEC AH ,READ CASSETTE BLOCK?<br />

F678 741A 5032 JZ READ_BLOCK ,YES, DO IT<br />

F67A FEte 5033 DEC AH ;WRITE CASSETTE BLOCK?<br />

Fe7t 7503 5034 JNZ W2 ; NOT_DEFINED<br />

F87E E92101 5035 J"P WRITE_BLOCK ;YES, DO IT<br />

5036<br />

F881 5037 W2: jCOMHAND NOT DEFINED<br />

F881 8480 5038 MOV AH,080H ;ERROR. UNDEFINED OPERATION<br />

FSS3 F9 5039 STC ;ERROR FLAG<br />

f884 C3 5040 RET<br />

5041 WI 'NOP<br />

5042<br />

A-68


lOC OBJ LINE SOURCE<br />

~<br />

F8es 5043 tIDTOR_ON PROC NEAR<br />

5044 j----------------.. ---------------­<br />

5045 j PURPOSE:<br />

5046 , TO TURN ON CASSETTE MOTOR<br />

5047 1----­--­--­-­-­-­-­-­--­-­-­--­-_...<br />

Fee5 [461 5048 IH AL,PORT_B jREAD CASSETTE OUTPUT<br />

F887 t4F7 5049 AHIJ AL.NOl OSH ; ClEAR BIT TO TURN ON MOTOR<br />

F889 £661 5050 W3: OUT PORT.B.AL ;WRITE IT OUT<br />

FeSB 2AE4 5051 SUB AH,AH ;ClEAR AH<br />

F88D C3 S05Z RET<br />

5053 HOTDR.ON ENOP<br />

5054<br />

F... 5055 MOTOR.OfF PROC HEAR<br />

5056 i ............... -­--­-­-­-­-----.---­----­----­<br />

5057 ; PURPOSE:<br />

5058<br />

•<br />

5059<br />

TO TURN CASSETTE MOTOR OFF<br />

1------------------------..----------- ...<br />

'88£ E461 5060 IH At.PORT_B ;READ CASSETTE OUTPUT<br />

f890 oeoe 5061 OR At,.oeH ; SET BIT TO TURN OF f<br />

F892 ESF5 5062 JHP WJ ;WRITE IT, CLEAR ERROR, RETURN<br />

5063 tIOTOR_OFF ENDP<br />

Fa.. 5064 READ.BLOCK PROe: NEAR<br />

5065 ; ---------------------.------­--------------­<br />

5066 ; PURPOSE:<br />

5067 I TO READ 1 OR MORE 256 BYTE BLOCKS FROI1 CAsSEnE<br />

5068<br />

5069 I ON ENTRY:<br />

5070 ES IS SEGMENT FOR MEMORY BUFFER (FOR COMPACT CODE)<br />

5071 i ex POINTS TO START OF MEMORY BUFFER<br />

5012 I CX COt~TAINS NUMBER OF BYTES TO READ<br />

5073 f ON EXIT:<br />

5074 ex POINTS 1 BYTE PAST LAST BYTE PUT IN MEM<br />

5075 CX CONTAINS DECREMENTED BYTE COUNT<br />

5076 ox CONTAINS NUMBER OF BYTES ACTUALLY READ<br />

5077<br />

5078 CAR~Y flAG IS CLEAR IF NO ERROR DETECTED<br />

•<br />

~ 5079 CARRY flAG IS SET IF CRC ERROR DETECTED<br />

5080 j -----------------------------_.._-----------­<br />

~<br />

F894 53 5081 PUSH BX ;SAVE BX<br />

F895 51 5082 PUSH CX ;SAVE CX<br />

F896 56 5083 PUSH 51 ; SAVE 51<br />

F897 BE0700 5084 HOV 51. 7 ; SET UP RETRY COUNT FOR LEADER<br />

F89A Eet201 5085 CALl. BEGItCOP ; BEGIN By STARTING MOTOR<br />

F89D 5086 W4: ; SEARCH FOR LEADER<br />

F89D E462 50S7 IN Al,PORT.C ;GET INTIAL VALUE<br />

F89F 2410 50S8 ANO AL.OIOH ;MASK OFF EXTRANEOUS BITS<br />

F8Al A26BOO 50S9 HOV LAST.VAL,AL ;SAVE IN Lot lAST.VAL<br />

F8A4 BA7A3F 5090 MOV DX,16250 ; I OF TRANSITIONS TO LOOK FOR<br />

5091<br />

F8A7 5092 W5: j WAIT.FOR.EDGE<br />

F8A7 F606710080 5093 TEST BIOS.BREAK. 80H ; CHECK FOR BREAK KEY<br />

FSAt 7403 SO" JZ W. I JUMP IF NO BREAK KEY<br />

F8AE E98AOO 5095 JHP W17 ~ JUMP IF BREAK KEY HIT<br />

SO"<br />

FS81 4A<br />

5097 .., DEC ox<br />

F882 7503 5098 JHZ W7 I JUMP IF BEGINNING OF LEADER<br />

F8B4 E98400 5099 JHP W17 ; JUMP IF NO LHDER FOUND<br />

5100<br />

F887 E8C600 5101 1017: CALL READ.HAlF.BIT ;IGNORE FIRST EDGE<br />

FSBA BEB 5102 JCXZ WS ; JUMP IF NO EDGE DETECTED<br />

F8BC BA7803 5103 I10V OX.0378H ; CHECK FOR HALF BITS<br />

F8BF B90002 5104 MOV CX.ZOOH .MUST HAVE AT LEAST THIS MANY ONE SIZE<br />

5105 • PULSES BEFORE CHECKNG FOR SYNC BIT (0)<br />

F8C! E421 5106 IH AL. 021H • INTERRUPT MASK REGISTER<br />

Fac4 OC01 5107 OR AL.I ; DISABLE TIMER INTERRUPTS<br />

f8C6 E621 5108 OUT 021H. AL<br />

Feea 5109 1.18: ; SEARCH-LOR<br />

F8C8 F6Q6710080 5110 TEST BIOS_BREAK, 80H ; CHECK FOR BREAK KEY<br />

F8CD 756C 5111 JNZ W17 ; JlJ:1P IF BREAK KEY HIT<br />

FeCF 51 5112 PUSH CX ,SAVE REG CX<br />

F800 ESAOOO 5113 CALL PEAD.HALF_BIT ;GET PULSE WIDTH<br />

F6D3 OBC9 5114 OR CX. cx ; CHECK FOR TRANSITION<br />

F8D5 59 5115 POP CX ,RESTORE ONE BIT COUNTER<br />

F806 74CS 5116 JZ "4 1 JUMP IF NO TRANSITION<br />

F8D8 3B03 5117 CHP OX,BX ;CHECK PULSE WIDTH<br />

A-69


LOC OBJ LINE SOURCE<br />

F8DA E304 5116 JCXZ W9 ;IF ex::o THEN WE CAN LOOK<br />

5119 iFQR SYNC BIT (0)<br />

FeDe 73BF 5120 JHC W4 i JUMP IF ZERO BIT (NOT GOOD LEADER)<br />

FaDE flEe 5121 lOOP we iDEe ex AND READ ANOTHER HALF ONE BIT<br />

FeEO 5H2 W9: fIND-SYNC<br />

FeED 72Eb 5123 JC W8 ; JUMP IF ONE BIT (STILL LEADER J<br />

5124 <br />

5125 I A SYNCH BIT HAS BEEN FOUND. READ SYN CHARACTER: <br />

~<br />

512.6<br />

FaE2 E89600 5127 CALL READ_HALF_BIT .SKIP OTHER HALF Of SYNC BIT (0)<br />

FBES E86AOO 5128 CAll READ_BYTE ; READ 5YN BYTE<br />

FBE8 3C16 5129 CMP AL, 16H SYNCHRotUZATION CHARACTER<br />

faEA 7549 5130 JHE W16 ; JUHP IF BAD LEADER FOUND.<br />

$131<br />

5132 ;------ GOOD CRe so READ DATA BLOCKIS)<br />

FeEC Sf 5133 POP 51 ; RESTORE REGS<br />

faED S9 5134 pop CX<br />

FeEf 58 5135 POP BX<br />

5136 ; -------------------------------------------­<br />

5137 ; READ 1 OR MORE 256 BYTE BLOCKS FRON CASSETTE<br />

5138<br />

5139 j ON ENTRY:<br />

5140 ES IS SEGMENT FO~ HEMORY BUFFER I FOR COMPACT CODE)<br />

5142 CX COtHAINS NUMBER OF BYTES TO READ<br />

5141 ; BX POItHS TO START OF MEMORY BUFFER<br />

,<br />

5~43 ; ON EXIT:<br />

5144 BX POINTS 1 BYTE PAST LAST BYTE PUT IN HEM<br />

5145 ; CX CONTAINS DECREHEHTEO BYTE COllNT<br />

5146 ; ox CONTAINS NUMBER OF BYTES ACTUALLY READ<br />

5147 ; -------------------------------------------­<br />

F8EF 51 5148 PUSH CX ;SAVE BYTE COUNT<br />

F8FO 5149 JCOME HERE BEFORE 10110: EACH<br />

<strong>5150</strong> 1256 BYTE BLOCK IS READ<br />

F8FO 5151 ;INIT CRC REG<br />

C7066900FFFF "OV CRC_REG,OFFFFH<br />

F8F6 BAOOOI 5152 MOV DX,256 ;SET OX TO DATA BLOCK SIZE<br />

F8F9 5153 10111: RO_BlK<br />

FSF9 5154 CHECK FOR F606710080 TEST BIDS_BREAK, 80H , BREAK KEY<br />

,""-"'"<br />

F8FE 7523 5155 JHZ WI3 ; JUMP IF BREAK KEY HIT<br />

F900 E64FOO 5156 CALL READ_BYTE JREAD BYTE FROM CASSETTE<br />

F903 72IE 5157 JC W13 ,CY SET INDICATES NO DATA TRANSITIONS<br />

F905 n05 5156 JCXl W12 ;IF WE'VE ALREADY REACHED<br />

5159 ;END OF MEMORY BUFFER<br />

5160 ;SKIP REST OF BLOCK<br />

F907 268807 5161 MOV ES:tBXJ,Al ;STORE DATA BYTE AT BYTE PTR<br />

F90A 43 5162 INC BX ;INC BUFFER PTR<br />

F90B 49 5163 DEC CX ;OEC BYTE COUNTER<br />

F90C 5164 ; LOOP DATA BLOCK HAS BEEN REAO FROM CASSETTE.<br />

10112: UNTIL<br />

F90C 5165 ,DEC BLOCK CtH<br />

4A OEC OX<br />

F90D 7FEA 5166 JG W11 , RD_BlK<br />

F90F E84000 5167 CALL READ_BYTE ,NOW READ HID CRC BYTES<br />

F912 E83DOO 5168 CALL READ_BYTE<br />

F915 2AE4 5169 SUB AH,AH ,CLEAR AH<br />

F917 813E6900oFlD 5170 CMP CRC_REG,IDOFH i IS THE CRC CORRECT<br />

F910 7506 5171 JNE W14 i IF NOT EQUAL CRC IS BAD<br />

F91F n06 5172 JCXZ W15 ;IF BYTE COUNT IS ZERO<br />

517:3 I THEH WE HA.VE READ ENOUGH<br />

5174 ISO WE WILL EXIT<br />

Fnl EeCD 5175 JMP WID ,STILL MORE, SO READ ANOTHER BLOCK<br />

F923 5176 ;MISSING-DATA<br />

10113:<br />

5177 ,NO DATA TRANSITIONS SO<br />

F923 5176 ;SET AH:02 TO INDICATE<br />

8401 MOV AH,OIH<br />

5179 ;DATA TUlEOUT<br />

F925 5180 ; BAD-CRe<br />

10114:<br />

F925 5181 ,EXIT EAR LYON FEC4 IHC AH ERROR<br />

5182 ;SET AH=OI TO INDICATE CRC ERROR<br />

F927 5183 ; RD-BLK-EX<br />

10115:<br />

F927 SA 5184 POP ox ICALCULATE COUNT OF<br />

F928 2801 S185 SUB DX,CX IDATA BYTES ACTUALLY READ<br />

SI66 IRETURt~ COUNT IN REG OX<br />

F92A 50 SI87<br />

PUSH AX<br />

iSAVE AX (RET CODE)<br />

F92B F6C403 5188 TEST AH, 03H<br />

; CHECK FOR ERRORS<br />

F92E 7513 5189 JtiZ W18 ; JUHP IF ERROR DETECTED<br />

F930 E81FOO 5190 CALL READ_BYTE ;READ TRAILER<br />

F933 EBOE 5191 JHP SHORT 10118 ,SKIP TO TURN OFF MOTOR<br />

F935 5192 ; BAD-LEADER <br />

10116:<br />

F935 SIn, " ~~F.':I' ~FTI?IES 4E C[(. SI <br />

A-70


LOC OBJ LINE SOURCE<br />

~<br />

F936 7403 5194 JZ W17 JUtlP IF TOO MANY RETRIES<br />

F938 E962FF 5195 JMP W4 JUMP IF NOT TOO MANY RETRIES<br />

F938 5196 10117: NO VALID DATA FOUND<br />

5197 j------ NO DATA FROM CASSETTE ERROR, I.E. TIMEOUT<br />

5198<br />

F938 5E 5199 POP 51 RESTORE REGS<br />

F93C 59 5200 POP CX lRESTORE REGS<br />

F93D 58 5201 POP BX<br />

F93E 2B02 5202 SUB OX,OX ,ZERO NUMBER OF BYTES READ<br />

F940 8404 5203 HOV AH,04H ; TIME OUT ERROR I NO LEADER)<br />

F942 50 5O 1<br />

F950 F5 5212 CHC<br />

F951 C3 5213 RET iFItUSHED<br />

5214 READ_BLOCK ENOP<br />

5215 ; ----------------------------------------­<br />

F952 5216 PROC NEAR<br />

5217 PURPOSE:<br />

5218 TO READ A BYTE FROM CASSETTE<br />

5219<br />

5220 ON EXIT REG AL CONTAINS READ DATA BYTE<br />

5221<br />

F952 53 5222 PUSH BX ,SAVE REGS BX,CX<br />

F953 51 5223 PUSH CX<br />

F954 BI08 52


LOC OBJ LINE SOURCE<br />

F97E EBF9 5268 "20<br />

5269 ENDP<br />

5270 ; ---------­---------------------------------­<br />

f9BO 5271 NEAR<br />

5272 PURPOSE:<br />

5273 TO COMPUTE TIME TIll ~EXT DATA<br />

5274 TRANSITION (EDGE)<br />

5275<br />

5276 ; ON ENTRY:<br />

5Z77 ; EDGE_CNT CONTAINS LAST EDGE COUNT<br />

5278<br />

5279 ; ON EXIT:<br />

52&0 ; AX CONTAINS OLD LAST EDGE COUNT<br />

5281 I BX CONTAlNS PULSE WIDTH {HALF Bn I<br />

5282 ; -------------­ ---------.--------------.­<br />

F'eo 696400 5283 MOV ex. 100 j SET TIME TO WAn FOR BIT<br />

F983 BA266BOO 5284 MOV AH.LAST_VAl JGET PRESENT INPUT VALUE<br />

F987 5285 Nee: ~ Fm-H-BIT<br />

F987 E462 5286 IN AL.POIH_C ; INPUT DATA BIT<br />

f989 2410 5237 AND AL,OlOH ;MASK OFF EXTRANEOUS BITS<br />

F988 3AC4­ 5288 CMP AL,AH ;SAME AS BEFORE?<br />

FgeD ElFS 5269 LOOPE<br />

"22<br />

; LOOP TILL IT CHANGES<br />

F9SF A26BOO 5290 MOV LAST_VAL,AL JUPDATE LAST_VAL WITH NEW VALUE<br />

F992 BOOD 5291 MOV Al;O jREAD TIMER'S COUNTER eONHA.ND<br />

F9'94 E643 5292 OUT TIM_CTL,AL ; LATCH COUNTER<br />

F996 E440 5293 HI AL, TIMERO ;GET LS eYTe<br />

F998 8AEO 52'4 I10Y AH,Al ,SAVE IN Aft<br />

fY.,,,, 1:'"0 SUS IN Al,TIMERO ,GET HS BYTE<br />

F99C 8bC" 5296 XCHG Al,AH ,XCHG Al,AH<br />

F99E 8Bl£6700 5n7 MOV BX,EDGE_CNT ; BX GETS LAST EDGE COUNT<br />

F942 2B08 5298 SUB BX,AX ; SET BX EQUAL TO HALF BIT PERIOD<br />

F9"4 1\36700 5299 MOV EDGE_CNT ,AX ; UPDATE EDGE CO""'T;<br />

F9A7 Cl 5300 RET<br />

5301 !fEAD_HALF_BIT ENDP<br />

5302 ;--------------------_ ..._--_.._------------­<br />

F9A8 5303 PROC NEAR<br />

5304<br />

5305 ; WRITE 1 OR MORE 256 BYTE BLOCKS TO CASSETTE.<br />

5306 THE OATA IS PADDED TO FILL OUT THE LAST 256 BYTE BLOCK.<br />

5307<br />

530S ; ON ENTRY:<br />

5309 BX POINTS TO MEMORY BUFFER ADDRESS<br />

5310 ex CONTAINS HUMBER OF BYTES TO WRITE<br />

5311<br />

;:512 ; ott EXIT:<br />

5313 BX POINTS 1 BYTE PAST LAST BYTE WRITT-EN TO CASSETTE<br />

5314 ex IS ZERO<br />

5315 ;-------------------------------------------­<br />

F9AS 53 5316 PUSH ax<br />

F9.9 51 5317 PUSIt cx<br />

F9,u, E461 5318 IN AL,PORT_B ;DISABLE SPEAKER<br />

f9AC 24FO 53n AND AL,NOT 02H<br />

F9AE DeOI 5320 OR AL. 01H ENABLE TInER<br />

F980 E661 5321 OUT PORT_B.AL<br />

F962 BOB6 5322 MOV AL,OB6H SET UP TIMER .. - MODE 3 SQUARE WAVE<br />

F964 E643 $3,3 OUT TIM_CTLtAl<br />

F9B6 E8A600 5324 CALL BEGIN.OP ; START MOTOR AND DELAY<br />

F9B9 BeA004 5325 NOV AX,llS4 ; SET NORMAL BIT SIZE<br />

F98C E88500 5326 CALL<br />

""<br />

J SET_TIMER<br />

F9BF MOOOS 5327 MOV CX.0800H ;SH CX FOR lEADER BYTE COUNT<br />

F9C2 5328 W23: ; WRITE LEADER<br />

F9C2 F9 53,9 STC ; WR ITE ONE BITS<br />

F9Cl E86800 5330 CALL Wl?ITE_BIT<br />

F9C6 EZFA 5331 LOOP "e> ; LOOP • TIL LEADER IS WRITTEN<br />

F9C8 F8 5332 CLC ;tRITE SYNC BIT to J<br />

F9C9 £86200 5333 CALL WRITE...8IT<br />

F9CC S9 5334 pop ex ;RESTORE REGS CX,BX<br />

FqCD 58 5335 POP BX<br />

F9CE B016 5336 MoV AL. 16M I WRITE SYH CHARACTER<br />

F900 E84400 5337 CALL WRITE_BYTE<br />

A-72


LOC OBJ LINE SOURCE<br />

~<br />

5338 ;-------------------------------------------­<br />

5339 I WRITE 1 OR HORE 256 BYTE BLOCKS TO CASSETTE<br />

5340<br />

5341 I ON. ENTRY:<br />

5342 ax POINTS TO MEMORY BUFFER ADDRESS<br />

5343 ex CONTAINS NUMBER OF BYTES TO WRITE<br />

5344<br />

5345 ON EXIT:<br />

5346 BX POUITS 1 BYTE PAST LAST BYTE WRITTEN TO CASSETTE<br />

5347<br />

5348<br />

ex IS ZERO<br />

; ......------------------- ..-­-------------­ ---­<br />

FOO3 5349 WR_BLOCK:<br />

F9D3 C7066900fFFF 5350 HOV CRC_REG,OFFFfH IINIT CRe<br />

F909 BAgDOl 5351 MOV DX,256 ;FOR 2:56 BYTES<br />

F90C 5352 W24: ; W~-BlK<br />

~<br />

~<br />

F9DC 268A07 5353 HOV AL,Es:[ex] ; READ BYTE FROM MEM<br />

F90F E83500 5354 CALL WRITE_BYTE jWRITE IT TO CASSETTE<br />

F9EZ £302 5355 JCXZ "25 jUNLESS CX=O, ADVANCE PTRS & DEC COUNT<br />

F9£4 43 5356 INC OX j INC BUF f ER POINTER<br />

F9E5 49 5357 DEC CX 50EC BYTE COUNTER<br />

F9E6 5358 WZ5: f SKIP-ADV<br />

F9E6 4A 535' DEC ox ,DEC BLOCK CNT<br />

F9E7 7FFl 5360 JG H2. ; LOOP TILL 256 BYTE BLOCK<br />

5361 ; IS WRITTEN TO TAPE<br />

5362 ;------------------- WRITE eRe -------------­<br />

5363 I WRITE l'S COHPLEMENT OF eRe REG TO CA~SETTE<br />

536. ; WHICH IS CHECKED FOR CORRECTNESS WHEN THE BLOCK IS READ<br />

5365<br />

5360 ; REG AX IS MODIFIED<br />

5367 ,... ----------------------------------------­<br />

F9E9 A16900 5365 HOV AX,CRC_REG ;WRITE THE ONE'S CQtlPLEMENT OF THE:<br />

5369 ; TWO BYTE CRC TO TAPE<br />

F9EC F7DO 5370 NOT AX ; FOR l'S COMPLEMENT<br />

F9EE SO 5371 PUSH AX ;SAVE IT<br />

F9EF UEO 5372: XCH. AH,Al ;WRITE t15 BYTE FIRST<br />

F9Fl 182300 5373 CALL WRITE_BYTE ;WRITE IT<br />

F9F4 58 5374 POP AX ,GET IT BACK<br />

F9F5 E81FOO 5375 CALL WRlTE_BYTE ,NOlo! WRITE LS BYTE<br />

F9F6 OBe9 5376 OR CX,CX ;IS BYTE COUNT EXHAUSTED?<br />

F9FA 7507 5377 JHZ WR_BLOCK ;JUHP IF NOT DONE YET<br />

F9FC 51 5378 PUSH CX iSAVE REG ex<br />

F9FD 892000 5379 MOV ex, 32 ;WRITE OUT TRAILER BITS<br />

FAOO 5380 WZ6: j TRAIL-LOOP<br />

FAOO F9 5381 STC<br />

FA01 E82AOO 5382 CALL WRITE_BIT<br />

FA04 E2FA 5383 LOOP HZO I WRITE UNTIL TRAILER WlunEN<br />

FA06 59 5384 POP CX ,RESTORE REG CX<br />

FA07 B080 5385 MOV AL. OBOH ; TURN TIttER2 Off<br />

FA09 £643 5386 OUT TIt-ccn, AL<br />

FAOB B80100 5387 HOV AX. 1<br />

FADE E83300 5388 CALL W31 ; SET_TIMER<br />

FAll E87AFE 5389 CALL MOTOR_OFF I TURN HOTOR OFF<br />

FA14 2BCO 5390 SUB AXJAX ;NO ERRORS REPORTED ON WRITE OP<br />

FAll. C3 5391 RET ;FINlsHEO<br />

5392 WRITE_BLOCK EHOP<br />

5393 1-----------------------------------------­<br />

FA17 53" WRITE_BYTE PRoe NEAR<br />

5395 ; WRITE A BYTE TO CASSETTE.<br />

5396 ; BYTE TO WRITE IS IN REG At.<br />

5397 ; ---- ...---------------_ ... _------------­-------­<br />

FA17 51 5398 PUSH CX ;SAVE REGS CX,AX<br />

FA18 50 5399 PUSH AX<br />

FA19 8Af8 5400 MDV CHJAL ;AL=BYTE TO WRITE.<br />

5401 f NS BIT WRIITEN FIRST}<br />

FA1S BI08 5402 NOV CL.8 ;FOR e DATA BITS IN BYT!.<br />

5403 NOTE: TWO EDGES PER BIT<br />

'AID 5404 W27: I DISASSEMBLE THE DATA BIT<br />

FA1D 0005 5405 RCL eH,1 IROTATE MS BIT lNTO CARRY<br />

FAIF 9C 5406 PUSHF ;SAVE FLAGS.<br />

5407 NOTE: DATA 81T IS IN CARRY<br />

FA20 E80BOO 5408 CALL WRITE_BIT ;WRITE DATA BIT<br />

FA2:3 90 54•• POPF ,RESTORE CARRY FOR CRC CALC<br />

FA24 E82400 541. CALL CRC_GEN ,CQt1PUTE CRC ON DATA BIT<br />

FA27 FEC9 5411 DEC CL flOOP TILL All 8 BITS DONE<br />

FA29 75F2 5412 JHZ "27 ; JUMP IF NOT DONE YET<br />

FA2B 58 5413 POP AX ;RESTORE REGS AX.CX<br />

FA2C 59 5414 POP CX<br />

A-73


LOC OBJ LINE SOURCE<br />

H20 C3 5415 RET ;WE ARE FINISHED <br />

5416 WRITE_BYTE ENDP <br />

5417 1--------- ------------------------------­<br />

FAZE 5418 WRITE_BIT PROC NEAR <br />

5419 ; PURPOSE: <br />

5420<br />

5421 TO WRITE A oAT A BI T TO CASSETTE<br />

5422 CARRY FLAG CONTAINS DATA BIT<br />

5423 I. E. IF SET DATA BIT IS A ONE<br />

5424 IF ClEAR DATA BIT IS A ZERO<br />

5425<br />

5426 NOTE: TWO EDGES ARE WRITTEN PER BIT<br />

5427 ONE BIT HAS 500 USEe BETWEEN EDGES<br />

5428 FOR A 1000 USEC PERIOD (1 MllLISEC)<br />

5429<br />

5430 ZERO BIT HAS 250 USEC BETWEEN EDGES<br />

5431 fOR A. SOD USEC PERIOD (.5 MIlLISEC)<br />

5432 ; CARRY FLAG IS DATA BIT<br />

5433 1------------------------------------------­<br />

5434 ;ASSUME IT'S A<br />

','<br />

w,.<br />

FAZE 88,6.004 5435 MOY AX.1l84 ; SET AX TO NOMINAL ONE SIZE <br />

FA31 7203 5436 JC ; JUMP IF ONE BIT<br />

FA33 885002 5437 MOY AX,59Z ; NO, SET TO NOMINAL ZERO SIZE<br />

FA36 5438 10126: ; WRITE-BIT-AX<br />

FA36 50 5439 PUSH AX iWRITE BIT WITH PERIOD EQ TO VALUE AX<br />

FA37 5440 10129:<br />

FA37 E462 5441 IN AL,PORT_C ; INPUT TIMER_O OUTPUT<br />

FH9 2420 5442 AND AL,020H<br />

FA38 74F,6. 5443 Jl WZ9 ,lOOP TIll HIGH<br />

FA30 5444 10130:<br />

FA30 E462 5445 IN Al.PORT_C ;NOW WAIT TILL TIMER'S OUTPUT IS LOW<br />

F,6.3F 2420 5446 AND AL,020H<br />

FA41 75FA 5447 JHZ W3.<br />

5448 jRElOAD TIMER WITH PERIOD<br />

5449 iFOR NEXT DATA BIT<br />

FA43 58 5450 POP ;RESTQRE PERIOD COUNT <br />

FA44 5451 10131: SET TIMER <br />

FA44 E642 5452 , OUT "042H, AL ; SET LOW BYTE OF TIMER 2: <br />

FA46 BAC4 5453 MOV AL, AH <br />

FA48 E642 5454 OUT 042H. AL ; SET HIGH BHE OF TIME~ 2 <br />

FA4A C3 5455 RET <br />

545~ WRITE_BIT ENDP<br />

,""Ii' " ~;~=~;~---------;;~~----~;~;-------------­<br />

FA48<br />

5458 <br />

.. 5459 UPDATE CRC REGISTER WITH NEXT DATA BIT <br />

5460<br />

.. 5461 CRe IS USED TO DETECT READ ERRORS<br />

:\<br />

5462<br />

,<br />

REG AX IS MODIFIED <br />

FLAGS ARE MODIFIED <br />

• ." , 5463 ASSUMES DATA BIT IS IN CARRY<br />

5467 <br />

F,6.48 ,6.16900 5468 MOY <br />

5469 j THE FOLLOWING INSTUCTIONS <br />

.. <br />

5470 JWILL SET THE OVERFLOW FLAG <br />

5471 j IF ~ARRY AND MS BIT OF CRe <br />

5472 JARE UNEQUAL <br />

FA4E 0108 5473 RCR AX.1 <br />

FA50 0100 5474 RCL AX,I <br />

1A52 F8 5475 eLe ;CLEAR CARRY <br />

FA53 7104 5476 JNO<br />

W"<br />

,SKIP IF NO OVERflOW <br />

5477 ;IF DATA BIT XORED WITH <br />

5478 ; CRe REG BIT 15 IS ONE <br />

FA55 351008 5479 xtJR AX.D810H ; THEN XOR CRC REG WITH<br />

5480 ; oa10H <br />

FA58 F9 5461 STC ;SET CARRY <br />

F,6.59 5482 10132: <br />

FA59 0100 5483 RCL AX.,<br />

iROTATE CARRY (DATA BIT)<br />

5484 jlNTO CRe REG <br />

FA5B ,6.36900 5485 Mev CRC_REG.AX ;UPDATE CRC_REG <br />

FASE C3 5486 RET ; FINISHED <br />

5487 CRe_GEN ENDP<br />

5488 ;-------------------------------------------­<br />

F,6.5F 5469 PROC NEAR ; START TAPE AtJO DELAY <br />

A-74 <br />

5490 <br />

5491 ; -------------------------------------------­


LOC OBJ LINE SOURCE<br />

FASF EeZ3FE 5492: CAll HOTOR_ON ; TURN ON MOTOR<br />

FA62 8342 5493 MOV BL,42H ;OELAY FOR TAPE DRIVE<br />

FA64 5495 W33:<br />

5494 ;TO GET UP TO SPEED (112: SEC)<br />

FA64 890007 5496 ttOV eX,700H ;INNER LOOP; APPROX. 10 MILlISEC<br />

FA67 ElFE 5497 1


LOC OBJ LINE SOURCE<br />

fC46 0030300000303060 5568 DB 000H.030H.030H,OOOH,OOOH.030H,030H.060H ; ; 0_3B<br />

FC4E 183060C060301800 55b9 DB 018H.030H,060H,OCOH,060H,030H.018H,000H ; < 0_3C<br />

FC56 OOOOF(OOOOFCOOOO 5570 DB OOOH.OOOH.OFCH,OOOH,OOOH,OFCH,OOOH,OOOH ~ = o_30<br />

reSE 6030180C18306000 5571 DB 060H,030H,018H.00CH.018H,030H,060H,OOOH ; > 0_3E<br />

FC66 78CCOCI830003000 5572 DB 078H.OCCH,OOCH.018H,030H,OOOH,030H,OOOH ; "? 0_3F<br />

5573<br />

FCbE 7CC6DEDEDEC0780D 5574 DB 07CH.OC6H,ODEH,OOEH.ODEH.OCOH.078H.OOOH i a 0_40<br />

FC76 3078CCCCFCCCCCOO 5575 DB 030H,076H.OCCH t OCCH,OFCH,OCCH,OCCH,OOOH ; A o_41<br />

Fe?f FC66667C6666FCOO 5576 DB OFCH.066H.066H.07CH.066H.066H.OFCH.OOOH ; B o_42<br />

FC86 3C66COCOC0663COO 5577 DB 03CH.06bH,OCOH.OCOH.OCOH,066H.03CH.OOOH ; C 0_43<br />

FCBE F86C6666666CF80D 5576 DB OF8H,06CH.066H,066H.066H,06CH,OF8H,OOOH ; 00_44<br />

FC96 FE6268786862FEOQ E.579 DB OFEH,Ob2H,068H,078H,066H,062H,OFEH,OOOH ; E 0_45<br />

FC9E fE6268786860FOOO 5580 DB OFEH,062H,066H.078H.068H,060H,OFOH,000H ; F -0_46<br />

FCAb lC6E>COCOCEb63EOO 5581 DB 03CH.066H,OCOH.OCOH.OCEH,066H,03EH,OOOH I G 0_47<br />

FCAE CCCCCCFCCCCCCCOO 5582 DB OCCH,OCCH,OCCH.OFCH,OCCH,OCCH,OCCH.OOOH H 0_46<br />

FCBb 7830303030307800 5583 DB 078H.030H.030H.030H.030H.030H,078H,OOOH ; 10_49<br />

FcaE lEOCOCOCCCCC7800 5584 DB OlEH,OOCH.00CH.00CH.OCCH,OCCH,078H,OOOH ; J 0_4A<br />

FCC6 Eb666C786CUE600 5585 DB OE6H.066H.06CH,078H.06CH.066H.OE6H.OOOH ; K 0_48<br />

FeCE F06060606266F£00 5586 DB OFOH.060H,060H.060H.062H,066H.OFEH,OOOH j L 0_4C<br />

FC06 C6EEF£FED6C6C600 5587 DB OC6H.OEEH,OfEH,OfEH.006H.OC6H.OC6H.OQOH ; M 0_40<br />

FCDE C6E6F6DECEC6C600 5588 DB OC6H.OE6H,OF6H.ODEH.OCEH.OC6H,OC6H,000H ; H D_4E<br />

FCEb 366CC6C6C66C3600 558~ DB 038H,06CH,OC6H,OC6H.OC6H,06CH,03SH.OOOH ; a 0_4F<br />

5590<br />

FeEl FC66&67C6060FOOO 5591 DB OFCH.066H,066H.07CH.060H,060H,OFOH,OOOH ; PO_50<br />

FCF. 78CCCCCCDC781COO 5592 DB 078H,OCCH.OCCH,OCCH,OJCH,078H,01CH,OOOH ; Q 0_51<br />

FeFE FC66667C6C66£600 5593 DB OFCH.066H.06MI,07CH.OfCH,066H,OE6H,OOOH i R 0_52<br />

FD06 78CC£0701CCC7800 5594 DB 078H.OCCH,OEOH.070H.OICH,OCCH,078H,000H ; SO_53<br />

FDOE FCB4303030307800 5595 DB OFCH.084H.030H,030H.030H,030H,078H,OOOH ITO_54<br />

F016 CCCCCCCCCCCCFCOO 5596 DB OCCH.OCCH,OCCH,OCCH,OCCH,OCCH,OFCH,OOOH ; U 0_55<br />

fOlE CCCCCCCCCC78300G 5597 DB OCCH,OCCH.OCCH.OCCH.OCCH,078H,030H.OOOH ; II 0_56<br />

FD26 C6C6C6D6fEEEC60D 5598 DB OC6H,OC6H,OC6H.006H.OFEH.OEEH.OC6H.000H ; W 0_57<br />

FOlE C6C66C36366CC600 5599 DB OC6H,OC6H.06CH'(138H.038H,06Ctt,OC6H.OOOH ; X o_58<br />

F036 CCCCCC7830307800 5600 DB OCCH,OCCH.OCCH.078H,030H.030H.078H.000H ; YO_59<br />

F03E FEC68C183Z66FEOO 5601 DB OFEH.OC6H,08CH.OI8H,032H.066H.OFEH,OOOH ; Z 0_5A<br />

F046 7860606060607800 5602 DB 078H.060H.060H,060H,060H,060H.078H,OOOH i [ 0_5B<br />

F04E C06030180C060200 5603 DB OCOH.060H.030H.018H,OOCH,006H.002H,000H ; BACKSLASH D_5C<br />

F056 7818181818167800 5604 DB 078H.018H.018H.018H.016H,018H.078H,OOOH i J 0_50<br />

F05E 10366CC600000000 5605 DB 010H.038H,06CH.OC6H.OOOH,OOOH,000H,OOOH ; CIRCUMFLEX 0_5E<br />

F066 OOOOOOOOOOOOOOFF 5606 DB oOOH.OOOH,OOOH,OOOH,OaOH,oooH,OOOH.OFFH ; _ 0_5F<br />

5b07<br />

F06E 3030180000000000 5608 DB 030H. 030H ,OISH. OOOH. OOOH, OOOH. OOOH, OOOH o_60<br />

F076 0000780C7CCC7600 5609 DB 000H,000H.078H,OOCH,07CH.DCCH.076H,OOOH LOWER CA~E A 0_61<br />

F07E E060607C6666oCOO 5bl0 DB OEQH,060H.060H,07CH,066H.066H,OOCH,OOOH L.C. B 0_62<br />

FD86 000078CCCOCC7800 5611 DB 000H.OOOH,078H,OCCH,OCOH.OCCH,078H,OOOH L.C. C o_63<br />

F08E lCOCOC7C[CCC7600 5612 DB 0ICH.00CH,OOCH.07CH.OCCH.OCCH.076H.O(JOH L.C. 0 o_64<br />

Fo~6 000078C[FCC07800 5613 DB 000H.OOOH.078H.OCCH,OFCH,OCOH,078H,OOOH L.C. E 0_65<br />

F09E 366[60F06060FOOO 5614 DB 038H.06CH.060H.OFOH,060H.060H,OFOH,OOOH L.C. F 0_66<br />

FOA6 000076CC[C7COCF6 5b15 DB 000H,OOOH.076H.OCCH.OCCH,07CH.00CH,OF8H L.C. G 0_67<br />

FOAE E0606C766666E600 5blb DB OEOH.060H.06CH,076H,066H,066H,OE6H,OOOH ; L.C. H 0_66<br />

FOB6 3000703030307800 Sb17 DB 030H,OOOH.070H.030H,030H,030H,078H.000H L.C. 10_69<br />

FDBE OCOOOCOCOCCCCC76 5618 DB 00CH.OOOH.OOCH.OOCH,OOCH.OCCH,OCCH,078H L.C. J D_6A<br />

FOC6 E060666C766CE600 5619 DB OEOH,060H,066H,06CH.078H,06CH,OE6H,OOOH L.C. K 0_68<br />

FoeE 7030303030307800 5620 DB 070H,030H,030H,030H.030H.030H,07BH.OOOH l.C. L D_6e<br />

F006 0000CCFEfE06C600 5621 DB 00OH.000H,OCCH,OFEH,OFEtI.006H.OC6H.OOOH L.C. M o_60<br />

FODE 0000F8CCCCCCCCOO 5622 DB OOOH,OOOH,OFBH,OCCH,OCCH.OCCH.OCCH.OOOH l.C. N 0_6E<br />

FOE6 000078CCCCC[7800 Sbn DB 000H,OOOH,078H.OCCH.OCCH.OCCH.078H.OOOH L.C. OO_6F<br />

5b24<br />

FDEE 00000[66667C60FO 5625 DB OOOH.OOOH.ODCH,066H.066H.07CH.060H.OFOH l.C. P 0_70<br />

FoF6 000076CCCC7cac I E 5626 DB OOOH.OOOH.076H.OCCH,OCCH,07tH,OOCH,OIEH ; Le. Q D_71<br />

FOFE 0000DC766b60FOOO 5627 DB 000H.OOOH.COCH.076H.Cl66H,060H,OFOH,000H L.C. R 0_12<br />

FE06 00007CC0780CF800 5628 DB OOOH,OOOH.07CH,OCOH,078H,OOCH,OF8H.OOOH L.C. 5 o_73<br />

FEOE 10307C3030341800 5629 DB 010H.030H,07CH.030H.030H,034H,018H.OOOH L.C. T o_74<br />

F£l6 0000CCCCCCCC7600 5630 DB 000H.OOOH,OCCH.OCCH.OCCH,OCCH,076H,OOOH i L.C. U o_75<br />

FElE 0000CCCCCC783000 5631 DB OOOH,OOOH.OCCH,OCCH.OCCH,078H.030H,OOOH ; L.C. Y 0_76<br />

FE26 0000[606FEFE6COO 5b32 DB 000H,OOOH,OC6H,006H.OFEH.OfEH.06CH,OOOH ; L.C. W 0_77<br />

FE2E 0000(66C386CC600 5633 DB 000H,OOOH,OC6H,06CH,038H,06tH.OC6H.OOOH L.C. X 0_78<br />

fE36 OOOOCCCCCC7COCF8 5634 DB OOOH.OOOH.OCCH,OCCH.OCCH.07CH.OOCH.OFSH L.C. Y 0_79<br />

FE3E 0000fC983064FCOO 5635 DB 000H.000H,OFCH,096H.030H.OMH.OFCH.000H l.C. Z D_7A<br />

F£46 lC3030£030301COO 5b3b DB OlCH. 030H. 030H. OEOH, 030H.030H. 01CH. OOOH 0_76<br />

FE4E 1618180018181800 5637 DB 018H. 018H. 0 18H, OOOH, 018H,018H. 018H ,OOOH D_7C<br />

FE56 E030301C3030EOOO 5638 DB OEOH.030H.030H.OICH,030H,030H,OEOH.OOOH; 0_70<br />

FE5E 760COOOOOOOOOOOO 5639 DB 076H.OOCH.000H,OOOH.000H.OOOH,OOOH.000H i 0_7E<br />

FE66 0010386CC6C6FEOO 5640 DB 000H.OIOH.038H.o6CH,OC6H,OC6H,OfEH,OOOH , DELTA 0_7F<br />

A-76


lOC OBJ LINE SOURCE<br />

5641 ;--- INT lA ------------------------------­<br />

5642 TIME_OF _DAY<br />

5643 THIS ROUTINE ALLOWS THE CLOCK TO BE SET/READ<br />

5644<br />

5645 INPUT<br />

5646 IAH) = 0 READ THE CURRENT CLOCK SETTING<br />

5647 RETURNS ex = HIGH PORTION Of COUNT<br />

5648 OX = lOW PORTIOt~ Of COUNT<br />

5649 AL = 0 IF TIHER HAS NOT PASSED 24 HOURS SINCE LAST READ<br />

5650 0 IF ON ANOTHER DAY<br />

5651 IAH) = 1 SET THE CURRENT ClOCK<br />

5652 CX = HIGH PORTION OF COUUT<br />

5653 OX = LOW PORTION OF COUNT<br />

5654 NOTE: COut-ITS OCCUR AT THE RATE OF 1193180/65536 COUIITS/SEC<br />

5655 lOR ABOUT 18.2 PER SECOND -­ SEE EQUATES BELOW)<br />

5656 ; -------­----------­-----------------­------­<br />

5657 ASSUME CS:CODE.DS:DATA<br />

FE6E 5658 TIME_OF_DAY PROC FAR<br />

FE6E Fe 5659 STI INTERRUPTS BACK ON<br />

FE6f IE 5660 PUSH DS SAVE SEGMENT<br />

FE70 50 5661 PUSH AX SAVE PARN<br />

FE7l 884000 5662 MOV AX.DATA<br />

FE74 8E08 5663 MOV DS.AX I ESTABLISH ADDRESSING TO VALUES<br />

FE76 56 5664 POP AX i GET BACK INPUT PARM<br />

FEn OAE4 5665 OR AH.AH ; AH=O<br />

FE79 7407 5666 JZ T2 ; READ_TIME<br />

FE7B FEee 5667 DEC AH I AH=1<br />

FE7D 7416 5668 JZ n ; SET_TINE<br />

FE7F 5669 Tl: ; TOO_RETURN<br />

FE7F FB 5670 STI ; INTERRUPTS BACK ON<br />

FEeD IF 5671 POP os ; RECOVER SEGMENT<br />

FEel CF 567Z IRET ; RETURN TO CAllER<br />

5673<br />

FEel 5674 12: I READ_TIME<br />

FEez FA 5675 CLI ; NO TIMER INTERRUPTS WHILE READING<br />

FEB3 A07000 5676 MOV AL.TINER_OFl<br />

~ FE86 C606700000 5677 MOV TIMER_OFL.O ; GET OVERFLOW. AND RESET THE FLAG<br />

FEes 860E6EOO 5678 MDV CX. TIMER_HIGH<br />

FE8F 88166COO 5679 MOV OX. TIMER_LOW<br />

FE93 EBEA 5680 JMP Tl<br />

5681<br />

FE 95 5682 T3: SET_TIME<br />

FE95 FA 5683 CLI NO INTERRUPTS WHILE WRITING<br />

FE96 69166COO 5684 MOV TINER_LOW. OX<br />

FE9A 890E6EOO 5685 MOV TIMER_HIGH .CX SET THE TIME<br />

FE9E C606700000 5686 MOV TIMER_OFl.O RESET OVERflOW<br />

FEU EBDA 5667 JMP Tl TOO_RETURN<br />

TIME_OF _DAY<br />

568~ ; -------­----------­-­----------------------­<br />

5690 ; THIS ROUTINE HANDLES THE TINER INTERRUPT fROM<br />

56~1 ; CHANNEL 0 OF THE 8253 TIMER. INPUT FREQUENCY IS 1.19318 HHZ<br />

5692 ; AHD THE DIVISOR IS 65536 , RESULTING IN APPROX. 18. Z INTERRUPTS<br />

5693 ; EVERY SECOND.<br />

5694<br />

5695 THE INTERRUPT HANDLER MAINTAINS A COUNT OF INTERRUPTS SINCE POWER<br />

5696 ON TIME. WHICH MAY BE USED TO ESTABLISH TINE OF DAY.<br />

5697 THE INTERRUPT HANDLER ALSO DECREMENTS THE MOTOR COtHROl COUNT<br />

5698 OF THE DISKETTE, AND WHEU IT EXPIRES, WILL TURN OFF THE DISKETTE<br />

5699 NOTOR. AND RESET THE MOTOR RU~INING FLAGS<br />

5700 THE INTERRUPT HAf'..'OLER WILL ALSO INVOKE A USER ROUTINE THROUGH INTERRUPT<br />

5701 lCH AT EVERY' TIME TICK. THE USER MUST CODE A ROUTINE AND PLACE THE<br />

5702 CORRECT ADDRESS IN THE VECTOR TABLE.<br />

5703<br />

HAS 5704 TIMER_INT PROC FAR<br />

FEAS Fe 5705 STI ; INTERRUPTS BACK ON<br />

~FEA61E 5706 PUSH DS<br />

FEA7 50 5707 PUSH AX<br />

FEAB 52 5708 PUSH DX ; SAVE MACHINE STATE<br />

FEA9 884000 5709 MDV AX.DATA<br />

FEAC BED8 5710 MOV DS,AX ESTABLISH ADDRESSABIlITY<br />

FEAE FF066COO 5711 INC TIMER_lOW INCREMENT TIt1E<br />

FEBZ 7504 5712 JIIZ T4 TEST_DAY<br />

FEB4 FF066EOD 5713 INC TIMER_HIGH UICREMENT HIGH WORD OF TIME<br />

FEBS 5714 T4: TE!"T_DAY<br />

A-77


LOC OBJ LINE SOURCE<br />

FEBS 833E6E0018 5715 CMP TIMER_HIGH.DISH ~ TEST FOR COUNT EQUALLING 24 HOURS<br />

FEBD 7519 5716 JHZ T5<br />

FEBF 813E6C008000 5717 CMP TIMER_LOW,oaOH<br />

FEes 7511 5718 JHZ T5<br />

5719<br />

5720 1------ TINER HAS GONE 24 HOURS<br />

5721<br />

FEe7 C7066EOOOOOO 5722 MOV TIMER_HIGH J 0<br />

FEeD C7066COOOOOO 5123 MOV TIMER_LOW. 0<br />

FED3 C606700001 572:4 MOV TIMER_OFl.l<br />

5725<br />

5726 ;------ TEST FOR DISKETTE TIME OlIT<br />

5727<br />

FEDS 5728 TS: ; DISKETTE_CTL<br />

FEDe FEOE4000 5729 DEC MOTOR_COUNT<br />

FEOC 7508 5730 JHZ T. ; RETURN IF COUNT NOT OUT<br />

FEDE 80263FOOFO 5731 AND HOTOR_STATUS,OFOH TURN OFF MOTOR RUNNING 8ITS<br />

FEEl BoDe 5732 MOV AL.OCH<br />

FEES SAFlO] 5733 MOV DX.03F2H FOC en PORT<br />

FEEB EE 5734 0I1T DX,AL I TURN OFF THE MOTOR<br />

5735<br />

FEE9 5736 16: TIMER_RET:<br />

FEE9 COle 5737 INT IC" TRANSFER CONTROL TO ... USER ROUTINE<br />

FEEB B020 5738 MOV Al,EOI<br />

FEED E620 5739 OUT 020H,Al END OF INTERRUPT TO 8259<br />

HEr SA 5740 POP OX<br />

FEFO 58 5741 POP AX<br />

fEFl IF 5742 POP OS RESET MACHINE STATE<br />

FEF2 CF 5743 IRET RETURN FROM INTERRUPT<br />

5744 TIMER_INT ENDP<br />

5745 • -------------------------­-----------------­<br />

5746 ; THESE ARE THE VECTORS WHICH ARE MOVED INTO<br />

5747 ; THE 6086 1HTEP.RUPT AREA DURING POWER ON<br />

5748 ,-­------------- -----­----------------------­<br />

FEF3 5749 VECTOR_TABLE LABEL WORD ; VECTOR TABLE FOR MOVE TO INTERRUPTS<br />

5750<br />

FEF3 ASH 5751 ow OFFSET TIMER_INT ; INTERRUPT 8<br />

FEFS DOFD 5752 OW CODE<br />

5753<br />

FEF? 87E9 5754 OW OFFSET KB_IHT INTERRUPT 9'<br />

FEF9 OOFO 5755 OW CODE<br />

5756<br />

FEFS 00000000 5757 00 i INTERRUPT A<br />

FEFf 00000000 5756 00 INTERRUPT B<br />

FF03 00000000 5759 00 INTERRUPT C<br />

fF07 00000000 5760 00 INTERRUPT 0<br />

5761<br />

HOB 57EF 5762 ow OFFSET DISK_ItiT INTERRUPT E<br />

FFOO OOFO 5763 OW COOE<br />

5764<br />

FFOF 00000000 5765 00 INTERRUPT F<br />

5766<br />

FF13 65fO 5767 ow OFFSET VIDEO_IO I INTERRUPT 10H<br />

FF15 OOFO 5768 OW CODE<br />

5769<br />

FF1740F8 5770 ow OFFSET EQUIPMENT ; INTERRUPT llH<br />

FF19 DOFa 5711 ow CODE<br />

5772<br />

FFIB 41F8 5713 ow OFFSET HEMORY_SIZE_DETERMINE INT l2H<br />

FFlO OOFO 5774 ow CODE<br />

5775<br />

FFIF 59EC 5776 ow OFFSET DISKETTE_IO I INTERRUPT 13H<br />

FF21 OOFO 5777 ow CODE<br />

5778<br />

FF23 39E7 5779 ow OFFSET RS232_IO ; INTERRUPT l4H<br />

FFZS OOFO 5780 ow CODE<br />

5781<br />

FF27 59F8 5782 ow OFFSET CASSETTE_IO HITERRUPT ISH<br />

FF2:9 OOFO 5783 ow CODE<br />

5784<br />

FFZB ZEES 5785 ow OFFSET KEYBOARD_IO INTERRUPT 16H<br />

FF20 DOFO 5786 ow CODE<br />

5787<br />

FF2F 02EF 5788 ow OFFSET PRINTER_IO INTERRUPT 17H<br />

FFll OOFO 5789 ow CODE<br />

5790<br />

A-78


LOC OBJ LINE SOURCE<br />

r"\<br />

,,-....,<br />

5856<br />

FF33 0000 57'H ow ooaOOH INTERRUPT ISH<br />

Ff35 OOf6 5792 ow OF600H ROM BASIC ENTRY POINT<br />

S7'B<br />

FF37 F2E6 5794 ow OFFSET BOOT_STRAP ; INTERRUPT 19H<br />

FF39 COFO 5795 ow CODE<br />

5796<br />

FFlB 6EFE 5797 0" TIME_OF_DAY j INTERRUPT lAH -- TIME OF DAY<br />

FF3D OOFe 5798 0" CODE<br />

5799<br />

FFlF 53FF 5800 0" DUMMY_RETURN INTERRUPT IBH .- KEYBOARD BREAK ADDR<br />

FF41 OOFO 5601 0" CODE<br />

5802<br />

FF4l 53FF 5803 0" DUMMY.RETURN INTERRUPT 1 C -- TIMER BREAK ADDR<br />

FF45 oaf 0 5604 OW CODE<br />

5805<br />

FF47 A4FO 5806 0" VIOEO_PARMS INTERRUPT 10 -- VIDEO PARAMETERS<br />

FF49 OaFQ 5807 0" COOE<br />

5608<br />

FF48 C7EF 5809 0" OFFSET DISK.BASE I INTERRUPT IE -- DISK PARMS<br />

FF4D OOFO 5810 OW CDDE<br />

5811<br />

FF4F 00000000 5812 DO INTERRUPT IF -- POINTER TO VIDEO EXT<br />

5813<br />

FFS3 5614 DUMNY.RETImN:<br />

FFSl CF 5815 IRET ; DUMHY RETIJRN FOR BREAK FROM KEYBOARD<br />

5816 J-- INT 5 ----------------------.-----------­<br />

5817 THIS LOGIC WILL BE INVOKED BY INTERRUPT 05H TO PRINT<br />

5818 THE SCREEN. THE CURSOR POSITION AT THE TIME THIS ROUTINE<br />

5819 IS INVOKED WIll BE SAVED AND RESTORED UPON COMPLETION. THE<br />

5820 ROUTINE IS INTENDED TO RUN WITH INTERRUPTS ENABLED.<br />

5821 IF A SUBSEQUENT • PRINT SCREEN KEY IS DEPRESSED DURING THE<br />

5822 UME THIS ROUTINE IS PRINTING IT WIll BE IGNORED.<br />

5823 ADDRESS 50:0 CONTAINS THE STATUS OF THE PRINT SCREEN:<br />

5824<br />

5825 50:0 '0 EITHER PRINT SCREEN HAS NOT BEEN CALLED<br />

5826 OR UPON RETURN FROM A CAll THIS INDICATES<br />

5827 A SUCCESSFUL OPERATION.<br />

5828<br />

5829 0) PRINT SCREEN IS IN PROGRESS<br />

5830<br />

5831 =377 ERROR ENCOUNTERED DURING PRINTING<br />

5832 ;-------------------------------------------­<br />

5833 ASSUME CS: CODE ,DS:XXDATA<br />

5834<br />

fFS4 5835 PRINT_SCREEN PROC FAR<br />

FFS4 F8 5836 5TI ;I1UST R\..R'>I WITH INTERRUPTS ENABLED<br />

FFS5 IE 5837 PUSH 05 jMUST USE 50:0 FOR DATA AREA STORAGE<br />

FF56 50 5838 PUSH AX<br />

FF57 53 5839 pUSH ex<br />

FF56 51 5840 PUSH ex iWIlL USE THIS LATER FOR CURSOR LIMITS<br />

FF59 52 5841 PUSH ox iWIlL HOLD CURRENT CURSOR POSITION<br />

FF5A 885000 5842 MOV AX,XXOATA jHEX 50<br />

FF5D 8E08 5843 MOV OS.AX<br />

FF5F 803£000001 5844 eMP STATUS.BYTE,l ,SEE IF PRINT ALREADY IN PROGRESS<br />

FF64 745F 5845 JZ EXIT ; Jt.n1P IF PRINT ALREADY IN PROGRESS<br />

FF66 C606000001 5846 MDV STATUS_BYTEd ; INDICATE PRINT NOW IN PROGRESS<br />

Ff6B 84OF 5847 MDV AH,15 iWIlL REQUEST THE CURRENT SCREEN MODE<br />

FF60 COlO 5848 INT )OH [All=1'10DE<br />

5849 [AH ]=NUMBER COLUMNS/LINE<br />

5850 t BH J::VISUAl pAGE<br />

5851<br />

J**********************lflf************<br />

5852 AT THIS POINT WE KNOW THE COLUMNS/LINE ARE IN<br />

5853 [AX] AND THE PAGE IF APPLICABLE IS IN tBHJ. THE STACK<br />

5854 HAS OS,AX.BX,CX,DX PUSHED. [ALI HAS VIDEO MODE<br />

5855<br />

j ******* ************************* ****<br />

FF6F BACC 5857 MDV CL.AH iWILL MAKE USE OF [CXI REGISTER TO<br />

FF71 B519 5858 MOV CH.25 ;CONTROL ROW & COLUHNS<br />

FF73 £85500 5859 CALL CRLF ;CARRIAGE RETURN LINE FEED ROUTINE<br />

FF76 51 5860 PUSH CX ; SAVE SCREEN BOUNDS<br />

FF77 8403 5861 MOV AH,3 jWILl NOW READ THE CURSOR.<br />

FF79 COlO 586Z INT )OH iAHD PRESERVE THE POSITION<br />

FF7B 59 5863 POP ex jRECALL SCREEN BOUNDS<br />

FF7C 52 5864 PUSH OX .RECALl [BH};;;VISUAL PAGE<br />

FF7D 3302 5865 XOR OX.OX jWIll SET CURSOR POSITION TO (0,0)<br />

A-79


lOC OBJ LINE SOURCE<br />

5866 ;.*.-••••._•••*.******.*************.**•••if••<br />

5867 THE LOOP FROM PRIlO TO THE INSTRUCTION PRIOR TO PA120<br />

5868 IS THE LOOP TO READ EACH CURSOR POSITION FROl1 THE SCREEN<br />

5869 AND PR INT •<br />

5870 ,•••**.*••**_.*************.*.***************<br />

'='F7F 8402 5871 PRIlO: MOV AH,2 iTO INDICATE CURSOR SET REQUEST<br />

=F81 COlO 5872 INT 10H iHEW CURSOR POSITION ESTABLISHED<br />

:F83 8408 5873 MaY AH.8 ;TO INDICATE READ CHARACTER<br />

=F85 COlO 5874 INT 10H ,CtiARACTER NOW IN (All<br />

FF87 OACO 5875 OR AL .... L iSEE IF VALID CHAR<br />

FF89 7502 5876 Jt~Z PRIIS jJUMP IF VALID CHAR<br />

FFSB BOZO 5877 MOV IMAKE A BLANK<br />

ffan 5878 PRIIS:<br />

FfSO 52 5879 PUSH OX iSAVE CURSOR POSITION<br />

fFSE 3302 5880 XOR DX,DX jINDICATE PRINTER 1<br />

FF90 32E"t 5881 XOR AH,AH ;TO INDICATE PRINT CHAR IN [All<br />

FF92 C017 5M2 INT 17H j PRINT THE CHARACTER<br />

FF94 SA 5883 POP OX JRECALL CURSOR POSITION<br />

FF95 F6C425 5884 TEST AH. 25H ; TEST FOR PRINTER ERROR<br />

FF98 7521 5885 JNZ ERRtO ; JUMP IF ERROR DETECTED<br />

FF9A fEtz 5886 INC OL ; ADVANCE TO NEXT COLUNN<br />

FF9C lACA 5887 CMP CL,DL ;SEE IF AT END OF LINE<br />

FF9E 750F 5888 JNZ PRIIO ; IF NOT PROCEED<br />

HAD 3202 58139 XOR DL,Dl ;BACK TO COLlR1N 0<br />

FFAe 84£2 5890 MOV AH,DL j[AHJ=O<br />

FFA4 52 5891 PUSH OX ; SAVE NEW CURSOR POSITION<br />

FFAS E82300 5892 CALL tRLF ; LINE FEED CARRIAGE RETURN<br />

FFAS SA 5893 POP OX jRECALL CUI?SOR POSITION<br />

FFA9 FECb 5894 WC OH jAOVAHCE TO NEXT LINE<br />

FFA8 3AEE 5895 eMP CH.DH ;FINISHED?<br />

HAD 7500 5896 JNZ PRIIO ; IF NOT COHTlNUE<br />

FFAF SA 5897 PR120: POP OX jRECALl CURSOR POSITION<br />

FFBD 8402 5898 MaY AH,Z ;TO INDICATE CURSOR SET REQUEST<br />

FFB2 COlO 5899 INT lOH ,CURSOR POSITION RESTORED<br />

FFB4 C606000000 5900 tlOV STATUS_BYTE, a jINDICATE FINISHED<br />

Ff59 EBOA 5901 JMP SHORT EXIT ; EXIT THE ROUTIt~E<br />

FFBB SA 5902 ERRIO: POP ox ;GET CURSOR POSITION<br />

FFec 8402 5903 MOV AH.2 ;TO REQUEST CURSOR SET<br />

FFBE COlO 5904 INT 10H ;CURSOR POSITIOtl RESTORED<br />

FFCO C6060000FF 5905 ERR20: MOV STATUS_BYTE,OfFH IINDICATE ERROR<br />

5906<br />

fFes SA 5907 EXIT: pop ox jRESTORE ALL THE REGISTERS USED<br />

FFCb 59 5908 POP ex<br />

FFC7 sa 5909 POP ex<br />

Ffce 58 5910 pop AX<br />

FFC9 IF 5911 POP as<br />

FFCA CF 5912 IRET<br />

5913<br />

5914<br />

5915 1------ C...RRI... GE RETURN. LINE FEED SUBROUTINE<br />

5916<br />

FFCB 5917 C~lF PRot NEAR<br />

FFCB 3302 5918 XOR OX,OX ;PRINTER a<br />

FFCD 32E4 5919 XOR AH.AH iioULL NOW SEND INITIAL IF,CR TO PRINTER<br />

FFCF BOOA 5920 MOY AL.12Q ; IF<br />

FFOI C017 5921 INT 17H ; SEND THE LINE FEED<br />

H03 32E4 sn2 XOR AH,AH ;NOW FOR THE CR<br />

FFOS BODO 5923 MOV Al.t5Q iCR<br />

FF07 CD17 5924 INT 17H jSENO THE CARRIAGE RETURN<br />

fF09 C3 5925 RET<br />

5926 CRLF ENOP<br />

5927 CODE ENDS<br />

5928<br />

5929 ; ----------­----------------------­<br />

5930 i POIolER ON RESET VECTOR<br />

5931 1---------------------------------­<br />

FFH 5932 VECTOR SEGMWT AT OFFf"FH<br />

5933<br />

5934 ; -----­ POWER Ot-l RESET<br />

5935<br />

0000 EA580000FO 5936 JMP RESET<br />

5937<br />

0005 30342F32342F38 5938 DB • 04/24/81' RELEASE MARKER<br />

31<br />

A-80 • <br />

5939 VECTOR ENOS<br />

5940 END


Notes For The BIOS Listing <br />

1. The wait loop for the printer times out on form<br />

feed of >51 lines. - line ref (3069)<br />

2. Mode controls for the 320 x 200 video have<br />

Color/BW reversed. - line ref (3338)<br />

3. The RS232 Timeout is 80 decimal, not SO<br />

hexadecimal. - line ref (1566)<br />

4. The Base Pointer register is destroyed by some<br />

video calls.<br />

5. D_04 0 character in the character generator has<br />

OS as it's last value, S/SO. -line ref (5511)<br />

6. If you hit print screen in the Color/Graphics<br />

80x25 Character Mode, the screen may not<br />

display during the print cycle.<br />

A-Sl


A-82 <br />

NOTES


Appendix B. Assembly Instruction Set<br />

<strong>Reference</strong><br />

B-1


8088<br />

REGISTER MODEL<br />

AX: AH Al ACCUMULATOR<br />

BX: BH Bl BASE<br />

CX: CH CL COUNT<br />

u..<br />

OX: DH DL DATA ..Ja:<br />

I<br />

«W<br />

SP STACK POINTER<br />

a: I-­<br />

W~<br />

BP BASE POINTER<br />

ZC!l<br />

ww<br />

C!la:<br />

SI<br />

~====================~ SOU RCE IN DEX<br />

01 DESTINATION INDEX<br />

~============~<br />

I-------.----------lilNSTRU IP CTI ON POI NTE R<br />

I FLAGSH I FLAGSL . STATUS FLAGS<br />

t<br />

~===============~====:<br />

CS CODE SEGMENT } ~<br />

OS DATA SEGMENT I-- ~<br />

SS<br />

:==========~==========: STAC K SE G M ENT<br />

L-________ ~ ~<br />

ES EXTRA SEGMENT ~~ Cl)a:<br />

I<br />

W<br />

..J<br />

Instructions which reference the flag register file as a 16-bit object <br />

use the symbol FLAGS to represent the file: <br />

15 7 0<br />

'X , X IX I X , OF , OF 'IF ITF I SF I ZF t X IAF IX I PF IX ICF ,<br />

X = Don't Care<br />

AF: AUXILIARY CARRY - BCD }<br />

CF: CARRY FLAG<br />

PF: PARITY FLAG 8080 FLAGS<br />

SF: SIGN FLAG<br />

ZF: ZERO FLAG<br />

OF: DIRECTION FLAG (STRINGS)}<br />

IF: INTERRUPT ENABLE FLAG 8088 FLAGS<br />

OF: OVERFLOW FLAG (CF E8 SF)<br />

TF: TRAP - SINGLE STEP FLAG<br />

B-2


OPERAND SUMMARY<br />

"reg" field Bit Assignments:<br />

16-Bit (w=l) a-Bit (w=O) Segment<br />

000 AX 000 AL 00 ES<br />

001 CX 001 CL 01 CS<br />

010 OX 010 OL 10 SS<br />

011 BX 011 BL 11 OS<br />

100 SP 100 AH<br />

101 BP 101 CH<br />

110 SI 110 OH<br />

111 01 111 BH<br />

SECOND INSTRUCTION BYTE SUMMARY<br />

Imod Ixxx Irim I<br />

mod<br />

Displacement<br />

00 OISP = 0*, disp-Iow and disp-high are absent<br />

01 OISP = disp-Iow sign-extended to 16-bits, disp-high is absent<br />

10 OISP = disp-high: disp-Iow<br />

11 rim is treated as a "reg" field<br />

rIm<br />

Operand Address<br />

000 (BX) + (SI) + DISP<br />

001 (BX) + (01) + DISP<br />

010 (BP) + (SI) + OISP<br />

011 (BP) + (01) + OISP<br />

100 (SI) + DISP<br />

101 (01) + OISP<br />

110 (BP)+OISP*<br />

111 (BX) + OISP<br />

OISP follows 2nd byte of instruction (before data if required).<br />

*except if mod = 00 and rim = 110 then EA = disp-high: disp-Iow.<br />

B-3


MEMORY SEGMENTATION MODEL <br />

LOGICAL<br />

MEMO RY SPACE<br />

t~<br />

o<br />

..[ ot FFFFFH<br />

P<br />

64KB CODE SEGMENT r"'\<br />

}<br />

~ XXXXOH<br />

i=:<br />

OFFSET<br />

ADORESS<br />

15 0<br />

I DISPLACEMENT<br />

I-<br />

----! I <br />

01 SP LAII'M ,NT<br />

:~<br />

} STACK SEGMENT<br />

I <br />

I<br />

I<br />

I<br />

MSB<br />

I<br />

15 0<br />

I I WORD {<br />

SELECTED<br />

LSB } DATA SEGMENT <br />

CS 0000 r-<br />

SEGMENT<br />

BYTE <br />

REGISTER SS 0000 ~ <br />

OS 0000 <br />

CS,SS, OS, ES<br />

ES 0000<br />

OR NONE<br />

::<br />

~<br />

FOR I/O, INT ~,<br />

.--<br />

I<br />

~ 7 :;­<br />

V<br />

I<br />

I<br />

I<br />

EXTRA DATA<br />

I } SEGMENT<br />

I<br />

I ADDER<br />

I<br />

I<br />

I<br />

I <br />

L T OOOOOH<br />

19 >­ 0<br />

PHYSICAL<br />

ADDRESS<br />

LATCH<br />

SEGMENT OVERRIDE PREFIX<br />

IOOlregl101<br />

USE OF SEGMENT OVERRIDE<br />

OPERAND REGISTER DEFAULT WITH OVERRIDE PREFIX<br />

IP (code address) CS Never <br />

SP (stack address) SS Never <br />

BP (stack address or stack marker) SS BP + DS or ES, or CS <br />

SI or D 1 (not incl. strings) OS ES, SS, or CS <br />

SI (implicit source addr for strings) OS ES, SS, or CS <br />

01 (implicit dest addr for strings) ES Never <br />

B-4


MOV = Move<br />

Register/memory to/ from register<br />

DATA TRANSFER <br />

11 0 0 0 1 0 d w I mod reg rIm<br />

Immediate to register/memory<br />

1 1 0 0 0 1 1 w mod 0 0 0 rIm data data if w=l<br />

Immediate to register<br />

1 0 1 1 w reg data data if w=l<br />

Memory to accumulator<br />

101 0 0 0 0 w addr-Iow addr-high<br />

Accumulator to memory<br />

1010001w addr-Iow<br />

addr-high<br />

Register/memory to segment register<br />

11 0 0 0 1 1 1 0 I mod 0 reg rim<br />

Segment register to register/memory<br />

11 0 0 0 1 1 0 0 mod 0 reg rIm<br />

PUSH = Push<br />

Register/memory<br />

11 1 1 1 1 1 1 1 mod 1 1 0 rim<br />

Register<br />

0 1 0 1 0 reg<br />

Segment register<br />

I0 0 0 reg 1 0<br />

r---...<br />

POP =Pop<br />

Register/memory<br />

1 0 0 0 1 1 1<br />

Register<br />

1 0 1 0 1 1 reg<br />

1 mod 0 0 0 rim<br />

Segment register<br />

10 0 0 reg 1 1<br />

B-S


XCHG =Exchange<br />

RegisterImemory with register<br />

11 0 0 0 0 1 1 w 1 mod reg rIm<br />

Register with accumulator<br />

110010regl<br />

IN = Input to AL/AX from<br />

Fixed port<br />

11 1 1 0 0 1 0 w port<br />

Variable port (OX)<br />

11110110W<br />

OUT =Output from ALIAX to<br />

Fixed port<br />

11 1 1 0 0 1 1 w port<br />

Variable port (OX)<br />

11 1 10111w<br />

XLAT =Translate byte to AL<br />

1110101111<br />

LEA =Load EA to register<br />

I 1 0 0 0 1 1 0 1 I mod reg rIm<br />

LDS =Load pointer to OS<br />

11 1 0 0 0 1 0 1 mod reg rIm<br />

LES =Load pointer to ES<br />

11 1 0 0 0 1 0 0 mod reg rIm<br />

LAHF =Load AH with flags<br />

1100111111<br />

SAHF =Store AH into flags<br />

1100111101<br />

PUSHF = Push flags<br />

110011100<br />

POPF = Pop flags<br />

110011101<br />

B-6


ARITHMETIC<br />

ADD =Add <br />

Reg./memory with register to either <br />

1 0 0 0 0 0 0 d w I mod reg rIm I<br />

Immediate to register/memory<br />

~<br />

11 0 0 0 0 0 s w<br />

I<br />

mod o 0 0 rim data data if s:w=01 I<br />

~<br />

Immediate to accumulator <br />

1 0 0 0 0 0 1 0 w data data if w=l <br />

I<br />

ADC = Add with carry <br />

Reg./memory with register to either <br />

1 0 0 0 1 0 0 d w mod<br />

I<br />

reg rim <br />

Immediate to register/memory<br />

0 0 0 0 0 s w mod 0 1 0 rim data data if s:w=Ol I<br />

11<br />

1<br />

Immediate to accumulator <br />

0 0 0 1 0 1 0 w data data if w=l I <br />

INC = Increment<br />

Register/memory <br />

1 1 1 1 1 1 1 w mod 0 o 0 rim <br />

Register<br />

I0 1 0 0 0 reg I <br />

AAA = ASCII adjust for add <br />

I 0 0 1 1 0 1 1<br />

1 I <br />

DAA = Decimal adjust for add <br />

0 0 1 0 0 1 1 1 I<br />

~<br />

su B = Subtract <br />

Reg./memory and register to either <br />

I0 0 1 0 1 0 d w mod reg rim <br />

I<br />

Immediate from register/memory<br />

11 0 0 0 0 0 s w mod 1 0 1 rim data data if s:w=Ol<br />

I I<br />

Immediate from accumulator <br />

0 0 1 0 1 1 0 w data data if w=l <br />

B-7


SBB = Subtract with borrow<br />

Reg./memory and register to either<br />

1 0 0 0 1 1 0 d w 1 mod reg rIm<br />

Immediate from register/memory<br />

11 0 0 0 0 0 s w 1 mod 0 1 1 rIm data data if s:w=Ol<br />

Immediate from accumulator<br />

10001110w data<br />

data if w=l<br />

DEC = Decrement<br />

Register/memory<br />

11111111w mod<br />

0 0 1 rIm<br />

Registe,·<br />

1 0 1 0 0 1 reg 1<br />

NEG = Change sign<br />

11111011w mod<br />

0 1 1 rIm<br />

CMP = Compare<br />

Register/memory and register<br />

1 0 0 1 1 1 0 d w 1 mod reg rIm<br />

Immediate with register/memory<br />

11 0 0 0 0 0 s w 1 mod 1 1 1 rim data data if s:w=Ol<br />

Immediate with accumulator<br />

1 0 0 1 1 1 lOw 1 data data if w=l<br />

AAS = ASC" adjust for subtract<br />

1001111111<br />

DAS = Decimal adjust for subtract<br />

1001011111<br />

MU L = Multiply (unsigned)<br />

11 1 1 1 0 1 1 w 1 mod 1 0 0 rim<br />

IMU L = Integer multiply (signed)<br />

11 1 1 1 0 1 1 w 1 mod 1 0 1 rim 1<br />

B-8


AAM =ASC II adjust for mUltiply<br />

\1 1 01 01 00 \ 0 0001 0 1 0<br />

DlV = Divide (unsigned)<br />

\1 1 1 1 0 1 1 w mod o rim<br />

,,-....,.., IOIV = Integer divide (signed)<br />

11 1 1 1 0 1 1 w 1 mod rim<br />

AAO = ASCII adjust for divide<br />

111010101 100001010<br />

CBW =Convert byte to word<br />

1100110001<br />

CWO = Convert word to double word<br />

11 00 1 1 001<br />

lOGIC<br />

NOT =Invert<br />

!1111011W mod 0 1 0 rim<br />

SH l/SAl =Shift logical/arithmetic left<br />

11 1 0 1 0 0 v w I mod 1 0 0 rim<br />

SHR =Shift logical right<br />

1110100vW mod<br />

1 0 1 rim<br />

SAR = Shift arithmetic right<br />

11 1 0 1 0 0 v w I mod 1 1 1 rim<br />

ROl = Rotate left<br />

11 1 0 1 0 0 v w I mod 0 0 0 rim<br />

ROR = Rotate right<br />

1110100vw mod<br />

0 0 1 rim<br />

RCl = Rotate through carry left<br />

~\ 11 1 0 1 0 0 v w 1 mod 0 1 0 rim<br />

RC R= Rotate through carry right<br />

11 1 0 1 0 0 v w mod 0 1 1 rim<br />

B-9


AND = And<br />

Reg./memory and register to either<br />

1 0 0 1 0 0 0 d w mod<br />

I<br />

reg rim<br />

Immediate to register/memory<br />

11 0 0 0 0 0 0 w I mod 1 0 0 rim data data if w=1 I<br />

Immediate to accumulator<br />

10 0 1 0 0 1 0 w I data data if w=1 I<br />

TEST = And function to flags, no result<br />

RegisterImemory and register<br />

11 0 0 0 0 1 0 w I<br />

mod reg rim<br />

Immediate data and register/memory<br />

11 1 1 1 0 1 1 w I mod 0 0 0 rim data data if w=1<br />

Immediate data and accumulator<br />

11 0 1 0 1 0 0 w data data if w=1<br />

OR = Or<br />

Reg./memory and register to either<br />

10 0 0 0 1 0 d w I mod reg rim<br />

Immediate to register/memory<br />

11 0 0 0 0 0 0 w I<br />

mod o 0 1 rim data data if w=1<br />

Immediate to accumulator<br />

10 0 0 0 1 1 0 w data data if w=1<br />

XOR = Exclusive or<br />

Reg./memory and register to either<br />

10 0 1 1 0 0 d w I<br />

mod reg rim<br />

Immediate to register/memory<br />

11 0 0 0 0 0 0 w mod 1 1 0 rim data data if w=1<br />

I<br />

Immediate to accumulator<br />

0 1 1 0 1 0 w data data if w=1<br />

10<br />

,~<br />

B-10


STRING MANIPULATION <br />

REP = Repeat<br />

11111001z1<br />

,...-., MOVS = Move String<br />

11 010010w<br />

CMPS = Compare String<br />

1101 0011W<br />

SCAS =Scan String<br />

/1010111W<br />

LODS = Load String<br />

11010110w<br />

STOS =Store String<br />

11010101W<br />

CONTROL TRANSFER<br />

CALL = Call<br />

Direct within segment<br />

/11101000<br />

disp-Iow<br />

disp-high <br />

Indirect within segment<br />

11111111<br />

mod<br />

0 1 0 rIm I <br />

Direct intersegment<br />

/10011010<br />

offset-low<br />

seg-Iow<br />

offset-high <br />

seg-high<br />

Indirect intersegment<br />

11 1 1 1 1 1 1<br />

mod<br />

0 1 1 rIm<br />

JMP =Unconditional Jump<br />

~ Direct within segment<br />

11 1 1 0 1 0 0 1<br />

Direct within segment-short<br />

11 1 1 0 1 0 1 1<br />

1 disp-Iow disp-high<br />

I disp I<br />

B-ll


Indirect within segment<br />

11111111 mod 1 0 0 rIm<br />

Direct intersegment<br />

111101010 offset-low<br />

seg-Iow<br />

offset-high<br />

seg-high<br />

Indirect intersegment<br />

11111111 mod 1 0 1 rIm<br />

RET =Return from CALL<br />

Within segment<br />

1110000111<br />

Within seg. adding immed to SP<br />

11 1 0 0 0 0 1 0 I data-low data-high<br />

Intersegment<br />

11 1 001 01 1<br />

Intersegment, adding immediate to SP<br />

11 1 0 0 1 0 1 0 I data-low<br />

JE/JZ = Jump on equallzero<br />

I0 1 1 1 0 1 0 0 I disp I<br />

data-high<br />

JL/JNGE =Jump on less/not greater or equal<br />

I 0 1 1 1 1 1 0 0 I disp I<br />

JLE/JNG =Jump on less or equal/not greater<br />

I 0 1 1 1 1 1 1 0 I disp I<br />

JB/JNAE =Jump on below/not above or equal<br />

I0 1 1 1 0 0 1 0 I disp I<br />

JBE/JNA =Jump on below or equal/not above<br />

I0 1 1 1 0 1 1 0 I disp I<br />

JP/JPE =Jump on parity/parity even<br />

I0 1 1 1 1 0 1 0 I disp I<br />

JO =Jump on overflow<br />

I0 1 1 1 0 0 0 /0<br />

disp I<br />

B-12


JS =Jump on sign <br />

10 1 1 1 1 0 0 0 disp <br />

JNE/JNZ =Jump on not equal/not zero<br />

10 1 1 1 0 1 0 1 I disp 1<br />

IN L/JG E =Jump on not less/greater or equal<br />

I0 1 1 1 1 1 0 1 I disp 1<br />

IN LE/JG =Jump on not less or equal/greater<br />

I0 1 1 1 1 1 1 1 I disp 1<br />

IN B/JAE =Jump on not below/above or equal<br />

1 0 1 1 1 0 0 1 1 1 disp 1<br />

JNBE/JA =Jump on not below or equal/above<br />

I0 1 1 1 0 1 1 1 1 disp 1<br />

JNP/JPO =Jump on not parity/parity odd<br />

10 1 1 1 1 0 1 1 1 disp 1<br />

~ JNO =Jump on not overflow<br />

I0 1 1 1 0 0 0 1<br />

disp I<br />

JNS =Jump on not sign<br />

10 1 1 1 1 0 0 1 disp 1<br />

LOOP = Loop ex times<br />

11 1 1 0 0 0 1 0 disp 1<br />

LOOPZ/LOOPE = Loop while zero/equal<br />

11 1 1 0 0 0 0 1 1 disp 1<br />

LOOPNZ/LOOPNE = Loop while not zero/not equal<br />

11 1 1 0 0 0 0 0 disp<br />

JCXZ =Jump on ex zero<br />

r", 11 1 1 0 0 0 1 1 disp<br />

B-13


8088 CONDITIONAL TRANSFER OPERATIONS <br />

Instruction Condition Interpretation<br />

JE or JZ ZF = 1 "equal" or "zero" <br />

JL or JNGE (SF xor OF) = 1 "less" or "not greater or equal" <br />

JLEorJNG ((SP xor OF) or "less or equal" or "not greater" <br />

ZF) = 1<br />

JB or JNAE CF =1 "below" or "not above or equal"<br />

JBE or JNA (CForZF)=l "below or equal" or "not above"<br />

JP or JPE PF = 1 "parity" or "parity even"<br />

JO OF = 1 "overflow"<br />

JS SF =1 "sign"<br />

JNE or JNZ ZF = 0 "not equal" or "not zero"<br />

JNLorJGE (SF xor OF) = 0 "not less" or "greater or equal"<br />

JNLE or JG ((SF xor OF) or "not less or equal" or "greater"<br />

ZF) = 0<br />

JNB or JAE CF =0 "not below" or "above or equal"<br />

JNBE or JA (CF or ZF) = 0 "not below or equal" or "above"<br />

JNP or JPO PF =0 "not parity" or "parity odd"<br />

JNO OF = 0 "not overflow"<br />

JNS Sf = 0 "not sign"<br />

*"Above" and "below" refer to the relation between two unsigned <br />

values, while "greater" and "less" refer to the relation between <br />

two signed values. <br />

INT = Interrupt <br />

Type specified <br />

11 1 0 0 1 1 0 1 type 1<br />

Type 3<br />

111001101<br />

INTO = Interrupt on overflow<br />

1110011101<br />

IRET =Interrupt return<br />

11 1 001 1 1 1<br />

CLC =Clear carry<br />

PROCESSOR CONTROL<br />

STC = Set carry <br />

1 1 1 1 1 1 0 0 oI 1 1 1 1 0 0<br />

11<br />

CMC =Complement carry NOP = No operation<br />

11 1 1 1 0 1 0 1 I 11 0 0 1 0 0 0 oI<br />

B-14


CLD = Clear direction<br />

S1D = Set direction<br />

1111111001 111 111 1 0<br />

C II = Clear interrupt<br />

S11 = Set interrupt<br />

1111110101 111111011<br />

HL1= Halt<br />

WAI1 = Wait<br />

111101001 10011011<br />

LOCK = Bus lock prefix<br />

ESC =Escape (to external device)<br />

11110000\ 1 1 0 1 1 x x x I mod x x x rIm<br />

Footnotes:<br />

if d = 1 then "to"; if d = 0 then "from"<br />

if w = 1 then word instruction; if w = 0 then byte instruction<br />

if s:w = 01 then 16 bits of immediate data from the operand<br />

if s:w = 11 then an immediate data byte is sign extended to form the<br />

16·bit operand<br />

ifv =0 then "count" = 1; if v =1 then "count" in (C Ll<br />

x =don't care<br />

~ z is used for some string primitives to compare with ZF FLAG<br />

AL = 8·bit accumulator<br />

AX = 16-bit accumulator<br />

CX = Count register<br />

DS = Data segment<br />

DX = Variable port register<br />

ES = Extra segment<br />

Above/below refers to unsigned value<br />

Greater = more positive;<br />

Less = less positive (more negative) signed values<br />

B-lS


BOBBINSTRUCTION SET MATRIX <br />

LO<br />

HI 0 1 2 3 4 5 6 7<br />

0 ADD ADD ADD ADD ADD Add PUSH PDP<br />

b.f.r/m w.f.r/m b,t,r/m w,t,r/m b.ia w.ia ES ES<br />

1 AoC ADC AoC AoC AoC AoC PUSH PDP<br />

b.l.r/m w.f.r/m b,t.r/m w,t,r/m b.i w.i SS SS<br />

2 AND AND AND AND AND AND SEG oAA<br />

b.f.r/m w.l.r/m b,t,r/m w,t.r/m b.i w.i =ES<br />

3 XoR XoR XoR XDR XOR XDR SEG AAA<br />

b.t.r/m w,t,r/m b,t,r/m w,t,r/m b.i w.i =SS<br />

4 INC INC INC INC INC INC II~C INC<br />

AX CX OX BX SP BP SI 01<br />

5 PUSH PUSH PUSH PUSH PUSH PUSH PUSH PUSH<br />

AX CX OX BX SP BP SI 01<br />

6<br />

7 JD JND JBI JNBI JEI JNEI JBEI JNBEI<br />

JNAE JAE JZ JNZ JNA JA<br />

8 Immed Immed Immed Immed TEST TEST XCHG XCHG<br />

b.r/m w.r/m b.r/m is.rim b.r/m w.r/m b.r/m w.r/m<br />

9 NOP XCHG XCHG XCHG XCHG XCHG XCHG XCHG<br />

CX OX BX SP BP SI 01<br />

A MoV MOV MOV MOV MOVS MOVS CMPS CMPS<br />

m~AL m~AX AL .. m AX~m b w b w<br />

B MOV MOV MOV MOV MOV MOV MOV MOV<br />

i-'>AL i+CL i.. oL i-'>BL i..AH i..CH i.. oH i .. BH<br />

C RET. RET LES LOS MOV MDV<br />

(j+SP) b.i.r/m w.i.r/m<br />

0 Shift Shift Shift Shift AAM AAD XLAT<br />

b w b.v w.v<br />

E LOOPNZI LOOPZI LOOP JCXZ IN IN OUT OUT<br />

LOOPNE LOOPE b w b w<br />

F LOCK REP REP HLT CMC Grp 1 Grp 1<br />

Z b.r/m w.r/m<br />

b = byte operation<br />

d = direct<br />

f = from CPU reg<br />

i = immediate<br />

ia = immed. to accum.<br />

id = indirect<br />

is = immed. byte, sign ext.<br />

I = long ie. intersegment<br />

m = memory<br />

rim = EA is second byte<br />

si = short intrasegment<br />

sr = segment register<br />

t = to CPU reg<br />

v = variable<br />

w = word operation<br />

z = zero<br />

B-16


HI<br />

LO<br />

8088 INSTRUCTION SET MATRIX <br />

8 9 A B C 0 E F<br />

0 OR OR OR OR OR OR PUSH<br />

b.f.r/m w.t.r/m b,t,r/m w,t,r/m b.i w.i CS<br />

1 SBB SBB SBB SBB SBB SBB PUSH POP<br />

b.f.r/m w.f.r/m b,t,r/m w,t,r/m b.i w.i OS OS<br />

2 SUB SUB SUB SUB SUB SUB SEG OAS<br />

b.f.r/m w.l.r/m b,t,r/m w,t,r/m b.i W.I CS<br />

3 CMP CMP CMP CMP CMP CMP SEG AAS<br />

b.f.r/m w.l.r/m b,t,r/m w,t,r/m bj w.i OS<br />

4 DEC DEC DEC DEC DEC DEC DEC DEC<br />

AX CX OX BX SP BP SI 01<br />

5 POP POP POP POP POP POP POP POP<br />

AX CX OX BX SP BP SI 01<br />

6<br />

7 JS JNS JPI JNPI JL/ JNl/ JLEI IN LEI<br />

JPE .IPO JNGE JGE JNG JG<br />

8 MOV MOV MOV MDV MDV LEA MOV POP<br />

b.t.r/m w.f.r/m b,t,r/m w,t,r/m sr.t.r/m sr.f.r/m rim<br />

9 CBW CWO CALL WAIT PUSHF POPF SAHF LAHF<br />

I.d<br />

A TEST TEST STOS STOS LOOS LODS SCAS SCAS<br />

b.i w.i b w b W b W<br />

B MOV MOV MOV MOV MOV MOV MDV MDV<br />

i...AX i~CX i~OX i.... BX i+SP i... BP i-+SI i...OI<br />

C RET RET INT INT INTO IRET<br />

1,(i+SP) I Type 3 (Any)<br />

0 ESC ESC ESC ESC ESC ESC ESC ESC<br />

0 1 2 3 4 5 6 7<br />

E CAll JMP JMP JMP IN IN OUT OUT<br />

d d I.d si.d v.b v.W v.b v.W<br />

F CLC STC Cli STI CLD STO Grp 2 Grp 2<br />

b.r/m w.r/m<br />

where<br />

modO rim 000 001 010 011 100 101 100 111<br />

Immed ADD OR AOC SBB AND SUB XOR CMP<br />

Shift ROL ROR RCL RCR SH L/SAL SHR SAR<br />

Grp 1 TEST NOT NEG MUl IMUL OIV 10lV<br />

Grp 2 INC DEC CALL CALL JMP JMP PUSH<br />

id I,id id 1,;0<br />

B-17


INSTRUCTION SET INDEX <br />

Mnemonic Page Mnemonic Page Mnemonic Page<br />

AAA 6 JG 12 MOV 4<br />

AAD 8 JGE 12 MOVS 10<br />

AAM 8 JL 11 MUL 1<br />

AAS 1 JLE 11 NEG 1 ~<br />

ADC 6 JMP 10 NOP 13<br />

ADD 6 JNA 11 NOT 8<br />

AND 9 JNAE 11 OR 9<br />

CALL 10 JNB 12 OUT 5<br />

CBW 8 JNBE 12 POP 4<br />

CLC 13 JNE 12 POPF 5<br />

CLD 14 JNG 11 PUSH 4<br />

Cli 14 JNGE 11 PUSHF 5<br />

CMC 13 JNL 12 RCL 8<br />

CMP 1 JNLE 12 RCR 8<br />

CMPS 10 JNO 12 REP 10<br />

CWD 8 JNP 12 RET 11<br />

DAA 6 JNS 12 ROL 8<br />

DAS 1 JNZ 12 ROR 8<br />

DEC 1 JO 11 SAHF 5<br />

DIV 8 JP 11 SAL 8<br />

ESC 14 JPE 11 SAR 8<br />

HLT 14 JPO 12 SBB 7 r-...<br />

IDIV 8 JS 12 SCAS 10<br />

IMUL 7 JZ 11 SHL 8<br />

IN 5 LAHF 5 SHR 8<br />

INC 6 LDS 5 STC 13<br />

INT 13 LEA 5 STD 14<br />

INTO 13 LES 5 STI 14<br />

IRET 13 LOCK 14 STOS 10<br />

JA 12 LODS 10 SUB 6<br />

JAE 12 LOOP 12 TEST 9<br />

JB 11 LOOPE 12 WAIT 14<br />

JBE 11 LOOPNE 12 XCHG 5<br />

JCXZ 12 LOOPNZ 12 XLAT 5<br />

JE 11 LOOPZ 12 XOR 9<br />

B-18


Appendix C. Of Characters Keystrokes <br />

and Color <br />

08 8 BLACK DARK NO N-D ISPLAY<br />

GREY<br />

09 9 BLACK LIGHT HIGH INTENSITY<br />

/'""""""\ BLUE UNDERLINE<br />

c5<br />

BLACK LIGHT HIGH INTENSITY<br />

GREEN<br />

OB 11 CTRL K BLACK LIGHT HIGH INTENSITY<br />

GREEN<br />

OC 12 CTRLL, BLACK LIGHT HIGH INTENSITY<br />


VALUE AS CHARACTERS<br />

AS TEXT ATTRIBUTES<br />

COLOR/GRAPHICS<br />

<strong>IBM</strong><br />

MONOCHROME<br />

MONITOR AOAPTER<br />

OISPLAY<br />

HEX OEC SYMBOL KEYSTROKES MODES BACKGROUND FOREGROUND ADAPTER<br />

18 24<br />

19 25<br />

t<br />

GTRL X BLUE DARK<br />

GREY<br />

I<br />

GTRL Y BLUE LIGHT<br />

BLUE<br />

HIGH INTENSITY<br />

HIGH INTENSITY<br />

UNDERLINE<br />

lA 26<br />

-<br />

CTRL Z BLUE LIGHT HIGH INTENSITY<br />

GREEN<br />

lB 27 GTRL [. BLUE LIGHT HIGH INTENSITY<br />

ESC, SHIFT CYAN<br />

-<br />

ESC, CTRL<br />

ESC<br />

lC 28<br />

L<br />

CTRL "­ BLUE LIGHT<br />

RED<br />

HIGH INTENSITY<br />

10 29<br />

-<br />

CTRL I BLUE LIGHT HIGH INTENSITY<br />

MAGENTA<br />

IE 30 ... GTRL 6 BLUE YELLOW HIGH INTENSITY<br />

IF 31 .... CTRL - BLUE WHITE HIGH INTENSITY<br />

20 32 BLANK SPACE BAR, GREEN BLACK NORMAL<br />

(SPACE SHIFT SPACE,<br />

GTRL SPACE,<br />

ALT SPACE<br />

21 33 ! ! SHIFT GREEN BLUE UNDERLINE<br />

22 34<br />

.. ..<br />

SHIFT GREEN GREEN NORMAL<br />

23 35 -# -# SHIFT GREEN CYAN NORMAL<br />

24 36 $ $ SHIFT GREEN RED NORMAL<br />

25 37 % % SHIFT GREEN MAGENTA NORMAL<br />

26 38 & & SHIFT GREEN BROWN NORMAL<br />

27 39<br />

,<br />

GREEN LIGHT NORMAL<br />

GREY<br />

28 40 ( ( SHIFT GREEN DARK HIGH INTENSITY<br />

GREY<br />

29 41 ) ) SHIFT GREEN LIGHT HIGH INTENSITY<br />

BLUE UNDERLINE<br />

2A 42 * * NOTE 1 GREEN LIGHT HIGH INTENSITY<br />

GREEN<br />

2B 43 + + SHIFT GREEN LIGHT CYAN HIGH INTENSITY<br />

2C 44 GREEN LIGHT HIGH INTENSITY<br />

RED<br />

20 45 - - GREEN LIGHT HIGH INTENSITY<br />

MAGENTA<br />

2E 46 NOTE 2 GREEN YELLOW HIGH INTENSITY<br />

C-2


AS TEXT ATTRIBUTES<br />

VALUE<br />

AS CHARACTERS<br />

COLOR/GRAPHICS<br />

<strong>IBM</strong><br />

MONOCHROME<br />

MONITOR ADAPTER<br />

DISPLAY<br />

HEX DEC SYMBDL [KEYSTROKES MODES BACKGROUND FOREGROUND ADAPTER<br />

2F 47 / / GREEN WHITE HIGH INTtN!iIIY<br />

30 48 0 0 INOTE 3 CY, K<br />

49 1 1 INOTI 3 CYAN BLUE<br />

32 50 2 2 NOTE 3 CYAN GREEN NORMAL<br />

33 3 INOTE 3<br />

34 INOTE 3 REO NOIIMAL<br />

35 53 5 5 NOTE 3 CYAN MAGENTA NO<br />

36 54 6 6 NOTE 3 CYJ BR<br />

37 55 7 7 NOTE 3 CYAN LIGHT NORMAL<br />

GREY<br />

38 56 8 8 NOTE 3 CYAN DARK HIGH INTENSITY<br />

GREY<br />

39 57 9 9 NOTE 3 CYAN LIGHT HIGH INTENSITY<br />

~<br />

BLUE UNDERLINE<br />

~<br />

3A<br />

3B<br />

58<br />

59<br />

:<br />

;<br />

:<br />

;<br />

SHIFT<br />

CYAN<br />

CYAN<br />

LIGHT<br />

GREEN<br />

LIGHT<br />

CYAN<br />

3C 60<br />

< <<br />

SHIFT CYAN LIGHT<br />

RED<br />

HIGH INTENSITY<br />

HIGH INTENSITY<br />

I<br />

HIGH INTENSITY<br />

3D 61 = = CYAN LIGHT HIGH INTENSITY<br />

MAGENTA<br />

3E 62<br />

> ><br />

SHIFT CYAN YELLOW HIGH ,NSITY<br />

3F 63 ? ? 11FT CYAN WHITE IGI INTENSITY<br />

40 64 @ @ SHIFT RED BLACK NORMAL<br />

41 65 A A NOTE 41 BLUE IERLINE<br />

B NOTE 4 RED GREEN NOR<br />

67 C NOTE 4 RED CYAN NORMAL<br />

44 68 0 0 4 IRI<br />

45 69 E E NI 4 RED MAGENTA NOR<br />

46 70 F F NOTE 4 RED BROWN NORMAL<br />

47 71 G G NOTE 4 RED LIGHT NORMAL<br />

GREY<br />

48 72 H H NOTE 4 RED DARK HIGH INTENSITY<br />

GREY<br />

49 73 I I NOTE 4 RED LIGHT HIGH INTENSITY<br />

BLUE UNDERLINE<br />

4A 74 J J NOTE 4 RED LIGHT HIGH INTENSITY<br />

GREEN<br />

C-3<br />

~<br />

;:<br />

~


VALUE AS CHARACTERS<br />

AS TEXT ATTRIBUTES<br />

COLOR/GRAPHICS<br />

<strong>IBM</strong><br />

MONOCHROME<br />

MONITOR ADAPTER<br />

DISPLAY<br />

HEX DEC SYMBOL KEYSTROKES MODES BACKGROUND FOREGROUND ADAPTER<br />

4B 75 K K NOTE 4 RED LIGHT HIGH INTENSITY<br />

CYAN<br />

4C 76 l L NOTE 4 RED LIGHT HIGH INTENSITY<br />

RED<br />

40 77 M M NOTE 4 RED LIGHT HIGH INTENSITY<br />

MAGENTA<br />

4E 78 N N NOTE 4 RED YEllOW HIGH INTENSITY<br />

4F 79 0 0 NOTE 4 RED WHITE HIGH INTENSITY<br />

50 80 P P NOTE 4 MAGENTA BLACK NORMAL<br />

51 81 Q Q NOTE 4 MAGENTA BLUE UNDERLINE<br />

52 82 R R NOTE 4 MAGENTA GREEN NORMAL<br />

53 83 S S NOTE 4 MAGENTA CYAN NORMAL<br />

54 84 T T NOTE 4 MAGENTA RED NORMAL<br />

55 85 U U NOTE 4 MAGENTA MAGENTA NORMAL<br />

56 86 V V NOTE 4 MAGENTA BROWN NORMAL<br />

57 87 W W NOTE 4 MAGENTA LIGHT NORMAL<br />

GREY<br />

58 88 X X NOTE 4 MAGENTA DARK HIGH INTENSITY<br />

GREY<br />

59 89 Y Y NOTE 4 MAGENTA LIGHT HIGH INTENSITY<br />

BLUE UNDERLINE<br />

5A 90 Z Z NOTE 4 MAGENTA LIGHT HIGH INTENSITY<br />

GREEN<br />

5B 91 [ [ MAGENTA LIGHT HIGH INTENSITY<br />

CYAN<br />

5C 92<br />

\ \<br />

MAGENTA<br />

LIGHT<br />

RED<br />

HIGH INTENSITY<br />

50 93 I I MAGENTA LIGHT HIGH INTENSITY<br />

MAGENTA<br />

5E 94 1\ 1\ SHIFT MAGENTA YEllOW HIGH INTENSITY<br />

5F 95<br />

-<br />

~<br />

SHIFT MAGENTA WHITE HIGH INTENSITY<br />

60 96<br />

. .<br />

YELLOW BLACK NORMAL<br />

61 97 a a NOTE 5 YELLOW BLUE UNDERLINE<br />

62 98 b b NOTE 5 YELLOW GREEN NORMAL<br />

63 99 c c NOTE 5 YelLOW CYAN NORMAL<br />

64 100 d d NOTE 5 YELLOW RED NORMAL<br />

65 101 e e NOTE 5 YELLOW MAGENTA NORMAL<br />

66 102 f f NOTE 5 YELLOW BROWN NORMAL<br />

C-4


VALUE AS CHARACTERS<br />

AS TEXT ATTRIBUTES<br />

COLOR/GRAPHICS<br />

<strong>IBM</strong><br />

MONOCHROME<br />

MONITOR AO~PTER<br />

DISPLAY<br />

HEX DEC SYMBOL KEYSTROKES MODES BACKGROUND FOREGROUND ADAPTER<br />

67 103 g g NOTE 5 YELLOW LIGHT NORMAL<br />

GREY<br />

68 104 h h NOTE 5 YEllOW DARK HIGH INTENSITY<br />

GREY<br />

69 105 i i NOTE 5 YELLOW LIGHT HIGH INTENSITY<br />

BLUE UNDERLINE<br />

6A 106 i i NOTE 5 YEllOW LIGHT HIGH INTENSITY<br />

GREEN<br />

6B 107 k k NOTE 5 YEllOW LIGHT HIGH INTENSITY<br />

CYAN<br />

6C 108 I I NOTE 5 YEllOW LIGHT HIGH INTENSITY<br />

REO<br />

SO 109 m m NOTE 5 YEllOW LIGHT HIGH INTENSITY<br />

MAGENTA<br />

6E 110 n n NOTE 5 YEllOW YEllOW HIGH INTENSITY<br />

6F<br />

70<br />

111<br />

112<br />

0<br />

p<br />

0<br />

p<br />

NOTE 5<br />

NOTE 5<br />

YEllOW<br />

WHITE<br />

WHITE<br />

BLACK<br />

HIGH INTENSITY<br />

REVERSE VIDEO<br />

71 113 q q NOTE 5 WHITE BLUE UNDERLINE<br />

72 114 r r NOTE 5 WHITE GREEN NORMAL<br />

73 115 s s NOTE 5 WHITE CYAN NORMAL<br />

74 116 t t NOTE 5 WHITE REO NORMAL<br />

75 117 u u NOTE 5 WHITE MAGENTA NORMAL<br />

76 118 v v NOTE 5 WHITE BROWN NORMAL<br />

77 119 w w NOTE 5 WHITE LIGHT NORMAL<br />

GREY<br />

~<br />

~<br />

::;<br />

..<br />

78 120 x x NOTE 5 WHITE DARK REVERSE VIDEO<br />

GREY<br />

79 121 Y Y NOTE 5 WHITE LIGHT HIGH INTENSITY<br />

BLUE UNDERLINE<br />

7A 122 z z NOTE 5 WHITE LIGHT HIGH INTENSITY<br />

GREEN<br />

7B 123 I<br />

I<br />

I<br />

SHIFT WHITE LIGHT<br />

CYAN<br />

HIGH INTENSITY<br />

7C 124 I I SHIFT WHITE LIGHT HIGH INTENSITY<br />

I I REO<br />

70 125 I<br />

I<br />

I<br />

I<br />

SHIFT WHITE LIGHT<br />

MAGENTA<br />

HIGH INTENSITY<br />

7E 126 "-' "-' SHIFT WHITE YelLOW HIGH INTENSITY<br />

7F 127<br />

6.<br />

CTRl- WHITE WHITE HIGH INTENSITY<br />

c-s


VALUE AS CHARACTERS<br />

AS TEXT ATTRIBUTES<br />

COLOR/GRAPHICS<br />

<strong>IBM</strong><br />

MONOCHROME<br />

MONITOR ADAPTER<br />

DISPLAY <br />

HEX DEC SYMBOL KEYSTROKES MODES BACKGROUND FOREGROUND ADAPTER <br />

* * * 80 HEX - FF HEX ARE FLASHING IN BOTH COLOR & <strong>IBM</strong> MONOCHROME * * * *<br />

80 128 ALT 128 NOTE 6 BLACK BLACK NON-DISPLAY<br />

ct<br />

81 129 'u ALT 129 NOTE 6 BLACK BLUE UNDERLINE <br />

82 130 --e ALT 130 NOTE 6 BLACK GREEN NORMAL <br />

83 131 ~ ALT 131 NOTE 6 BLACK CYAN NORMAL <br />

84 132 u" ALT 132 NOTE 6 BLACK REO NORMAL <br />

85 133 it- ALT 133 NOTE 6 BLACK MAGENTA NORMAL <br />

86 134 a ALT 134 NOTE 6 BLACK BROWN NORMAL <br />

87 135 ALT 135 NOTE 6 BLACK LIGHT NORMAL <br />

~ GREY<br />

88 136 re- ALT 136 NOTE 6 BLACK DARK NON-DISPLAY<br />

GREY<br />

89 137 e ALT 137 NOTE 6 BLACK LIGHT HIGH INTENSITY<br />

BLUE UNOERLINED<br />

8A 138 iI- ALT 138 NOTE 6 BLACK LIGHT HIGH INTENSITY<br />

GREEN<br />

8B 139 i ALT 139 NOTE 6 BLACK LIGHT HIGH INTENSITY<br />

CYAN<br />

8C 140 1- ALT 140 NOTE 6 BLACK LIGHT HIGH INTENSITY<br />

RED<br />

8D 141 i' ALT 141 NOTE 6 BLACK LIGHT HIGH INTENSITY<br />

MAGENTA<br />

8E 142 A ALT 142 NOTE 6 BLACK YELLOW HIGH INTENSITY<br />

8F 143 P- ALT 143 NOTE 6 BLACK WHITE HIGH INTENSITY<br />

90 144 E ALT 144 NOTE 6 BLUE BLACK NORMAL<br />

91 145 re ALT 145 NOTE 6 BLUE BLUE UNDERLINE<br />

92 146 FE ALT 146 NOTE 6 BLUE GREEN NORMAL<br />

93 147 -& ALT 147 NOTE 6 BLUE CYAN NORMAL<br />

94 148 0 ALT 148 NOTE 6 BLUE RED NORMAL<br />

95 149 d' ALT 149 NOTE 6 BLUE MAGENTA NORMAL<br />

96 150 it ALT 150 NOTE 6 BLUE BROWN NORMAL<br />

97 151 li' ALT 151 NOTE 6 BLUE LIGHT NORMAL<br />

GREY<br />

98 152 Y ALT 152 NOTE 6 BLUE DARK HIGH INTENSITY<br />

GREY<br />

99 153 ii ALT 153 NOTE 6 BLUE LIGHT HIGH INTENSITY<br />

BLUE UNDERLINE<br />

9A 154 U ALT 154 NOTE 6 BLUE LIGHT HIGH INTENSITY<br />

GREEN<br />

C-6


AS TEXT ATTRIBUTES<br />

VALUE<br />

AS CHARACTERS<br />

COLOR/GRAPHICS<br />

<strong>IBM</strong><br />

MONOCHROME<br />

MONITOR ADAPTER<br />

DISPLAY<br />

HEX DEC SYMBOL KEYSTROKES MODES BACKGROUND FOREGROUND ADAPTER<br />

9B 155 ¢ ALT 155 NOTE 6 BLUE LIGHT HIGH INTENSITY<br />

CYAN<br />

9C 156<br />

£<br />

ALT 156 NOTE 6 BLUE LIGHT<br />

RED<br />

HIGH INTENSITY<br />

90 157 ~ ALT 157 NOTE 6 BLUE LIGHT HIGH INTENSITY<br />

T<br />

MAGENTA<br />

9E 158 Pts ALT 158 NOTE 6 BLUE YELLOW HIGH INTENSITY<br />

9F 159 f ALT 159 NOTE 6 BLUE WHITE HIGH INTENSITY<br />

AO 160 -11 ALT 160 NOTE 6 GREEN BLACK NORMAL<br />

Al 161<br />

/<br />

İ ALT 161 NOTE 6 GREEN BLUE UNDERLINE<br />

A2 162 /0 ALT 162 NOTE 6 GREEN GREEN NORMAL<br />

A3<br />

A4<br />

A5<br />

A6<br />

163<br />

164<br />

165<br />

166<br />

--li<br />

'"n<br />

'" N<br />

~<br />

ALT 163<br />

AU 164<br />

ALT 165<br />

ALT 166<br />

NOTE 6<br />

NOTE 6<br />

NOTE 6<br />

NOTE 6<br />

GREEN<br />

GREEN<br />

GREEN<br />

GREEN<br />

CYAN<br />

RED<br />

MAGENTA<br />

BROWN<br />

NORMAL<br />

NORMAL<br />

NORMAL<br />

NORMAL<br />

A7 167 .!!. ALT 167 NOTE 6 GREEN LIGHT NORMAL<br />

GREY<br />

A8 168<br />

A9 169<br />

AA 170<br />

I<br />

I<br />

6<br />

ALT 168 NOTE 6 GREEN DARK<br />

GREY<br />

ALT 169 NOTE 6 GREEN LIGHT<br />

BLUE<br />

ALT 170 NOTE 6 GREEN LIGHT<br />

GREEN<br />

HIGH INTENSITY<br />

HIGH INTENSITY<br />

UNDERLINE<br />

HIGH INTENSITY<br />

::;:<br />

~<br />

~<br />

:: ;:<br />

~<br />

AB 171 Y, ALT 171 NOTE 6 GREEN LIGHT HIGH INTENSITY<br />

CYAN<br />

AC 172 % ALT 172 NOTE 6 GREEN LIGHT HIGH INTENSITY<br />

RED<br />

AD 173 . ALT 173 NOTE 6 GREEN LIGHT HIGH INTENSITY<br />

I<br />

MAGENTA<br />

AE 174<br />

«<br />

ALT 174 NOTE 6 GREEN YELLOW HIGH INTENSITY<br />

AF 175 » ALT 175 NOTE 6 GREEN WHITE HIGH INTENSITY<br />

BO 176 ALT 176<br />

~b<br />

NOTE 6 CYAN BLACK NORMAL<br />

Bl 177 ALT 177<br />

~~<br />

NOTE 6 CYAN BLUE UNDERLINE<br />

B2 178 ALT 178<br />

/y~<br />

NOTE 6 CYAN GREEN NORMAL<br />

B3 179 ALT 179 NOTE 6 CYAN CYAN NORMAL<br />

B4 180 ­ ALT 180 NOTE 6 CYAN RED NORMAL<br />

B5 181<br />

==<br />

ALT 181 NOTE 6 CYAN MAGENTA NORMAL<br />

B6 182 f----il<br />

ALT 182 NOTE 6 CYAN BROWN NORMAL<br />

C-7


VALUE AS CHARACTERS<br />

AS TEXT ATTRIBUTES<br />

COLOR/GRAPHICS<br />

<strong>IBM</strong><br />

MONOCHROME<br />

MONITOR AOAPTER<br />

OISPLAY <br />

HEX DEC SYMBOL KEYSTROKES MODES BACKGROUND FOREGROUND ADAPTER <br />

B7 183 ALT 183 NOTE 6 CYAN LIGHT NORMAL <br />

GREY <br />

11<br />

B8 184 ALT 184 NOTE 6 CYAN DARK HIGH INTENSITY<br />

==J<br />

GREY<br />

B9 185 ALT 185 NOTE 6 CYAN LIGHT HIGH INTENSITY<br />

==' BLUE UNDERLINE<br />

BA 186 ALT 186 NOTE 6 CYAN LIGHT HIGH INTENSITY<br />

GREEN<br />

BB 187 AlT 187 NOTE 6 CYAN LIGHT HIGH INTENSITY<br />

==jl<br />

CYAN<br />

BC 188<br />

d<br />

AlT 188 NOTE 6 CYAN LIGHT HIGH INTEI~SITY<br />

RED<br />

BO 189 --.JJ ALT 189 NOTE 6 CYAN UGHT HIGH INTENSITY<br />

MAGENTA<br />

BE 190 ==:d ALT 190 NOTE 6 CYAN YelLOW HIGH INTENSITY<br />

BF 191 ---, AL T 191 NOTE 6 CYAN WHITE HIGH INTENSITY<br />

CO 192 L- ALT 192 NOTE 6 RED BLACK NORMAL<br />

Cl 193 AlT 193 NOTE 6 RED BLUE UNDERLINE<br />

C2 194 AlT 194 NOTE 6 RED GREEN NORMAL<br />

I <br />

C3 195<br />

f-<br />

ALT 195 NOTE 6 RED CYAN NORMAL <br />

C4 196 ALT 196 NOTE 6 RED RED NORMAL <br />

C5 197 ALT 197 NOTE 6 RED MAGENTA NORMAL <br />

I<br />

C6 198 AlT 198 NOTE 6 RED BROWN NORMAL<br />

-<br />

....:::::<br />

GREY<br />

C7 199 ALT 199 NOTE 6 RED LIGHT NORMAL <br />

GREY <br />

C8 200 ALT 200 NOTE 6 RED DARK HIGH INTENSITY<br />

C9 201 ALT 201 NOTE 6 RED LIGHT HIGH INTENSITY<br />

BLUE UNOERLINE<br />

II<br />

CA 202<br />

WL<br />

AlT 202 NOTE 6 REO LIGHT HIGH INTENSITY<br />

GREEN<br />

f--r<br />

CB 203 ALT 203 NOTE 6 RED LIGHT HIGH INTENSITY<br />

CYAN<br />

~<br />

CC 204 AlT 204 NOTE 6 RED LIGHT HIGH INTENSITY<br />

RED<br />

CD 205 ALT 205 NOTE 6 RED LIGHT HIGH INTENSITY<br />

MAGENTA<br />

CE 206 ALT 206 NOTE 6 RED YELLOW HIGH INTENSITY<br />

~~<br />

CF 207 ALT 207 NOTE 6 RED WHITE HIGH INTENSITY<br />

DO 208 II ALT 208 NOTE 6 MAGENTA BLACK NORMAL<br />

e-8


06 214 ALT 214 NOTE 6 MAGENTA BROWN NORMAL<br />

07 215 ALT 215 NOTE 6 MAGENTA LIGHT NORMAL<br />

GREY<br />

08 216 ALT 216 NOTE 6 MAGENTA DARK HIGH INTENSITY<br />

GREY<br />

09 217 ALT 217 NOTE 6 MAGENTA LIGHT HIGH INTENSITY<br />

BLUE UNDERLINE<br />

DA 218 NOTE 6 MAGENTA LIGHT<br />

GREEN<br />

DB NOTE 6 MAGENTA LIGHT<br />

CYAN<br />

r""\<br />

DC NOTE 6 MAGENTA LIGHT<br />

RED<br />

DO NOTE 6 MAGENTA LIGHT HIGH INTENSITY<br />

MAGENTA<br />

NOTE 6<br />

NOTE 6<br />

NOTE 6<br />

MAGENTA<br />

MAGENTA<br />

r""\<br />

E7 231<br />

E8 232<br />

'T<br />

<br />

ALT 231 NOTE 6 YELLOW LIGHT<br />

GREY<br />

ALT 232 NOTE 6 YELLOW DARK<br />

GREY<br />

E9 233<br />

-e-<br />

ALT 233 NOTE 6 YELLOW LIGHT<br />

BLUE<br />

EA 234<br />

n<br />

ALT 234 NOTE 6 YELLOW LIGHT<br />

GREEN<br />

NORMAL<br />

HIGH INTENSITY<br />

HIGH INTENSITY<br />

UNDERLINE<br />

HIGH INTENSITY<br />

EB 235 ALT 235 NOTE 6 YELLOW LIGHT IGH INTENSITY<br />

~ CYAN<br />

C-9


VALUE AS CHARACTERS<br />

AS TEXT ATTRIBUTES<br />

COLOR/GRAPHICS<br />

<strong>IBM</strong><br />

MONOCHROME<br />

MONITOR ADAPTER<br />

DISPLAY<br />

HEX DEC SYMBOL KEYSTROKES MODES BACKGROUND FOREGROUND ADAPTER<br />

EC 236 00 ALT 236 NOTE 6 YELLOW LIGHT HIGH INTENSITY<br />

RED<br />

ED 237<br />

ifJ<br />

ALT 237 NOTE 6 YEllOW LIGHT<br />

MAGENTA<br />

HIGH INTENSITY<br />

EE 238 E ALT 238 NOTE 6 YELLOW Y~LLOW HIGH INTENSITY<br />

EF 239 II ALT 239 NOTE 6 YELLOW WHITE HIGH INTENSITY<br />

FO 240 - ALT 240 NOTE 6 WHITE BLACK REVERSE VIDEO<br />

Fl 241 ± ALT 241 NOTE 6 WHITE BLUE UNDERLINE<br />

F2 242 ~ ALT 242 NOTE 6 WHITE GREEN NORMAL<br />

F3 243 ~ ALT 243 NOTE 6 WHITE CYAN NORMAL<br />

F4 244<br />

C<br />

ALT 244 NOTE 6 WHITE RED NORMAL<br />

F5 245 0 ALT 245 NOTE 6 WHITE MAGENTA NORMAL<br />

F6 246 ALT 246 NOTE 6 WHITE BROWN NORMAL<br />

F7 247 ALT 247 NOTE 6 WHITE LIGHT NORMAL<br />

~<br />

GREY<br />

F8 248<br />

F9 249<br />

FA 250<br />

FB 251<br />

0<br />

•<br />

•<br />

""<br />

ALT 248 NOTE 6 WHITE DARK<br />

GREY<br />

ALT 249 NOTE 6 WHITE LIGHT<br />

BLUE<br />

ALT 250 NOTE 6 WHITE LIGHT<br />

GREEN<br />

ALT 251 NOTE 6 WHITE LIGHT<br />

CYAN<br />

FC 252 Y\ ALT 252 NOTE 6 WHITE LIGHT<br />

RED<br />

REVERSE VIDEO<br />

HIGH INTENSITY<br />

UNDERLINE<br />

HIGH INTENSITY<br />

HIGH INTENSITY<br />

HIGH INTENSITY<br />

FD 253 2 ALT 253 NOTE 6 WHITE LIGHT HIGH INTENSITY<br />

MAGENTA<br />

FE 254<br />

I<br />

ALT 254 NOTE 6 WHITE YELLOW HIGH INTENSITY<br />

FF 255 BLANK ALT 255 NOTE 6 WHITE WHITE HIGH INTENSITY<br />

ColO


NOTE 1 Asterisk (*) can easily be keyed using two methods:<br />

1) hit the IPRTSC Ikey or 2) in shift mode hit the<br />

[iJ key. *<br />

NOTE 2 Period (.) can easily be keyed using two methods:<br />

1) hit thelJ key or 2) in shift or NUM LOCK<br />

mode hit the [!!;il key.<br />

NOTE 3 Numeric characters (0-9) can easily be keyed<br />

using two methods: 1) hit the numeric keys on the<br />

top row of the typewriter portion of the keyboard<br />

or 2) in shift or NUM LOCK mode hit the numeric<br />

keys in the lO-key pad portion of the keyboard.<br />

NOTE 4 Upper case alphabetic characters (A-Z) can easily<br />

be keyed in two modes: 1) in shift mode hit the<br />

appropriate alphabetic key or 2) in CAPS LOCK<br />

mode hit the appropriate alphabetic key.<br />

NOTE 5 Lower case alphabetic characters (a-z) can easily<br />

be keyed in two modes: 1) in "normal" mode hit<br />

the appropriate alphabetic key or 2) in CAPS LOCK<br />

combined with shift mode hit the appropriate alphabetic<br />

key.<br />

NOTE 6 The 3 digits after the ALT key must be typed from<br />

the numeric key pad (keys 71-73. 75-77. 79-82).<br />

Character codes 000 through 255 can be entered in<br />

this fashion.<br />

C-ll


Character Set (OO-7F) Quick <strong>Reference</strong> <br />

•<br />

DECIMAL <br />

VALUE 0 16 32 48 64 80 96 112<br />

•<br />

IHEXA.<br />

le!~I~AL 0 1 2 3 4 5 6 7<br />

BLANK<br />

,<br />

BLANK<br />

0 0 (NULL) ~ (SPACE)<br />

0 @ p P<br />

1 1 ~ ...... I 1 A Q a q<br />

•<br />

2 2 @) t I I 2 B R b r<br />

3 3<br />

•<br />

"<br />

.. =IF 3 C S c s<br />

4 4<br />

+ err $ 4 D T d t<br />

5 5 4t § 0/0 5 E U e u<br />

•- & ,<br />

6 6 6 F V f v<br />

7 7 • ~ 7 G W g W<br />

8 8 i ( 8 H X h x<br />

Y<br />

•<br />

9 9 0 1 ) 9 I Y 1<br />

.<br />

10 A --+ • J Z J x<br />

* •<br />

•<br />

11 B d +-<br />

+ , K [ k<br />

I<br />

12 C 9 L , < L I<br />

13 0 ~~<br />

~ - - M ] rn }<br />

1<br />

" 1<br />

14 E ... rv<br />

.. • > N n<br />

~~ /\<br />

15 F -¢- T<br />

/ ? 0 - 0 ~<br />

•<br />

C-12


Character Set (80-FF) Quick <strong>Reference</strong> <br />

DECIMAL<br />

VALUE ..<br />

•<br />

HEXA·<br />

DECIMAL<br />

128 144 160 176 192 208 224 240<br />

8 9 A B D C E F<br />

VALUE<br />

0 0 ct E a ~ ­<br />

.. ~<br />

/'<br />

­ ()C ­<br />

1 1 U iE 1 ~ fJ +<br />

,/<br />

FE 0 ~<br />

y ­ ><br />

1\ 1\ /'<br />

3 3 I-­<br />

a<br />

lL<br />

0 u<br />

1T - <<br />

4 4 a<br />

·. ·. '" ~<br />

0 n b L (<br />

"- "­<br />

5 5 a 0 N= F u J<br />

,/<br />

2 2 e<br />

6 6<br />

0 1\<br />

r-­<br />

a u a ~<br />

-H<br />

f.l •<br />

"- -..."<br />

7 7 C; 0 r -..."<br />

u<br />

--n<br />

1\ ·. • 0<br />

8 8 e y ~ ===I <br />

·.<br />

e 0 e<br />

9 9 ·. I :J •<br />

. .<br />

" U ---, ..JL<br />

n •<br />

·•.<br />

1 ~ --- 8 -.r­<br />

10 A e<br />

11 B ¢ ~<br />

~<br />

12 c 00<br />

1 £ 14 d 11<br />

13<br />

D "• Y..<br />

..<br />

,•<br />

J 2<br />

1 T 0<br />

14 E A Pts « bd ~ E I<br />

A f » n<br />

n<br />

15 F<br />

'FF'<br />

BLANK<br />

C-13


C-14 <br />

NOTES


APPENDIX D LOGIC DIAGRAMS <br />

~ Contents:<br />

System Board................................... D-2 <br />

Keyboard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-12 <br />

<strong>IBM</strong> Monochrome Display And Parallel Printer <br />

Adapter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-14 <br />

<strong>IBM</strong> Monochrome Display. . . . . . . . . . . . . . . . . . . . . . . D-24 <br />

Color/Graphics Monitor Adapter. . . . . . . . . . . . . . . . . D-25 <br />

<strong>IBM</strong> 80 CPS Matrix Printer. . . . . . . . . . . . . . . . . . . . . . D-31 <br />

Parallel Printer Adapter. . . . . . . . . . . . . . . . . . . . . . . . . . D-34 <br />

5 1/4" Diskette Drive Adapter. . . . .. ... .. ... .. .. .. D-35 <br />

5 1/4" Diskette Drive. . . . . . . . . . . . . . . . . . . . . . . . . . . . D-39 <br />

32 KB Memory Expansion. . . . . . . . . . . . . . . . . . . . . . . D-42 <br />

64 KB Memory Expansion . . . . . . . . . . . . . . . . . . . . . . . D-45 <br />

~ Asynchronous Communications Adapter .. . . . . . . . . D-48 <br />

Game Control Adapter. . . . . . . . . . . . . . . . . . . . . . . . . . . D-49 <br />

D-l


SYSTEM BOARD (PROCESSOR AND SUPPORT)<br />

~;;i,'\j",<br />

~~ ~~~~:<br />

I<br />

N<br />

-<br />

Note: Logics one and two of twelve are not applicable<br />

D-2


~<br />

SYSTEM BOARD (WAIT STATE GENERATOR)<br />

,<br />

~<br />

;;­<br />

5­<br />

~' ;;<br />

If<br />

f<br />

~<br />

Ii<br />

~<br />

", Ii<br />

I~<br />

Ṉ<br />

os<br />

c:t<br />

u<br />

";;'<br />

CI<br />

.....<br />

I~I~<br />

Ii<br />

z , '"<br />

I! ."<br />

'"<br />

J<br />

I~ 10<br />

I~ •<br />

,<br />

"<br />

"<br />

Ii<br />

"<br />

~<br />

c<br />

~ B<br />

~ Q<br />

~<br />

"<br />

U<br />

0-3


SYSTEM BOARD (DEVICE DECODES)<br />

I~ i 11<br />

§§0~ §~::=: ~ss:~~~<br />

IS~reH<br />

I" Ṇ..<br />

CI<br />

-1ft<br />

';;'<br />

, CI<br />

I<br />

...I<br />

c;;<br />

-a '"<br />

CI<br />

..<br />

..<br />

..<br />

..<br />

CI '"<br />

'"<br />

'S;<br />

CI '"<br />

- -a<br />

III <br />

CI <br />

CII <br />

E<br />

t: '"<br />

q;<br />

".......... <br />

D-4


SYSTEM BOARD (DMA)<br />

ii<br />

~~;;:;;;<br />

~ :!:::::.::.<br />

- -<br />

I; ~ ~§~~<br />

Ṉ<br />

-CD<br />

=<br />

..<br />

....= '=<br />

"<<br />

:E<br />

c<br />

111111111111111111<br />

D-S


SYSTEM BOARD (ROS AND BUS DRIVER)<br />

~<br />

~::::;'=-'2= :;-<br />

~,~',",<br />

2: .Jtr; ..... <br />

.&,...!",~' C> <br />

::fT'" S <br />

~~~ ~-~~:~~~~~ ~-";t~'<br />

~ ,Ii e2~~22~~ '!1I!~I~ <br />

I<br />

I I<br />

I<br />

~<br />

11<br />

I<br />

I<br />

I1<br />

CI<br />

.....<br />

y<br />

1]1 11 ·r a:r-<br />

Ii I ~ •i1:<br />

I<br />

I<br />

­Ṉ<br />

N<br />

CI<br />

...I<br />

..<br />

I-~<br />

CI<br />

'It<br />

:I<br />

a:I<br />

'a ~<br />

C<br />

<<br />

en<br />

CI<br />

a:<br />

...<br />

CI<br />

a:I<br />

E<br />

~<br />

I I<br />

~<br />

-'ạ.<br />

D-6


SYSTEM BOARD (DYNAMIC MEMORY)<br />

Ṇ.. <br />

o -<br />

co<br />

Co><br />

'a.<br />

o<br />

.....<br />

'Eo<br />

E<br />

:i '"<br />

's Co><br />

.. <br />

> c<br />

CI<br />

-<br />

D-7


Ṉ-0<br />

SYSTEM BOARD (DYNAMIC MEMORY EXTENDED)<br />

, , ,<br />

I! ! IIII<br />

en<br />

u<br />

';;'<br />

0<br />

.....I<br />

"0<br />

...<br />

"0<br />

C<br />

~<br />

Yo!<br />

~ ~<br />

>-'"<br />

~<br />

0<br />

~? E<br />

~ 11 " c<br />

::iE<br />

I ... ~<br />

!§Ii<br />

,~<br />

Ẹ<br />

..<br />

c<br />

><br />

CI<br />

"0.. ...<br />

0<br />

11:1<br />

E<br />

~<br />

><br />

(n<br />

~~<br />

0-8


SYSTEM BOARD (SPEAKER/CASSETTE/TIMER/COUNTER)<br />

~ ~~ T~ ~ '"<br />

Sli.:O o. ~< ---I-----l~,<br />

,~"<br />

'.t v .,. I'<br />

....<br />

~ ~<br />

-Q<br />

-<br />

N<br />

0::»<br />

..<br />

';;'<br />

Q<br />

D-9


SYSTEM BOARD (KEYBOARD/SENSE/CONTROLl<br />

I<br />

Ṇ<br />

...<br />

- o<br />

'=o ..<br />

...J<br />

ẹ<br />

c ...<br />

Co.)<br />

-­ o<br />

..<br />

c..<br />

'"<br />

.!!?<br />

'E<br />

o<br />

>..<br />

.... '"<br />

~<br />

I<br />

~I~ IP : ~ """"<br />

D-IO


SYSTEM BOARD (I/O CHANNEL)<br />

-<br />

Ṉ<br />

o<br />

N<br />

~<br />

= ...<br />

z:<br />

(.)<br />

o<br />

--<br />

"CI<br />

..<br />

...<br />

o<br />

I:ICI<br />

E<br />

tl<br />

~<br />

0-11


\:j<br />

I<br />

"<br />

m<br />

<<br />

-tv CI:I<br />

Q<br />

»<br />

:11:1<br />

Q<br />

POIIER - .<br />


KEYBOARD<br />

~~"(c---i."<br />

~ ::g<br />

.. ~ (_.- --j"<br />

~;~<br />

~


I- z .....<br />

0<br />

t:::I<br />

0<br />

...<br />

;:;­<br />

~ r­<br />

~ 110 SLOT<br />

'"<br />

0<br />

::><br />

CD<br />

...<br />

::><br />

c..<br />

=e ...<br />

0-...<br />

0<br />

l<br />

CD<br />

< ...<br />

CD<br />

::><br />

0...<br />

II><br />

'C<br />

"E..<br />

n'<br />

II><br />

cr<br />

10<br />

(511T 8) DO<br />

A09<br />

01<br />

A08<br />

02<br />

AD'<br />

AO'<br />

" ""<br />

AD><br />

(5HT 8)<br />

(5HT S)<br />

(5HT ;1)<br />

+ J/O<br />

"0&<br />

+IRQ7<br />

+sv DECOUPLiNG CAPACITORS<br />

It-II I<br />

e2"~V .;'1<br />

r2 ' l:c<br />

1<br />

--803<br />

--829<br />

0.0,+1/-,F<br />

--'01<br />

--'"<br />

BIO<br />

A'"<br />

A03<br />

A02<br />

"0<br />

821<br />

All<br />

A30<br />

A29<br />

A28<br />

A2&<br />

m<br />

Al;<br />

A23<br />

'"<br />

A2I<br />

'20<br />

A"<br />

"I<br />

830<br />

803<br />

829<br />

801<br />

SiO<br />

811<br />

'0'<br />

812<br />

Ai'*<br />

802<br />

7'*LSIZS<br />

A<br />

:~ !UbO<br />

11 G<br />

12 USq II<br />

Y<br />

SAD<br />

.Ai<br />

SA2<br />

8.,<br />

"<br />

AS<br />

"A7<br />

AS<br />

AID<br />

Ail<br />

"S<br />

Ale '"<br />

AJ8<br />

AI<<br />

""<br />

+sv<br />

GROUND<br />

t<br />

(5HT 11,&,10)<br />

(SHT 4.6.10)<br />

(SHT ".b,lo)<br />

(5HT If,b.IO)<br />

(5HT 4,6)<br />

(SHT 4,b)<br />

(5kT 4,6)<br />

(SHT 4,6)<br />

(SHT 4,6)<br />

(5HT 4,6)<br />

(SHT 4)<br />

(SHT "I)<br />

(5HT 6)<br />

(5HT 6)<br />

(SHT 6)<br />

(5HT 6)<br />

(SHT b)<br />

(5HT 6)<br />

+12V<br />

-MEMW (SHT S.b)<br />

'Il<br />

7LflS!2,) ::z:I<br />

7LfLSIZ,><br />

7LflSIZ'><br />

9 !Pig­ 8<br />

'10<br />

c; t'l~- &<br />

"<br />

2 ur;9~ 3<br />

'I<br />

~,"L5""<br />

13 USb 12<br />

IlIII<br />

s:<br />

s:<br />

CI<br />

Z<br />

CI<br />

C":I<br />

:c<br />

::z:I<br />

CI<br />

s:<br />

rn<br />

CI<br />

en<br />

."<br />

r­<br />

)0<br />

<<br />

)0<br />

Z<br />

CI<br />

."<br />

)0<br />

::z:I<br />

)0<br />

r-<br />

r­<br />

rn<br />

r­<br />

."<br />

!:<br />

-MEMR (SHT 6.8) -I<br />

rn<br />

-lOR<br />

+-RESET<br />

-RESET<br />

(5HT 4,6,10)<br />

(5HT 6.8,10)<br />

(5HT C; ,7)<br />

(5HT 4.'5.7,9.10)<br />

Z<br />

)0<br />

CI<br />

)0<br />

~<br />

rn<br />

::z:I<br />

820 liD (LOCK (5H1 6)<br />

<strong>IBM</strong> Monochrome Display And Parallel Printer Adapter Logic 3 of 12<br />

) ) ) <br />

~


) ) ) <br />

CII:I<br />

74LSIS7<br />

3:<br />

2~<br />

_<br />

(SHT1) SAl ~ 18 IY~RMAO-- S~- 3:<br />

2A UI8 2Y 1-7-- RMAI -- -RMAO---!- AO CI<br />

26 lY ~- RMA2 -- -RMAI ~ AI ~4 z<br />

BA2 I I~ lO,A 4Y ~ RMA 1 -- -RMA2-i;- A2 n UIS 1/01 (SHT 8,12;) CI<br />

(SHT ~)<br />

(SHT1) SAl 16 RMA,------':'" Al II02 n<br />

T :c<br />

(SHT" I I 14 4A " " " " " " " " " "" RMA4~ A4 I/0, 12<br />

I' 46SEL G l~. _RMA"----L AS 1104 II (SHTS.'2)<br />

~ =<br />

I~~ -RMA6~ CI<br />

74LSIS7 I IS ~ ~ 4 ~ '" "" 6 :~ A6 -RMA7~ A7 3:<br />

J +CACSCCLK 74LSI'i7 10 - 212<br />

T<br />

(SHT1) 18 UI7 IY ~ RMA4 -- "" l-t r- -RMA8~ A8 m<br />

l"" S b 2A 2Y i--2-- RMAS __ llf 4 A2 UI1 Al -RMA9----;:::- ~WE A9<br />

(SHT,) CI<br />

II 26 1Yr-;zRMA6-- J~ A4 A7 10~: 4Y~RMA7 ~~~~~~ ,~"~'~AS en<br />

UI2 ~ C5<br />

(SHT" 8-<br />

I~I 17 A7 <br />

11 14 4A CS<br />

(SHT1) <br />

A8 48SELG 16 A8 I/O I 14 CC4<br />

(SHT'j) I I') IS Alf I/O 11 CC'j :to<br />

-<<br />

(SHTf,l)<br />

~~ :to<br />

4 7 rF~ :;~~ II (SHT6,'.0 z<br />

(SHT1) 18UltiIY~RMA8-- 8<br />

I ~~: 2Y~RMA9-- rl~<br />

II ~,. J I :to<br />

(5HT;)<br />

~A8<br />

(SHT" <br />

(SHT1) (SHTS) 1<br />

~ r IB 7:~ (SHT8)<br />

(SHT,) (SHT til (SHT1) (SHT" I? "[,,,<br />

M(684S 12 2 ,A ,'6 4<br />

r~~<br />

I IS - ~ IG U7 IV! ') 6 AO I-- ,...<br />

BOO MAO m<br />

T<br />

,...<br />

801- ,2 01<br />

MAO <br />

l!C'1 14 ATO<br />

11 02 '~~<br />

4A1UIII/02:; ATI<br />

MA2<br />

10 0 , ' 7 'A4 I/O, ~AT2 "'1:1<br />

801 MA> <br />

29<br />

804 MA4<br />

14 ~~U72Y5 12 _""- ",,-,\----2 A'j 1104 II ~ _ An (SHT7.8)<br />

~<br />

:2<br />

BD> 28 D'j<br />

MAO z<br />

BDb 27 D6 MAti 10<br />

16 A7 UJO 6<br />

" 2G 2" " l~; Ab U~~<br />

:~<br />

26<br />

-I<br />

m<br />

T<br />

'07 07 MA7 II<br />

74LS04 ~ "'" IS:: 7A2 I/01~4<br />

MAO<br />

U9<br />

~~~ ~<br />

I~


tl<br />

I-0'1<br />

,"<br />

r-" "~<br />

(S"T" 'RESET I<br />

Eo 74l50'+<br />

(SHn) -RESET I I I I I I~<br />

(SHT 3)<br />

(SHTb)<br />

(SHT 0)<br />

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NOTES


Appendix E <br />

Unit Specifications <br />

System Unit<br />

~ Size:<br />

Length--19.6" (500 mm)<br />

Depth--16.1" (410 mm)<br />

Height--5.5" (142 mm)<br />

Weight:<br />

Without Diskette Drive Unit-20.9 Ibs (9.5 kg)<br />

With Diskette Drive Unit-25 lbs (11.4 kg)<br />

Power Cable: <br />

Length--6'O" (1.83 mm) <br />

Size--18 AWG <br />

Environment:<br />

Air Temperature<br />

System ON, 60° to 90° - F (15.6° to 32.2° C)<br />

System OFF, 50° to 110° - F (10° to 43° C)<br />

Humidity<br />

System ON, 8% to 80%<br />

System OFF, 20% to 80%<br />

Heat Output, 1083 BTU/HR (Maximum)<br />

Noise Levels: <br />

Without Printer, 59 DBS <br />

With Printer, 66 DBS <br />

Electrical: <br />

Nominal-120 VAC <br />

Minimum-l04 VAC <br />

Maximum-127 VAC <br />

KVA-.3175 maximum <br />

Keyboard<br />

Size: <br />

Length--19.6" (500 mm) <br />

Depth--7.87" (200 mm) <br />

Height-2.2" (57 mm) <br />

Weight:<br />

6.5 lbs (14.3 kg)<br />

E-!


<strong>IBM</strong> Monochrome Display<br />

Size:<br />

Length--14.9" (380 mm)<br />

Depth-13.7" (350 mm)<br />

Height--ll" (280 mm)<br />

Weight:<br />

17.3 lbs (7.9 kg)<br />

Heat Output:<br />

325 BTU/HR<br />

Power Cable:<br />

Length--3.0" (914 mm)<br />

Size--18 AWG<br />

Signal Cable:<br />

Length--4'0" (1.22 mm)<br />

Size--22 A WG<br />

<strong>IBM</strong> 80 CPS Matrix Printer<br />

Size:<br />

Length--15.7" (400 mm)<br />

Depth--14.5" (370 mm)<br />

Height-4.3" (110 mm)<br />

Weight:<br />

12.9 lbs (5.9 kg)<br />

Power Cable:<br />

Length--6.0" (1.83 mm)<br />

Size--18 AWG<br />

Signal Cable:<br />

Length--6'0" (1.83 mm)<br />

Size-22 AWG<br />

Heat Output:<br />

341 BTU/HR (Max.)<br />

Electrical:<br />

Nominal-120 VAC<br />

Minimum-104 V AC<br />

Maximum-127 VAC<br />

E-2


GLOSSARY <br />

1. Address Buss: A set of wires or signals carrying the binarycoded<br />

address from the Intel-8088 microprocessor throughout<br />

the rest of the <strong>IBM</strong> Personal Computer System Unit.<br />

2. AEN: Address Enable. (Refer to System Board I/O Channel<br />

Descriptions).<br />

3. ALE: Address Latch Enable. (Refer to System Board I/O<br />

Channel Descriptions).<br />

4. Analog: (1) Pertaining to representation by means of continuously<br />

variable physical quantities. (2) Contrast with digital.<br />

5. A!N: Alphanumeric: Pertaining to a character set that contains<br />

letters, digits, and usually other characters, such as punctuation<br />

marks. Syonymous with alphameric.<br />

6. AO-AI9: Address bits 0-19. (Refer to System Board I/O<br />

Channel Descriptions).<br />

7. APA: All points addressable graphics.<br />

8. ASCII: American Standard Code of Information Interchange.<br />

The standard code, using a coded character set consisting of7­<br />

bit coded characters (8 bits including parity check), used for<br />

information interchange among data processing systems, data<br />

communication systems and associated equipment. The<br />

ASCII set consists of control characters and graphic<br />

characters.<br />

9. Assembler: A computer program used to assemble. Synonymous<br />

with assembly program.<br />

10. BASIC: (Beginner's all-purpose symbolic instruction code). A<br />

programming language with a small repetoire ofcommands and<br />

a simple syntax, primarily designed for numerical application.<br />

11. BAUD: (1) A unit of signaling speed equal to the number of<br />

discrete conditions or signal events per second in Morse code,<br />

one bit per second in a train of binary signals, and one 3-bit<br />

value per second in a train of signals each ofwhich can assume<br />

one of eight different states. (2) In asynchronous transmission,<br />

the unit ofmodulation rate corresponding to one unit ofinterval<br />

per second, i.e. if the duration of the unit interval is 20<br />

milliseconds, the modulation rate is 50 baud.<br />

G-l


12. Binary: (1) Pertaining to a selection, choice, or condition that<br />

that has two possible values or states. (2) Pertaining to a fixed<br />

radix numeration system having a radix of two.<br />

13. BIOS: Basic Input/Output System.<br />

14. Bootstrap: A technique or device designed to bring itself into a<br />

desired state by means ofit's own action, e.g. a machine routine<br />

whose first few instructions are sufficient to bring the rest of<br />

itself into the computer from an input device.<br />

15. Buffer: An area of storage that is temporarily reserved for use in<br />

performing an input/output operation, into which data is read or<br />

from which data is written. Synonymous with I/O area. A<br />

portion of storage for temporarily holding input or output data.<br />

16. Bus: One or more conductors used for transmitting signals or<br />

power.<br />

17. Byte: (1) A binary character operated upon as a unit and<br />

usually shorter than a computer word. (2) The representation of<br />

a character.<br />

18. CLK: Clock. (Refer to System Board I/O Channel<br />

Descriptions).<br />

19. Code: (1) A set ofunambiguous rules specifying the manner in<br />

which data may be represented in a discrete form. Synonymous<br />

with coding scheme. (2) A set of items such as abbreviations<br />

representing the members of another set. (3) Loosely, one<br />

or more computer programs, or part of a computer program.<br />

(4) To represent data or a computer program in a symbolic form<br />

that can be accepted by a data processor.<br />

20. Computer: A data processor that can perform substantial<br />

computation, including numerous arithmetic operations, or<br />

logic operations, without intervention by a human operator<br />

during the run.<br />

21. CPS: Characters per second.<br />

22. CRC: The cyclic redundancy check character.<br />

23. CRT: (1) A Cathode ray tube display. (2) A display device,<br />

such as the <strong>IBM</strong> Monochrome Display, that uses a cathode ray<br />

tube.<br />

24. CTS: Conversational Terminal System. (2) Clear to Send.<br />

Associated with modem control.<br />

25. DACKO-DACK3: DMA Acknowledge 0 to 3. (Refer to<br />

System Board I/O Channel Description).<br />

G-2


26. Data: (1) A representation offacts, concepts or instructions in a<br />

formalized manner suitable for communication, interpretation,<br />

or processing by humans or automatic means. (2) Any representations<br />

such as characters or analog quantities to which<br />

meaning is, or might be assigned.<br />

27. Din Connectors: One of the connectors specified by the Din<br />

standardization committee.<br />

28. DIP: "Dual In-Line Package." A widely used container for an<br />

integrated circuit. DIP's are pins usually in two parallel rows.<br />

These pins are spaced on 1/10" inters and come in different<br />

configurations ranging from a 14-pin assembly to a 40-pin<br />

configuration.<br />

29. Display: A visual presentation of data.<br />

30. DMA: Direct Memory Access.<br />

31. DO-D7: Data Bits 0 to 7. (Refer to System Board I/O Channel<br />

Descriptions).<br />

32. DRQI-DRQ3: DMA Request 1 to 3. (Refer to System Board<br />

I/O Channel Descriptions).<br />

33. DSR: Data Set Ready, associated with modem control.<br />

34. DTR: Distribution Tape Reel.<br />

35. Edge Connector: An opening which joins with the end of a<br />

circuit board. The purpose ofthis interface is to send electrical<br />

signals back and forth.<br />

36. EIA/CCITT Drives: Electronic Industries Association/<br />

Consultative Committee on International Telegraphy and<br />

Telephony Drives.<br />

EPROM or 'PROM': Tern1 for "Programmable Read-Only<br />

Memory." An EPROM or 'PROM' is actually Read-Only<br />

Memory (ROM) but the contents may be changed by electrical<br />

means. EPROM or 'PROM' information is not destroyed when<br />

the power is cut off.<br />

37. Firmware: Memory chips with the software programs already<br />

built in.<br />

38. Graphics: Symbols Produced by a process such as handwriting,<br />

drawing or printing. Synonymous with graphic symbol.<br />

39. Hexadecimal: Pertaining to a selection, choice, or condition<br />

that has sixteen possible values or states. These values or states<br />

usually contain 10 digits and six letters A through F. Hexadecimal<br />

digits are equivalent to a power of 16.<br />

G-3


40. Hertz (Hz.): A unit offrequency equal to one cycle per second.<br />

41. High order position: The leftmost position in a string of<br />

characters.<br />

42. Input/Output (I/O): Pertaining to a device or to a channel that<br />

may be involved in an input process, and, at a different time, in<br />

an output process. (2) Pertaining to a device whose parts can be<br />

performing an input process and an output process at the same<br />

time.<br />

43. Integrated Circuit: A combination of interconnected circuit<br />

elements inseperably associated on or within a continuous<br />

substrate.<br />

44. Interpreter: A computer program used to interpret. Synonymous<br />

with interpretive program.<br />

45. Interrupt: (1) A suspension of a process, such as the execution<br />

of a computer program, in such a way that the process can be<br />

resumed. (2) To stop a process in such a way that it can be<br />

resumed. (3) In data transrnission, to take an action at a<br />

receiving station that causes the transmitting station to terminate<br />

a transmission.<br />

46. I/O Channel: Input/Output Channel. In a data processing<br />

system, a functional unit, controlled by the processing unit, that<br />

handles the transfer of data between main storage and peripheral<br />

equipment.<br />

47. I/OCH CK: I/O Channel Check. (Refer to System Board I/O<br />

Channel Descriptions).<br />

48. I/O CH ROY: I/O Channel Ready. (Refer to System Board<br />

I/O Channel Descriptions).<br />

49. IMR: Interruption Mask Register.<br />

50. lOR: I/O Read Command. (Refer to System Board I/O<br />

Channel Descriptions).<br />

51. lOW: I/O Write Command: (Refer to System Board I/O<br />

Channel Descriptions).<br />

52. IRQ2-IRQ7: Interrupt Request 2 to 7. (Refer to System Board<br />

I/O Channel Descriptions).<br />

53. K: An abbreviation for the prefix kilo, i.e. 1000 in decimal<br />

notation. To the tenth power, 1024 in decimal notation.<br />

54. KB: Kilobyte.<br />

55. Khz: Kilohertz. A unit of frequency equal to 1,000 hertz.<br />

G-4


--...,<br />

56. Low order position: The rightmost position in a string of<br />

characters.<br />

57. Machine Language: (1) A language that is used directly by a<br />

machine. (2) Another term for computer instruction code.<br />

58. Memory Address: A two-byte value selecting one specific<br />

memory location on a memory map.<br />

59. Memory Location: The most specific part of a memory map<br />

that the computer can refer to.<br />

60. Memory Map: The list ofmemory locations addressed directly<br />

by the microprocessor.<br />

61. MEMR: Memory Read Command. (Refer to System Board<br />

I/O Channel Descriptions).<br />

62. MEMW: Memory Write Command. (Refer to System Board<br />

I/O Channel Descriptions).<br />

63. MFM Coded: Modified Frequency Modulation. It is double<br />

density encoding of information on a diskette.<br />

64. Mhz: Megahertz. A unit of frequency equal to one million<br />

Hertz.<br />

,~ 65. Microprocessor: A processing unit, or part ofa processing unit,<br />

that consists ofmicrocode. In the <strong>IBM</strong> Personal Computer, the<br />

microprocessor is the Intel-8088.<br />

66. Mnemonic: Symbol or symbols used instead of terminology<br />

more difficult to remember. Usually a mnemonic has two or<br />

three letters.<br />

67. Mode: (1) A method of operation; for example, the binary<br />

mode, the interpretive mode, the alphanumeric mode. (2) The<br />

most frequent value in the statistical sense.<br />

68. Monitor: (1) A device that observes and verifies the operation<br />

of a data processing system and indicates any specific departure<br />

from the norm. (2) A television type display such as the<br />

<strong>IBM</strong> Monochrome Display. (3) Software or hardware that<br />

observes, supervises, controls, or verifies the operations of a<br />

system.<br />

69. Multiplexer: A device capable ofinterleaving the events oftwo<br />

or more activities or capable of distributing the events of an<br />

interleaved sequence to their respective activities.<br />

G-5


70. OR: A logic operator having the property that if P is a<br />

statement, Q is a statement, R is a statement. .., then the OR of<br />

P,Q,R, is true if at least one statement is true, false if all<br />

statements are false. P OR Q is often represented by P+Q,<br />

PVQ. The term is synonymous with boolean add; logic add.<br />

71. "ORed": Past tense of OR.<br />

72. OSC: Oscillator. (Refer to System Board I/O Channel<br />

Descriptions).<br />

73. Output: Pertaininng to a device, process, or channel involved in<br />

an output process, or to the data or states involved in an output<br />

process.<br />

74. Personal Computer: A small home or business computer<br />

complete with a System Unit, keyboard, and available with a<br />

variety ofoptions such as monochrome display and a dot matrix<br />

printer.<br />

75. Pinout: A diagram of functioning pins on a pinboard.<br />

76. Printed Circuit Board: A piece of material, usually fiberglass,<br />

which contains a layer of conductive material, usually metal.<br />

The metallic layer is then etched and electronic equipment is<br />

then attached to the fiberglass. The electronic equipment then<br />

has the capacity to transmit electronic signals through the board<br />

by way of the etched metal tracks.<br />

77. Program: (1) A series of actions designed to achieve a certain<br />

result. (2) To design, write and test computer programs.<br />

78. Read/Write Memory: Random access storage.<br />

79. Reset Drv: Reset Driver. (Refer to System Board I/O Channel<br />

Descriptions).<br />

80. RF Modulator: The device used to convert the composite video<br />

signal to the antenna level input of a home TV.<br />

81. ROM: Read-only Memory.<br />

82. ROM BIOS: Read-only Memory/Basic Input Output System.<br />

83. RS 232 Port: Asynchronous Type Communications.<br />

84. RTS: Ready to Send. Associated with modem control.<br />

G-6


85. Scan Line: The use of a cathode beam to test the cathode ray<br />

tube of a display used with a personal computer.<br />

86. Schematic: The description, usually in diagram form, of the<br />

logical structure and physical structure of an entire data base<br />

according to a conceptual model.<br />

~ 87. Software: (1) Computer programs, procedures, rules, and<br />

possibly associated documentation concerned with the operation<br />

of a data processing system. (2) Contrast with hardware.<br />

88. Strobe: (1) An instrument used to determine the exact speed of<br />

circular or cyclic movement. (2) A flashing signal displaying an<br />

exact event.<br />

89. Text: In ASCII and data communication, a sequence of<br />

characters treated as an entity if preceded and terminated by<br />

one STX and one ETX transmission control respectively.<br />

90. TX Data: Transmit Data. External connections ofthe RS 232<br />

Asynchronous Communications Adapter interface.<br />

91. Video: Computer data shown or displayed on a cathode ray<br />

tube monitor or display.<br />

G-7


G-8 <br />

NOTES


BIBLIOGRAPHY<br />

<strong>IBM</strong> Publications<br />

1. <strong>IBM</strong> Personal Computer Guide to Operations­<br />

1"""""'\ PN 6025000<br />

General information on using the <strong>IBM</strong> Personal<br />

Computer.<br />

2. <strong>IBM</strong> Personal Computer Hardware and Service­<br />

PN 6025072<br />

Information on hardware and steps necessary when<br />

servicing this <strong>IBM</strong> Personal Computer.<br />

3. <strong>IBM</strong> Personal Computer BASIC-PN 6025010<br />

Information for programmers who are using BASIC.<br />

4. <strong>IBM</strong> Personal Computer Disk Operating System (DOS)­<br />

PN 6024001<br />

Information for programmers who are using DOS.<br />

5. <strong>IBM</strong> Personal Computer MACRO Assembler­<br />

PN 6024002<br />

Infomlation for experienced assembly language<br />

programmers using the Macro Assembler.<br />

6. <strong>IBM</strong> Personal Computer Pascal Compiler-PN 6024010<br />

Information for programmers who are familiar with the<br />

Pascal language.<br />

Bib-l


Other Related Publications<br />

7. NATIONAL SEMICONDUCTOR<br />

INS 8250 Asynchronous Communications Element<br />

This book documents physical and operating characteristics<br />

of the INS 8250. ~<br />

8. INTEL<br />

The 8086 Family Users Manual<br />

This manual introduces the 8086 family of microcomputing<br />

components and serves as a reference in system design<br />

and implementation.<br />

9. INTEL<br />

8086/8087/8088 Macro<br />

ASSEMBLY Language<br />

<strong>Reference</strong> Manual for 8088/8085 Based Development<br />

System<br />

The manual describes the 8086/8087/8088 Macro Assembly<br />

Language, and is intended for use by persons who are familiar<br />

with assembly language.<br />

10. MOTOROLA<br />

The complete Microcomputer Data Library ~<br />

This book can provide additional information on the Motorola<br />

6845 CRT Controller used in the <strong>IBM</strong> Monochrome Display<br />

and Parallel Printer Adapter, and the Color/Graphics<br />

Monitor Adapter.<br />

Bib-2


INDEX<br />

A<br />

AO-AI9 (Address Bits 0-19) 2-10<br />

A.C. Output 2-34<br />

Adapters<br />

Asynchronous Communications (RS232) 2-123<br />

Color/Graphics 2-45<br />

5 1/4" Diskette Drive 2-89<br />

Game Control 2-117<br />

<strong>IBM</strong> Monochrome Display and Parallel Printer 2-37<br />

Parallel Printer 2-65<br />

Adapter Attribute Relationship 2-51<br />

Adapter Inputs 2-107<br />

Adapter Outputs 2-106<br />

Address Bits (AO-AI9) 2-10<br />

Address Decode 2-118<br />

Address Enable (AEN) 2-12<br />

Address Latch Enable (ALE) 2-10<br />

Address Strobe (ADS) 2-129<br />

ADS (Address Strobe) 2-129<br />

AEN (Address Enable 2-12<br />

ALE (Address Latch Enable) 2-10<br />

Algorithms 3-8<br />

All Points Addressable (APA) 2-45<br />

Alphanumeric Mode 2-49<br />

American Standard Code for Information Interchange (ASCII) 1-2<br />

Analog Input 2-122<br />

A/N (Alphanumeric) 2-49<br />

Appendices A-O<br />

A - ROM BIOS Listing A-I<br />

B - Assembly Instruction Set <strong>Reference</strong> B-1<br />

C - Of Characters, Keystrokes and Color C-l<br />

D - Logic Diagrams D-l<br />

E - Unit Specifications E-l<br />

APA (All Points Addressable) 2-45<br />

ASCII - (See American Standard Code for Information<br />

Interchange) 1-2<br />

ASCII Coding Table 2-78<br />

ASCII Control Codes 2-79<br />

ASCII (Extended) 3-11<br />

Assembly Instruction Set <strong>Reference</strong> Appendix B<br />

Assembly Language <strong>Reference</strong> Guide (See Bibliography)<br />

Assessable Registers 2-154<br />

1-1


Asynchronous Communications Adapter<br />

Block Diagram 2-124<br />

Current Loop Interface 2-127<br />

Input/Output Decode 2-125<br />

Input/Output Signals 2-133<br />

Input Signals 2-129<br />

Interface Description 2-126<br />

Interface Specifications 2-147<br />

Interrupt 2-126<br />

Interrupt Enable Register 2-141<br />

Interrupt Identification Register 2-139<br />

INS 8250 Accessible Registers 2-134<br />

INS 8250 Functional Pin Description 2-129<br />

INS 8250 Line Control Register 2-134<br />

INS 8250 Programmable Baud Rate Generator 2-135<br />

Line Status Register 2-137<br />

Logic Diagram D-48<br />

Modem Control Register 2-142<br />

Modem Status Register 2-143<br />

Modes of Operation 2-125<br />

Output Signals 2-132<br />

Programming Considerations 2-133<br />

Receiver Buffer Register 2-144<br />

Reset Functions 2-133<br />

Selecting the Interface Format 2-146<br />

Transmitter Holding Register 2-145<br />

B<br />

BASIC (Beginner's all-purpose symbolic instruction code)<br />

80 Interpreter 1-1<br />

Reserved Interrupts 3-23<br />

Screen Editor Special Functions 3-19<br />

Workspace Variables 3-23<br />

Baud (See ,INS 8250 Programmable Baud Rate Generator) 2-132<br />

Baud Out (BAUDOUT) 2-132<br />

BEL (Bell) 2-82<br />

Bell (BEL) 2-82<br />

Berg Pin Connectors 2-63<br />

BIOS<br />

(Basic Input Output System) 3-2<br />

Cassette Logic 3-8<br />

Memory Map 3-7<br />

Interrupt Vector Listing 3-3<br />

Parameter Passing 3-2<br />

1-2


BIOS (continued)<br />

Programming Tip 3-2<br />

ROM (Read Only Memory) 3-2<br />

Use of 3-2<br />

Vectors With Special Meaning 3-5<br />

BIT<br />

I/O Address 2-42<br />

I/O Bit Map 2-24<br />

Output Port Cassette 2-19<br />

Output Port Speaker 2-22<br />

Status Register 2-59<br />

Block Diagrams<br />

Asynchronous Communications Adapter 2-124<br />

Cassette Motor Control 2-20<br />

Cassette Interface Read 2-19<br />

Cassette Interface Write 2-20<br />

Color/Graphics Monitor Adapter 2-47<br />

5 1/4" Diskette Drive Adapter 2-90<br />

Game Control Adapter 2-117<br />

Keyboard Interface 2-15<br />

<strong>IBM</strong> Monochrome Display Adapter 2-38<br />

Parallel Printer Adapter 2-66<br />

System 1-4<br />

Bootstrap 3-3<br />

Byte:<br />

Attribute Definition 2-49<br />

Display Buffer 2-61<br />

c<br />

CAN (Cancel) 2-81<br />

Cancel (CAN) 2-81<br />

Carriage Retum(CR) 2-79<br />

Cassette<br />

Circuit Block Diagrams 2-19<br />

Data Record Architecture 3-10<br />

Error Recovery 3-10<br />

Interface Connector Specifications 2-21<br />

~ Interrupt 15 3-8<br />

Jumpers 2-19<br />

Logic (BIOS) 3-8<br />

Read 3-9<br />

Write 3-8<br />

1-3


Character <br />

Codes 3-11 <br />

Generator 2-48 <br />

"Of Characters, Keystrokes and Color Appendix C <br />

Set (00-7F) Quick <strong>Reference</strong> C-12 <br />

Set (80-FF) C-13 <br />

Chip Select Out (CSOUT) 2-132 <br />

Clear To Send (CTS) 2-130 <br />

Clock (4.77 mhz) 2-10 <br />

CLK (Clock) 2-10 <br />

CNTRL (Control) 3-14 <br />

Coding Table (ASCII) 2-78 <br />

Color/Graphics Monitor Adapter <br />

Block Diagram 2-47 <br />

Character Generator 2-48 <br />

Color/Graphics Mode 2-51 <br />

Color Select Register 2-57 <br />

Composite Color Generator 2-48 <br />

Description of Basic Operations 2-54 <br />

Display Buffer 2-48 <br />

Graphics Storage Map 2-52 <br />

I/O Address and Bit Map 2-61 <br />

Interrupt Level 2-60 <br />

Logic Diagrams D-25 <br />

Major Component Definitions 2-48 <br />

Memory Requirements 2-60 <br />

Mode Register Summary 2-58 <br />

Mode Select Register 2-58 <br />

Mode Set and Status Registers 2-48 <br />

Modes of Operation 2-49 <br />

Monitor Adapter Auxiliary Connectors 2-63 <br />

Monitor Adapter Direct Drive and Composite Interface <br />

Pin Assignment 2-62 <br />

Monochrome Display Adapter Vs. Color/Graphics Adapter <br />

Attribute Relationship 2-51 <br />

Motorola 6845 CRT Controller 2-48 <br />

Programming the 6845 Controller 2-48 <br />

Programming the Mode Control and Status Registers 2-57 <br />

6845 Register Description 2-56 <br />

Sequence of Events 2-59 <br />

Timing Generator 2-48 <br />

Composite Phone Jack 2-62 <br />

Computer (<strong>IBM</strong> Personal) 1-1 <br />

Command Phase 2-93 <br />

1-4


Command Status Registers <br />

Register 0 2-100 <br />

Register 1 2-101 <br />

Register 2 2-102 <br />

Register 3 2-103 <br />

Control Codes <br />

CPS (Characters Per Second) 2-70 <br />

CPU (Central Processing Unit) see System Board, <br />

Microprocessor 2-3 <br />

CR (Carriage Return) 2-79 <br />

CRT: <br />

(Cathode Ray Tube) 2-37 <br />

Output Port 1 (I/O Address '3B8') 2-42 <br />

Status Port (I/O Address '3BA') 2-43 <br />

CTS (Clear To Send) 2-130 <br />

CSOUT (Chip Select Out) 2-132 <br />

Current 2-34 <br />

Cursor 2-14 <br />

D<br />

DO-D7 JData Bits 0-7) 2-10 <br />

DACK - DAcK3 (DMA Acknowledge 0 to 3)<br />

DATA <br />

Bit (DO-D7) 2-10 <br />

Bus Buffer/Driver 2-118 <br />

Input Strobe (DISTR, DISTR) 2-129 <br />

Output Strobe (DOSTR, DOSTR) 2-129 <br />

Rates 2-39 <br />

Record Architecture 3-10 <br />

Set Ready (DSR) 2-131 <br />

Data Flow (System) 2-6 <br />

Data Flow (System) 2-6 <br />

DC 1 (Device Control 1) 2-81 <br />

DC 2 (Device Control 2) 2-81 <br />

DC 3 (Device Control 3) 2-81 <br />

DC 4 (Device Control 4) 2-80 <br />

DC Output 2-34 <br />

DEL (Delete) 2-81 <br />

Delete (DEL) 2-81 <br />

Device Control 1 (DC 1) 2-81 <br />

Device Control 2 (DC 2) 2-81 <br />

Device Control 3 (DC 3) 2-81 <br />

Device Control 4 (DC 4) 2-80 <br />

Digital Output Register (DOR) 2-91 <br />

2-12 <br />

1-5


DIN (Connectors) 2-5<br />

DIP (Dual In-Line Package) 2-28<br />

Diskettes 2-111<br />

Diskette Drive (5 1/4") 2-110<br />

Diskette Drive (5 1/4") Adapter<br />

Adapter Inputs 2-106<br />

Adapter Outputs 2-107<br />

Block Diagram 2-90<br />

Command Status Registers 2-100<br />

Command Summary 2-96<br />

Comments (Programming) 2-104<br />

Digital Output Register 2-91<br />

Drive A and B Interface 2-106<br />

Drive Constants 2-104<br />

D<strong>PC</strong> Registers 2-103<br />

External Interface Specifications 2-109<br />

Floppy Disk Controller 2-91<br />

Functional Description 2-91<br />

Internal Interface Specifications 2-108<br />

Logic Diagrams D-35<br />

Programming Considerations 2-94<br />

Programming Summary 2-103<br />

System I/O Channel Interface 2-104<br />

Display (See <strong>IBM</strong> Monochrome Display) 2-43<br />

Display Buffer 2-48<br />

DISTR, DISTR (Data Input Strobe) 2-129<br />

Divisor Latch 2-136<br />

DMA (Direct Memory Access) 2-4<br />

Dos Special Functions 3-19<br />

DOSTR, DOSTR (Data Output Strobe) 2-129<br />

Drive Constants 2-104<br />

Drive Disable 2-132<br />

DRQ1 - DRQ3 (DMA Request 1 to 3) 2-12<br />

DSR (Data Set Ready) 2-131<br />

DTR (Data Terminal Ready) 2-132<br />

Dual In-Line Package Switches (DIP) 2-28<br />

E<br />

Edge Connector 2-108<br />

Encoding 3-11<br />

Error Recovery 3-10<br />

ESC (Escape) 2-82<br />

ESC A (Escape A) 2-83<br />

ESC B (Escape B) 2-84<br />

1-6


ESC C (Escape C) 2-85<br />

ESC D (Escape D) 2-85<br />

ESC E (Escape E) 2-86<br />

ESC F (Escape F) 2-86<br />

ESC G (Escape G) 2-86<br />

ESC H (Escape H) 2-87<br />

ESC 0 (Escape 0) 2-82<br />

ESC 1 (Escape 1) 2-82<br />

ESC 2 (Escape 2) 2-83<br />

ESC 8 (Escape 8) 2-83<br />

ESC 9 (Escape 9) 2-83<br />

Escape (ESC) 2-82<br />

Escape A (ESC A) 2-83<br />

Escape B (ESC B) 2-84<br />

Escape C (ESC C) 2-85<br />

Escape D (ESC D) 2-85<br />

Escape E (ESC E) 2-86<br />

Escape F (ESC F) 2-86<br />

Escape G (ESC G) 2-86<br />

Escape H (ESC H) 2-87<br />

Escape 0 (ESC 0) 2-82<br />

Escape 1 (ESC 1) 2-82<br />

Escape 2 (ESC 2) 2-83<br />

Escape 8 (ESC 8) 283<br />

Escape 9 (ESC 9) 2-83<br />

Execution Phase 2-93<br />

Extended Codes 3-13<br />

F<br />

FDC (Floppy Disk Controller) 2-91<br />

Floppy Disk Controller (FDC) 2-91<br />

Fonts 2-48<br />

Functions and Conditions of DIP Switch 1 2-72<br />

Functions and Conditions of DIP Switch 2 2-73<br />

Functional Description<br />

5 1/4" Diskette Drive Adapter 2-91<br />

Game Control Adapter 2-118<br />

INS 8250 2-129<br />

G<br />

Game Control Adapter<br />

Address Decode 2-118<br />

Block Diagram 2-117<br />

1-7


Game Control Adapter (continued) <br />

Connector Specifications 2-122 <br />

Data Bus Buffer/Driver 2-118 <br />

Functional Description 2-118 <br />

Interface Description 2-119 <br />

Joystick Positions 2-118 <br />

Joystick Schematic 2-121 <br />

Trigger Buttons 2-118 <br />

Glossary G-l <br />

GND (Ground) 2-12 <br />

Graphics Character Extensions (Interrupt 1 FH)<br />

Graphics Mode (Color) 2-51 <br />

Graphics Storage Map 2-52 <br />

H<br />

3-6 <br />

Hardware <br />

Asynchronous Communications Adapter 2-123 <br />

Color/Graphics Monitor Adapter 2-45 <br />

5 1/4" Diskette Drive 2-110 <br />

5 1/4" Diskette Drive Adapter 2-89 <br />

Game Control Adapter 2-117 <br />

<strong>IBM</strong> Monochrome Display 2-43 <br />

<strong>IBM</strong> Monochrome Display and Parallel Printer Adapter 2-37 <br />

Memory Expansion Options 32KB and 64KB 2-113 <br />

Printer 2-70 <br />

Parallel Printer Adapter 2-65 <br />

Power Supply 2-33 <br />

System Board 2-3 <br />

Hardware <br />

Overview 1-1 <br />

Data Flow 2-6 <br />

Hertz (Hz) 1-2 <br />

Horizontal Drive 2-43 <br />

Horizontal Tab (HT) 2-81 <br />

HT (Horizontal Tab) 2-81 <br />

I <br />

<strong>IBM</strong> 80 CPS Matrix Printer 2-70 <br />

<strong>IBM</strong> Monochrome Display 2-43 <br />

<strong>IBM</strong> Monochrome Display and Parallel Printer Adapter <br />

Block Diagram 2-38 <br />

Data Rates 2-39 <br />

Direct Drive Interface and Pin Assignment 2-44 <br />

1-8


<strong>IBM</strong> Monochrome Display and Parallel Printer Adapter (continued) <br />

DMA Channel 2-42 <br />

Interrupt and DMA Response Requirements 2-39 <br />

Interrupt Levels 2-42 <br />

I/O Address and Bit Map 2-42 <br />

Lines Used 2-39 <br />

Loads 2-39 <br />

Memory Requirements 2-41 <br />

Modes of Operation 2-40 <br />

Programming the 6845 CRT Controller 2-41 <br />

Sequence of Events 2-41 <br />

Important Operating Characteristics 2-36 <br />

IER (Interrupt Enable Register) 2-141 <br />

IIR (Interrupt Identification Register) 2-139 <br />

Input/Output Signals: <br />

Data (DO, D7) 2-133 <br />

External Clock Input/Output (XTALl, XTAL2) 2-133 <br />

Input Requirements (Power Supply) 2-34 <br />

Input Signals <br />

Address Strobe (ADS) 2-129 <br />

Chip Select (SCO, CSl, CS2) 2-129 <br />

Clear to Send (CTS) 2-130 <br />

Data Input Strobe (DISTR, DISTR) 2-129 <br />

Data Output Strobe (DOSTR, DOSTR) 2-129 <br />

Data Set Ready (DSR) 2-131 <br />

Master Reset (MR) 2-130 <br />

Received Line Signal (RCLK) 2-130 <br />

Receiver Clock (RCLK) 2-130 <br />

Register Select (AO, AI, A2) 2-130 <br />

Ring Indicator (RI) 2-131 <br />

Serial Input (SIN) 2~130 <br />

Interface Diagram <br />

Asynchronous Communications Adapter 2-147 <br />

Cassette Connector Specifications 2-21 <br />

Color/Graphics Monitor Adapter 2-62 <br />

5 1/4" Diskette Drive Adapter External 2-109 <br />

5 1/4" Diskette Drive Adapter Internal 2-108 <br />

Game Control 2-122 <br />

<strong>IBM</strong> Monochrome Display Direct Drive 2-44 <br />

Keyboard Connector Specifications 2-18 <br />

Parallel Printer 2-69 <br />

INTRPT (Interrupt) 2-132 <br />

Interrupt Control Functions 2-140 <br />

Intel 8048 (Keyboard Microcomputer) 2-14 <br />

Intel 8088 (System Unit Microprocessor) 2-3 <br />

1-9


I/O (Input/Output)<br />

Address Map 2-33<br />

Channel 2-8<br />

Channel Description (System Board) 2-10<br />

Diagram 2-9<br />

I/O CH CK (I/O Channel Check) 2-10<br />

I/O CH RDY (I/O Channel Ready) 2-11<br />

lOR (I/O Read Command) 2-11<br />

lOW (I/O Write Command) 2-11<br />

Interrupts<br />

And DMA Response Requirements 2-39<br />

Enable Register 2-141<br />

Identification Register 2-139<br />

Levels (O-XX) 2-42<br />

Vector Listing 3-3<br />

Vectors (O-7F) 3-21<br />

1 CH - Timer Tick 3-5<br />

1 DH - Video Parameters 3-5<br />

1 EH - Diskette Parameters 3-5<br />

1 FH - Graphics Character Extensions 3-6<br />

15 3-8<br />

K<br />

KB - Kilobyte (See Memory Expansion Options)<br />

Keyboard<br />

Break 3-16<br />

Character Codes 3-11<br />

Diagram 2-16<br />

Encoding 3-11<br />

Extended Codes 3-13<br />

Extended Functions 3-13<br />

Interface Block Diagram 2-15<br />

Interface Connector Specifications 2-18<br />

Pause 3-16<br />

Print Screen 3-16<br />

Scan Codes 2-17<br />

Shift States 3-14<br />

Shift Key Priorities 3-15<br />

Special Handling 3-15<br />

System Reset 3-15<br />

Usage 3-17<br />

Kilobyte (KB) (See Memory Expansion Options)<br />

1-10


L<br />

LF (Line Feed) 2-79<br />

Light Pen<br />

Interface 2-63<br />

Mode Control and Status Register 2-57<br />

Register Description 2-56<br />

Line Control Register (LCR) 2-134<br />

Line Feed 2-79<br />

Line Status Register (LSR) 2-137<br />

Lines Used 2-39<br />

Loads 2-39<br />

Logic Diagrams Appendix D<br />

Low Memory Maps<br />

BASIC and DOS Reserved Interrupts (80-3FF) 3-22<br />

BASIC Workspace Variables 3-23<br />

Interrupt Vectors (0-7F) 3-21<br />

Reserved Memory Locations (400-5FF) 3-22<br />

M<br />

Major Component Definitions 2-48<br />

Matrix Printer (<strong>IBM</strong> 80 CPS) 2-70<br />

Megabyte 2-3<br />

Memory<br />

BIOS Map 3-7<br />

Map (System) 2-25<br />

Module Description 2-114<br />

Module Pin Configuration 2-114<br />

Other Read/Write Usage 3-6<br />

Requirements (Color/Graphics) 2-60<br />

Requirements (<strong>IBM</strong> Monochrome) 2-41<br />

System Board Switch Settings 2-30<br />

32/64 KB Expansion Option Switch settings 2-31<br />

Memory Expansion Options<br />

Memory Module Description 2-14<br />

Memory Module Pin Configuration 2-114<br />

Operating Characteristics 2-113<br />

Switch Configurable Starting Address 2-115<br />

MEMR (Memory Read Command) 2-11<br />

MEMW (Memory Write Command) 2-11<br />

MFM (Modified Frequency Modulation) 2-110<br />

Mhz (Megahertz) 2-43<br />

Microprocessor 2-3<br />

1-11


Microsecond 2-3 <br />

Mnemonic B-18 <br />

Mode Set and Status Register 2-48 <br />

Modem Control Register 2-142 <br />

Modem Status Register 2-143 <br />

Modes of Operation <br />

Asynchronous Communications Adapter 2-125 <br />

Color/Graphics Monitor Adapter 2-49 <br />

<strong>IBM</strong> Monochrome Display Adapter 2-40 <br />

Mode Register Summary 2-58 <br />

Mode Select Register 2-58 <br />

Monitor Type Switch Settings 2-29 <br />

Monochrome Display (<strong>IBM</strong>) 2-43 <br />

Monochrome Display and Parallel Printer Adapter (See <strong>IBM</strong>) <br />

Motorola 6845 CRT Controller 2-48 <br />

MR (Master Reset) 2-130 <br />

N<br />

NMI (Non-Maskable Interrupt) <br />

of the 8088 2-4 <br />

to the 8088 2-8 <br />

NMI Mask. Reg. - (I/O Address Map) 2-23 <br />

Nominal Power Requirements 2-24 <br />

NUL (Null) 2-82 <br />

Null (NUL) 2-82 <br />

NUM LOCK 3-14 <br />

o<br />

Of Characters, Keystrokes and Color C-l <br />

OHM Resistors 2-67 <br />

Operating Characteristics <br />

Memory Expansion Options 2-113 <br />

Monochrome Display 2-43 <br />

Power Supply 2-36 <br />

Options <br />

Asynchronous Communications Adapter 2-12 <br />

Color/Graphics Monitor Adapter 2-45 <br />

5 1/4" Diskette Drive 2-110 <br />

5 1/4" Diskette Drive Adapter 2-89 <br />

Game Control Adapter 2-117 <br />

<strong>IBM</strong> 80 CPS Matrix Printer 2-70 <br />

<strong>IBM</strong> Monochrome Display 2-43 <br />

32/64 KB Memory Expansion Options 2-113 <br />

1-12


Options (continued) <br />

Parallel Printer Adapter 2-65 <br />

"ORed" 2-65 <br />

OSC (Oscillator) 2-10 <br />

Other Read/Write Memory Usage 3-6 <br />

OUT PORT 2-39 <br />

Output <br />

AC 2-34 <br />

Address 2-67 <br />

DC 2-34 <br />

Port 2-65 <br />

OUT 1 2-132 <br />

OUT 2 2-132 <br />

Output Signals <br />

Baud Out (BAUD OUT) 2-132 <br />

Chip Select Out (CSOUT) 2-132 <br />

Data Terminal Ready (DTR) 2-132 <br />

Driver Disable (DDIS) 2-132 <br />

Interrupt (INTRPT) 2-132 <br />

Output 1 (OUTl) 2-132 <br />

Output 2 (OUT2) 2-132 <br />

Request to Send (RTS) 2-132 <br />

Serial Output (SOUT) 2-132 <br />

Overview (Hardware) 1-1 <br />

Over Voltage/Current Protection 2-36 <br />

p<br />

Parallel Printer Adapter <br />

ASCII Coding Table 2-78 <br />

ASCII Control Codes 2-79 <br />

Block Diagram 2-66 <br />

Description 2-37 <br />

DMA Channel 2-42 <br />

<strong>IBM</strong> 80 CPS Matrix Printer 2-70 <br />

I/O Address and Bit Map 2-42 <br />

Interrupt Levels 2-42 <br />

Logic Diagram D-31 <br />

Parallel Interface Description 2-73 <br />

Printer Specifications 2-71 <br />

Programming Considerations 2-67 <br />

Programming the 6845 CRT Controller 2-41 <br />

Sequence of Events 2-41 <br />

Setting the DIP Switches 2-72 <br />

Timing 2-77 <br />

1-13


Parameters, 6845 Initialization 2-41<br />

Parameter Passing, ROM BIOS 3-2<br />

Parity Flag, 8080 Flags B-1<br />

Pause, BIOS Cassette Logic Special Handling 3-16<br />

Pin Connectors<br />

P2-6 Pin Berg Strip for Light Pen Connector 2-63<br />

Pl-4 Pin Berg Strip for RF Modulator 2-63<br />

9 Pin Connector, Color Direct Drive 2-61<br />

9 Pin Connector, <strong>IBM</strong> Monochrome Display 2-44<br />

25 Pin Connector, Parallel Printer Adapter Block Diagram 2-66<br />

25 Pin'D' Shell Connector, Asynchronous Adapter Block<br />

Diagram 2-124<br />

15 Pin'D' Shell Connector, Game Controller Adapter (Analog<br />

Input Connector Specifications) 2-122<br />

25 Pin'D' Shell Connector, Parallel Printer Adapter 2-69<br />

5 Pin Din Connector, Keyboard Interface Connector<br />

Specifications 2-18<br />

15 Pin Male 'D' Shell Connector, Joystick Schematic 2-121<br />

Planar (See System Board 2-3; Intel 8088 2-3)<br />

Power-on Self-Test<br />

System Board 2-4<br />

Keyboard 2-14<br />

Power Supply 2-33<br />

AC Output 2-34<br />

DC Output 2-34<br />

Important Operating Characteristics 2-36<br />

Over Voltage/Current Protection 2-36<br />

Signal Requirements 2-36<br />

Input Requirements 2-34<br />

Power Supply Connectors and Pin Assignments 2-35<br />

Power Supply Location 2-34<br />

Preface i<br />

Print Screen, Special Handling 3-16<br />

Printer, <strong>IBM</strong> 80 CPS Matrix 2-70<br />

Printer Specifications 2-71<br />

Programmable Peripheral Interface (PPI) 8255A-5 2-19<br />

Programming Considerations<br />

Asynchronous Communications Adapter<br />

Asynchronous Communications Reset Functions 2-133<br />

INS 8250 Accessable Registers 2-134<br />

INS 8250 Line Control Register 2-134<br />

INS 8250 Programmable Baud Rate Generator 2-135<br />

Interrupt Identification Register 2-139<br />

Interrupt Enable Register 2-141<br />

Line Status Register 2-137<br />

Modem Control Register 2-142<br />

1-14


Programming Considerations<br />

Asynchronous Communications Adapter (continued)<br />

Modem Status Register 2-143<br />

Receiver Buffer Register 2-144<br />

Transmitter Holding Register 2-145<br />

Color/Graphics Monitor Adapter<br />

Color Select Register 2-57<br />

Control and Status Register 2-57<br />

I/O Address and Bit Map 2-61<br />

Interrupt Level 2-60<br />

Mode Register Summary 2-58<br />

Mode Select Register 2-58<br />

Programming the 6845 Controller 2-55<br />

Programming the Modem Control and Status Register 2-57<br />

6845 Register Descriptions 2-56<br />

Status Register 2-59<br />

Sequence of Events 2-59<br />

5 1/4" Diskette Drive Adapter<br />

Command Status Registers 2-100<br />

Command Summary 2-96<br />

Symbol Descriptions 2-94<br />

<strong>IBM</strong> Monochrome Display and Parallel Printer Adapter<br />

DMA Channel 2-42<br />

I/O Address and Bit Map 2-42<br />

Interrupt Levels 2-42<br />

Memory Requirements 2-41<br />

Sequence of Events 2-41<br />

Programming the CRT Controller 2-41<br />

Programming the 6845 CRT Controller 2-41<br />

Comments 2-104<br />

D<strong>PC</strong> Registers 2-103<br />

Drive Constants 2-104<br />

R<br />

RAS 2-114<br />

Rating Amps, Over Voltage/Current Protection 2-36<br />

Ready Line 2-8<br />

Read Block 3-9<br />

Read Data 2-107,2-108 (5 1/4" Diskette Drives, External) 2-109<br />

Read Status (Parallel Printer Adapter Block Diagram) 2-66<br />

Read/Write Memory<br />

Color Monitor 2-50<br />

Color TV 2-49<br />

Future Expansion in I/O Channel, 384 KB 2-26<br />

1-15


Read/Write Memory (continued) <br />

Graphics Storage Map 2-53 <br />

Hardware Overview 1-1 <br />

I/O Address Map 2-24 <br />

Memory Address Space 2-61 <br />

Memory Expansion Options 2-113 <br />

User 3-7 <br />

Receive Circuit 2-127 <br />

Receiver Clock, (RCLK) 2-128 <br />

Recording Medium 2-111 <br />

Refresh Cycles 2-8 <br />

Registers, Address <br />

Command Status 2-100 <br />

Data 2-9 <br />

Initialization <br />

Parameters 2-41 <br />

INS 8250 Accessible 2-134 <br />

INS 8250 Line Control 2-134 <br />

Interrupt Enable 2-141 <br />

Line Control 2-134 <br />

Line Status 2-137 <br />

Main Status 2-9 <br />

Modem Control 2-142 <br />

Modem Status 2-143 <br />

Receiver Buffer 2-144 <br />

Transmitter Holding 2-145 <br />

6845 2-55 <br />

Register File <br />

Color Select 2-57 <br />

6845 Data 2-41 <br />

Description 2-56 <br />

6845 Index 2-42 <br />

6845 Initialization Parameters 2-41 <br />

Mode Select 2-58 <br />

Status 2-57, 2-59 <br />

Requirements <br />

Input (Power Supply) 2-34 <br />

Memory 2-60 <br />

Signal (Power Supply) 2-36 <br />

RESET DRV (Reset Drive) 2-10 <br />

I/O Channel Description 2-119 <br />

ROM Address Space, 256 KB 2-25 <br />

=RESET 2-105 <br />

Reserved Memory Locations (400-5FF) 3-22" <br />

Result Phase 2-93 <br />

1-16


Response Requirements, Interrupt and DMA 2-39 <br />

Reverse Video <br />

Modes of Operation 2-40 <br />

Color Graphics Monitor Adapter 2-45 <br />

RF Modulator <br />

Auxiliary Video Connector PI-4 Pin Berg Strip 2-63 <br />

Color Graphics Monitor Adapter 2-45 <br />

Interface 2-63 <br />

Ring Indicator 2-127 <br />

ROM <br />

Character Generator 2-48 <br />

Color Graphics Mode 2-52 <br />

Color Graphics Monitor Adapter 2-46 <br />

Diagram 2-13 <br />

Hardware Overview 1-1 <br />

Keyboard 2-14 <br />

Memory Expansion Options 2-113 <br />

System Board 2-3, 2-4 <br />

System Board Component Diagram 2-13 <br />

System Memory Map 2-27 <br />

ROM and System Usage 3-1 <br />

ROM BIOS <br />

BIOS Cassette Logic 3-8 <br />

BIOS Memory Map 3-8 <br />

Cassette Read 3-9 <br />

Cassette Write 3-9 <br />

Data Record Architecture 3-10 <br />

Description 3-2 <br />

Error Recovery 3-10 <br />

Interrupt 15 3-8 <br />

Interrupt ICH Timer Tick 3-5 <br />

Interrupt IDH Video Parameters 3-5 <br />

Interrupt IEH Diskette Parameters 3-5 <br />

Interrupt IFH Graphics Character Extensions 3-6 <br />

Interrupt Vector Listing 3-3 <br />

Other Read/Write Memory Usage 3-7 <br />

ROM BIOS Listing Appendix A <br />

ROS (Read Only Storage) (See ROM) <br />

ROM, Request for Master 2-92 <br />

RS232-C (See Asynchronous Communications Adapter)<br />

RTS (Ready to Send) 2-123 <br />

R/W (Read/Write) <br />

Symbol Description 2-95 <br />

2-123 <br />

1-17


s <br />

Scan Codes 2-17<br />

Screen 2-43<br />

Schematic (See Logic Diagrams)<br />

SCROLL LOCK 3-15<br />

Selecting the Interface Format 2-146<br />

Sequence of Events 2-59<br />

Serial Input (SIN) 2-130<br />

Serial Output (SOUT) 2-132<br />

Setting the DIP Switches 2-72<br />

Shift In 2-80<br />

Shift Out 2-80<br />

Shift States 3-14<br />

SI (Shift In) 2-80<br />

Signal Requirements 2-36<br />

SIN ( Serial Input) 2-130<br />

SO 2-80<br />

Software Algorithms 3-8<br />

SOUT (Serial Output) 3-132<br />

Speaker<br />

Drive System Block Diagram 2-22<br />

Interface 2-22<br />

Special Handling 3-15<br />

Special Timing 2-39<br />

Specifications<br />

5 1/4" Diskette Drive 2-112<br />

Printer 2-71<br />

System Appendix E<br />

Status Registers<br />

Color/Graphics 2-59<br />

o (5 1/4" Diskette Drive Adapter) 2-100<br />

1 (5 1/4" Diskette Drive Adapter) 2-101<br />

2 (5 1/4" Diskette Drive Adapter) 2-102<br />

3 (5 1/4" Diskette Drive Adapter) 2-103<br />

Storage (See Memory)<br />

Strobe<br />

Address 2-129<br />

Data Output 2-129<br />

Summary of Available Colors 2-55<br />

Switch Settings<br />

Configurable Start Address 2-115<br />

5 1/4" Diskette Drives 2-29<br />

32/64 KB Memory Expansion Option 2-31<br />

Monitor Type 2-29<br />

System Board Memory 2-30<br />

1-18


System Board <br />

Cassette Interface Connector Specifications 2-21 <br />

Cassette Jumpers 2-19 <br />

Cassette User Interface 2-19 <br />

Circuit Block Diagrams ( Cassette) 2-19 <br />

Component Diagram 2-13 <br />

Data Flow 2-6 <br />

5 1/4" Diskette Drive Switch Settings 2-29 <br />

I/O Address Map 2-23 <br />

I/O Channel 2-8 <br />

I/O Channel Description 2-10 <br />

I/O Channel Diagram 2-9 <br />

Keyboard 2-14 <br />

Keyboard Diagram 2-16 <br />

Keyboard Interface Block Diagram 2-15 <br />

Keyboard Interface Connector Specifications 2-18 <br />

Keyboard Scan Codes 2-17 <br />

32/64 KB Memory Expansion Option Switch Settings 2-31 <br />

Memory Switch Settings 2-30 <br />

Monitor Type Switch Settings 2-29 <br />

Speaker Drive System Block Diagram 2-22 <br />

Speaker Interface 2-22 <br />

System Memory Map 2-25 <br />

System Expansion Slots (See I/O Slots) 2-3 <br />

System Memory Map 2-25 <br />

System Memory Map (16 KB Increments) 2-26 <br />

System Unit 1-1 <br />

System Unit Power Connector 2-35 <br />

System Usage (ROM and) 3-1 <br />

T<br />

Tab (Vertical) 2-79 <br />

T/C (Terminal Count) 2-12 <br />

Terminal Count (T/C) 2-12 <br />

THR (Transmitter Holding Register) 2-145 <br />

Timing Generator 2-48 <br />

Transmit Circuit 2-127 <br />

Transmit Data (TX) 2-127 <br />

Transmitter Holding Register (THR) 2-145 <br />

Transmitter Output and Receiver Input 2-126 <br />

Trigger Buttons 2-118 <br />

TX Data (Transmit Data) 2-127 <br />

1-19


u <br />

Unit Specifications Appendix E <br />

Usage (Keyboard) 3-17 <br />

Use of BIOS 3-2 <br />

User Interface (Cassette) 2-19 <br />

v<br />

Vectors <br />

(O-7F Interrupt) 3-21 <br />

(Interrupt Listing) 3-3 <br />

Vectors With Special Meaning <br />

Interrupt 1 CH Timer Tick 3-5 <br />

Interrupt IDH Video Parameters 3-5 <br />

Interrupt lEH Diskette Parameters 3-5 <br />

Interrupt 1 FH Graphics Character Extensions 3-6 <br />

Other Read/Write Memory Usage 3-6 <br />

Vertical Drive 2-43 <br />

Video <br />

Monitor 2-62 <br />

(Reverse) 2-45 ~<br />

Signal 2-43 <br />

Voltage Interchange Information 2-128 <br />

Voltage <br />

Power Supply 2-33 <br />

I/O Channel 2-8 <br />

System Board I/O Channel Description 2-10 <br />

Keyboard Interface Connector Specifications 2-18 <br />

Cassette Interface Connector Specifications 2-21 <br />

Speaker Interface 2-22 <br />

Power Supply 2-33 <br />

Power Supply Location 2-34 <br />

Important Operating Characteristics 2-36 <br />

Color Graphics Monitor Adapter Direct Drive and <br />

Composite Interface Pin Assignment 2-62 <br />

Color/Graphics Monitor Adapter Auxiliary Video <br />

Connectors 2-62 <br />

Printer Specifications 2-71 ~<br />

Game Controller Adapter (Analog Input) Connector <br />

Specifications 2-122 <br />

Voltage Interchange Information, Asynchronous Communications <br />

Adapter 2-128 <br />

Selecting the Interface Format, Asynchronous Communications <br />

Adapter 2-146 <br />

1-20


w <br />

Workspace (BASIC Variables) 3-23<br />

Write (Cassette) 3-8<br />

Write (Cassette Interface Hardware) 2-20<br />

r'""\ Write Data 2-106<br />

Write Enable 2-106<br />

Write Protect 2-107<br />

Numerics<br />

5 1/4" Diskette Drive 2-110<br />

5 1/4" Diskette Drive Adapter 2-91<br />

32/64 KB Memory Expansion Options 1-3<br />

80 CPS Matrix Printer, <strong>IBM</strong> 2-70<br />

80 Interpreter, BASIC 1-1<br />

6845 CRT Controller 2-48<br />

8080 Parity Flags B-1<br />

8088, Intel 2-3<br />

8250 INS Accessible Registers 2-134<br />

RS232C-A Asynchronous Communications Adapter 2-123<br />

1-21


1-22 <br />

NOTES


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