Intel is preparing new server architecture to tackle AMD’s EPYC.
Intel Cascade Lake
The slide you can find below allegedly originated at Intel ‘Saudi Conference’ where details of upcoming Cascade Lake architecture have been shared. The CPU based on CL architecture is to support up to 56 logical cores with Intel HyperThreading (so the chip itself is 28-core).
AMD has somewhat taken Intel by surprise by offering dual socket support for 64-core EPYC processors, which meant up to 128 logical cores per system (2S). Intel decided to respond to this by continuing to offer dual, quad and even octa-socket support (via xNC) with Cascade Lake.
Of course, 2S/4S and 8S technology are not technically new, they were already supported by Skylake-based Xeon Scalable architecture (diagram below).
Another interesting piece is 6-channel memory support for Cascade Lake (which has already been mentioned in previous leaks) and 48-PCIe lane support per CPU (EPYC offers 128 PCIe lanes per CPU).
How 8S XNC works (according to Intel):
Source: 2355 @ VideoCardz
